<GitHub58>
llvm-or1k/artiq-6.0 0726197 whitequark: [OR1K] Handle lowering of return values over 64 bits wide....
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<sb0>
SiFive’s RISC-V Core IP FPGA Evaluation Kit let you test, prototype, and develop your RISC-V program on actual hardware. Our FPGA bitstreams are FAST! Running at 65MHz, these emulation environments are faster than many of the MCUs you’re going to be replacing.
<sb0>
65
<sb0>
lol
<sb0>
ah, sifive are doing proprietary IP licenses now
<sb0>
that didn't take long
<whitequark>
sb0: what do you mean?
<sb0>
their FE310 had the RTL sources open (https://github.com/sifive/freedom). but, for everything else (and what is prominent on their site), it's "evaluation" code, plus pretty regular fabless vendor licensing
<whitequark>
did they ever promise that they'll open-source everything?
<whitequark>
that's not a very viable business model
<sb0>
dunno, depends what you are doing. gaisler open sourced almost everything and was very successful
<sb0>
but then I don't see why SiFive is better than ARM. is it just because it's nicely packaged and marketed, a bit like Valve's Steam is popular DRM?
<sb0>
well, at least they won't go after people (including students) who make their own risc-v cores
<whitequark>
ARM's licensing terms are draconian
<whitequark>
I mean, that's a strange comparison
<whitequark>
you're comparing a single implementor of an open architecture with a company that does everything except silicon
<sb0>
ARM was around for longer, they didn't do everything from day one
<whitequark>
FE310 is an interesting MCU, running at 320 MHz
<whitequark>
there are not many Cortex-M contenders
<whitequark>
only STM32H7 from the STM32 line, for example, is marginally faster
<whitequark>
the peripherals are kinda lacking
<sb0>
FE310 doesn't even have flash, does it?
<sb0>
sigh, scala.... it's getting into vivado levels of bloat
<sb0>
the spinalhdl stuff looks very interesting, but why did he have to use that language
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<davidc__>
whitequark: IIRC its 320mhz running from SRAM
<davidc__>
whitequark: my understanding that there are process tradeoffs required to put flash in the part (as well as just pure flash access rate limitations)
<davidc__>
so, its not really an apples-for-apples comparison
<whitequark>
davidc__: that is a very good point
<whitequark>
though I'm pretty sure it doesn't have flash because of licensing reasons
<rqou>
afaik the reason real AVRs are so slow is because of flash
<rqou>
which is how navre can go so much faster
<whitequark>
STM32 also has flash and is much faster
<davidc__>
whitequark: could well be that was the driver for removing flash from the design (IP BS)
<whitequark>
davidc__: or never putting it there in the first place
<whitequark>
AFAIK flash IP is very closely guarded
<rqou>
STM32 flash has a special cache/prefetcher, that's why
<whitequark>
unlike any other design rules and IP, which you can even get without NDA if you're fine with reduced performance
<whitequark>
rqou: that doesn't sound right
<whitequark>
AVR has single-cycle execution for most instructions and two-cycle for jumps
<davidc__>
STM32H7 datasheet says its a 256bit wide flash interface, so they can load a single cache line in a single flash fetch
<davidc__>
but I wonder what the latency is for a cache miss
<sb0>
yeah and just like vivado, scala also doesn't work
<whitequark>
sb0: I would personally not bother with scala
<whitequark>
the language is atrocious and tooling is a royal pain
<whitequark>
I'm not sure if a HDL can be ever good enough to justify dealing with that
<sb0>
yes, that's what I'm complaining about. unfortunately FPGA softcores that aren't unusable trash are exceedingly rare.
<cr1901_modern>
Did you evaluate a large number of cores before settling on lm32 for milkymist?
<cr1901_modern>
sb0: You may wish to take a look at Ariane, but it's systemverilog
<sb0>
cr1901_modern, yes
<sb0>
but that was many years ago
<cr1901_modern>
So since then, there's been exactly one other softcore that meets your standards :/
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<cr1901_modern>
So we have a softcore that's relatively pleasant to read* and the toolchain support is stagnant, and a core that's not-so-pleasant to read* but the toolchain support is good (* My experience only)
<GitHub-m-labs>
[artiq] jbqubit commented on issue #854: I've also tried using an AMC delivered last week from WUT that has a very recent version of Open MMC firmware. And the Ethernet white wire was added by WUT. https://github.com/m-labs/artiq/issues/854#issuecomment-378002772
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