sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<ccube>
how can I convert a Signal's values to an integer?
fengling has quit [Quit: WeeChat 1.0]
mumptai has quit [Ping timeout: 272 seconds]
mumptai has joined #m-labs
<rjo>
ccube: what do you want to do?
<rjo>
ccube: a signal's value is already an integer.
<ccube>
i try to use the signal to index an array
<rjo>
you can just use Array([signal_a, signal_b, 3, 4])[indexing_signal]
<rjo>
it's in the manual.
<ccube>
TypeError: list indices must be integers, not Signal
<ccube>
sorry, i am indexing a list. should it work with it too?
<rjo>
no. as i said. use Array().
<ccube>
ah, okay
<ccube>
thx
<ccube>
is there anyone using papilio pro board with xc3sprog? i am always getting a unknown JEDEC manufacturer: ff, ISF Bitfile probably not loaded error/warning and it seems that the bitfile was not flashed.
<rjo>
you might want do do two things: a) check that you are using the right proxy bitstream and b) patch the ground plane together on the backside using a bunch of bridges.
<rjo>
search the irc logs/artiq mailing list. there was talk about it.
<ccube>
rjo, thx
<ccube>
papilio-prog is working btw, so i supposed to have a software problem.
fengling has joined #m-labs
<ccube>
rjo, cant really figure out what the problem is. cant find anything helpful in irc logs. when flashing with papilio-loader, it is working, when usinc xc3sprog, i am getting the jedec error. i am using exactly the same proxy bitstream in both cases. so should be a bug in xc3sprog? unfortunately, papilio-prog sucks because I cannot flash bitstream, bios and program at the same time...
<GitHub94>
[misoc] enjoy-digital pushed 2 new commits to master: http://git.io/jLLg
<GitHub94>
misoc/master 7ea9e2b Florent Kermarrec: sdram: use names that are more explicit for bank_a, row_a,...: bankbits, rowbits, .... Add databits to GeomSettings.
<GitHub94>
misoc/master ba8b24d Florent Kermarrec: sdram: pass module as phy parameter, define memtype in modules and only keep phy parameter in register_sdram_phy
<GitHub111>
[misoc] enjoy-digital pushed 3 new commits to master: http://git.io/jLMm
<GitHub111>
misoc/master ff11cb9 Florent Kermarrec: sdram/core/lasmicon: automatically insert bandwidth module when with_memtest is True