sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<ysionneau>
00:55 < rjo> ysionneau: nice. don't you also have do do udevadm control --reload-rules? < I tried without and it seems to work, I think udev is monitoring its rules directory using inotify
<whitequark>
systemd-udev likely
<ysionneau>
yes, my system uses systemd-udev
<ysionneau>
(debian jessie)
<whitequark>
well, for once they did something decent
<ysionneau>
:D
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<GitHub160>
[migen] enjoy-digital pushed 1 new commit to master: http://git.io/jWHb
<GitHub160>
migen/master ec08047 Florent Kermarrec: mibuild/sim: use the same architecture we use for others backends
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<GitHub3>
[misoc] enjoy-digital pushed 3 new commits to master: http://git.io/j8VH
<GitHub3>
misoc/master f85a4f0 Florent Kermarrec: software/bios/sdram: add random addressing to memtest...
<GitHub3>
misoc/master 6245dd7 Florent Kermarrec: software/bios/sdram: for now desactivate random on address test since it seems to trigger a L2 cache or LASMIcon bug on at least de0nano/minispartan6...
<GitHub3>
misoc/master f4c35e3 Florent Kermarrec: software/bios/sdram: small clean up
<sb0>
ysionneau, struct.unpack("B" already returns an int, there is no need to call int() on the return value
<ysionneau>
ah in comm_serial
* ysionneau
does not remember why he thought this int() was necessary
<ysionneau>
but yes it seems wrong :o
<ysionneau>
ok
<GitHub1>
[artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/j85n
<GitHub1>
artiq/master 3108ffe Sebastien Bourdeauducq: coredevice/comm_serial: use lazy formatting in logging
<ysionneau>
do you want me to send a patch to remove it? Or will you remove it?
<ysionneau>
alright
<ysionneau>
that is to not spend cpu cycles in formating string when logging is disabled?
<sb0>
yes
<ysionneau>
ok
<sb0>
and to be consistent with other modules
<sb0>
which use % formatting
<ysionneau>
ok
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<GitHub182>
[migen] sbourdeauducq pushed 2 new commits to master: http://git.io/j4Jb
<GitHub182>
migen/master 20b646b Robert Jordens: add tool to build minimal xilinx toolchains
<sb0>
ysionneau, you forgot to remove the rtio channel in ddb.
<sb0>
and this breaks pdq2/the transport example.
<sb0>
why is artiq_flash.sh in frontend but not installed by setup.py?
<sb0>
also it's "ARTIQ", not "the ARTIQ project"
<sb0>
hmm, the ddb looks already broken wrt the number of rtio channels
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<ysionneau>
sb0: I can only see 3 RTIOOut in ddb.pyon is that normal? (ttl0 ttl1 ttl2)
<ysionneau>
ah it breaks the rtio_trigger of pdq2?
<ysionneau>
19:30 < sb0> why is artiq_flash.sh in frontend but not installed by setup.py? < setup.py can only install python scripts, not shell scripts (you need to give a module path and a function name)
<ysionneau>
maybe I can put artiq_flash.sh somewhere else? in misc/?
<ysionneau>
19:32 < sb0> hmm, the ddb looks already broken wrt the number of rtio channels < ah, ok, I was trying to make sense of the numbering and couldn't understand the rtio_trigger: 7 with only 6 rtio outputs :o
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<rjo>
ysionneau: if this is dependent on systemd-udev it will not work on the dominant ubuntu trusty
<sb0>
i think setup.py can also install shell scripts
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<ysionneau>
sb0 rjo do you know which pin of the pxi6733 is supposed to be the sampling clock?
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