10:46 <sb0> https://hamgear.wordpress.com/2015/03/09/tubular-bells-and-vlf-interference/

12:03 <kugg> mind = blown

12:14 <GitHub87> [artiq] sbourdeauducq pushed 2 new commits to master: http://git.io/pPkj

12:14 <GitHub87> artiq/master 3122623 Sebastien Bourdeauducq: rtio: make 63-bit timestamp counter the default [soc]

12:14 <GitHub87> artiq/master 0416da8 Sebastien Bourdeauducq: runtime/test: implement ttlout, clksel and dds functions

12:18 <travis-ci> m-labs/artiq#51 (master - 0416da8 : Sebastien Bourdeauducq): The build passed.

12:18 <travis-ci> Build details : http://travis-ci.org/m-labs/artiq/builds/54086347

12:21 <ysionneau> hum weird travis skipped this commit : artiq/master 3122623 Sebastien Bourdeauducq: rtio: make 63-bit timestamp counter the default [soc]

12:22 <ysionneau> maybe because the two of them were pushed at the same time

12:22 <ysionneau> too bad it didn't trigger a build of the soc ([soc] tag in the commit)

12:22 <sb0> yes. it only builds once per push. and the [soc] keyword detection only takes place on the last commit in the push...

12:22 <ysionneau> yes :/

12:41 <sb0> http://www.wired.com/2015/03/need-free-digital-hardware-designs/ what? rms is making some sense now?

12:46 <whitequark> ha

12:46 <larsc> if you say a lot you'll eventually say something that makes sense ;)

12:47 <sb0> by virtue of the infinite monkey theorem?

12:50 <larsc> yea

16:40 <GitHub175> [misoc] enjoy-digital pushed 3 new commits to master: http://git.io/pX5t

16:40 <GitHub175> misoc/master 767d457 Florent Kermarrec: uart/liteeth: only import the phy we are going to use (UARTPHYSim cannot be imported on Windows since based on pty).

16:40 <GitHub175> misoc/master cd6c04b Florent Kermarrec: soc/sdram: add workaround for Vivado issue with our L2 cache, reported to Xilinx in november 2014, remove it when fixed by Xilinx

16:40 <GitHub175> misoc/master f18ae9b Florent Kermarrec: targets/simple: insert IBUFDS for Xilinx devices (not implemented for others vendors)

17:40 <GitHub61> [migen] enjoy-digital pushed 1 new commit to master: http://git.io/p1lc

17:40 <GitHub61> migen/master c8ba8cd Florent Kermarrec: migen/genlib: add io.py to define generic I/O specials to be lowered by mibuild

17:40 <GitHub37> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/p1lR

17:40 <GitHub37> misoc/master 1b72b81 Florent Kermarrec: targets/simple: use new generic DifferentialInput

17:50 <GitHub8> [migen] enjoy-digital pushed 1 new commit to master: http://git.io/p10h

17:50 <GitHub8> migen/master bf28664 Florent Kermarrec: genlib/io.py: fix copy/paste error (thanks rjo)

18:34 <GitHub103> [migen] enjoy-digital pushed 1 new commit to master: http://git.io/p1ds

18:34 <GitHub103> migen/master ff266bc Florent Kermarrec: migen/genlib/io: add DifferentialOutput and Xilinx implementation

20:55 <GitHub44> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/pMh8

20:55 <GitHub44> misoc/master c3c7f62 Florent Kermarrec: liteeth/phy: typo (thanks sb)