lekernel changed the topic of #m-labs to: Mixxeo, Migen, MiSoC & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<GitHub132> [migen] enjoy-digital pushed 1 new commit to master: http://git.io/xBEQ
<GitHub132> migen/master 7d68ecb Florent Kermarrec: move dma_lasmi to MiSoC
<GitHub34> [misoc] enjoy-digital pushed 5 new commits to master: http://git.io/xBEN
<GitHub34> misoc/master b305b78 Florent Kermarrec: sdram: create frontend dir and move dma_lasmi/memtest/wishbone2lasmi to it
<GitHub34> misoc/master 88e7fa2 Florent Kermarrec: sdram: create test dir and move lasmicon/minicon tests to it
<GitHub34> misoc/master 9ad05b2 Florent Kermarrec: sdram: fix remaining data_valid in dma_lasmi
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<GitHub193> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/xBXw
<GitHub193> misoc/master 46020fd Florent Kermarrec: sdram: for now revert dat_ack change (it seems there is an small issue, will have a closer look)
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<GitHub174> [misoc] enjoy-digital pushed 2 new commits to master: http://git.io/xBQW
<GitHub174> misoc/master 0980bec Florent Kermarrec: sdram: improve memtest by adding 2 different writes/reads...
<GitHub174> misoc/master 6b24562 Florent Kermarrec: sdram: reintroduce dat_ack change (it was a small issue on wishbone writes (sending data 1 clock cycle too late) that was not detected by memtest)
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<sb0__> ysionneau: can you modify flash.sh so that it doesn't display "done" when it does nothing?
<sb0__> artiq@artiq-control-ps ~/artiq-dev/binary_package $ ./flash.sh Done.
<ysionneau> hi, yes
<sb0__> also, -a should be the default I think
<ysionneau> agreed
<sb0__> most people will just download the archive and try to run that script
<sb0__> do we even need any command line options?
<sb0__> better just put a hardcoded series of xc3sprog commands in there. will also make the script easier to understand to eg windows users
<ysionneau> the idea of the options was to allow to just reflash one part, which was useful since 1°) flashing is slow and 2°) we had issues with flashing errors
<ysionneau> if, for instance, the bitstream flashing was OK, but BIOS flashing failed, you don't want to retry to flash the bitstream
<ysionneau> since you may fail it ... and have to do it again (which is really slow)
<ysionneau> but I agree that default should be -a
<sb0__> those boards that need multiple flashing attempts should have their hardware fixed.
<sb0__> kernel loading isn't reliable on them anyway afaict
<ysionneau> having the manufacturer fix the board design would be the best solutions, but it's not in our hands unfortunately :/
<ysionneau> (talking about ppro)
<sb0__> it seems adding wires to the ground plane helps
<ysionneau> for Windows users I can put a simpler hardcoded bash script maybe
<ysionneau> *brb*
<sb0__> ysionneau: http://pastebin.com/WqkxeJ8q
<ysionneau> arg
<ysionneau> linux-64 ?
<ysionneau> (which linux distro (+version) is this?)
<ysionneau> I guess it means the glib installed on this computer is not up to date enough
<ysionneau> maybe I should add a dependency on a glib conda package to avoid this
<ysionneau> https://github.com/conda/conda-recipes/tree/master/glib < here is a conda recipe for it
<ysionneau> I've only tested the linux-64 package on Fedora and Debian Jessie, gui works on both
<ysionneau> ok I can reproduce the issue on openSUSE 13.1 64 bi
<ysionneau> bit*
<ysionneau> this symbol exists since libglib 2.40.0
<ysionneau> hum 2.41.1 even
<ysionneau> sb0__ : alright, I compiled and uploaded an up to date glib package (for linux-64) which fixes the issue on my openSUSE (where I could reproduce your issue) : so on linux-64 just do : conda install -c fallen glib
<ysionneau> and it should fix your issue
<ysionneau> I will generate a package for linux-32 also, and add this as a dependency on the pygobject package
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<_florent_> hi
<_florent_> sb0__, ysionneau: I want to change something about the generation of the CSR base address
<ysionneau> hi
<_florent_> but I want to see if you are OK with that with you since software has to be adapted a little:
<_florent_> The way we actually generate CSR and MEM header can create conflicts:
<_florent_> ex1: if I want to create a sdram core, cpuif generates SDRAM_BASE as CSR base which is already a memory base
<_florent_> ex2: I have a ethmac core, but to avoid conflicts I have to rename mem from ethmac to ethmac_mem
<_florent_> (which is then not coherent with others mem base names)
<_florent_> I'd like to add a "CSR_" prefix to CSR bases, which will require small modifications in software
<_florent_> If I do that I'll do the modifications on MiSoC and Mixxeo-SoC but it will also break Artiq
<_florent_> but I can also send you a patch for Artiq
<_florent_> With this prefix we won't have such conflicts in the future...
<_florent_> Does it seems OK for you?
<_florent_> (After that I stop breaking things... :)
<ysionneau> this CSR_ prefix is a prefix for the C macros?
* ysionneau already sees a CSR_ prefix for CSR_***_BASE macros
<ysionneau> in generated/csr.h
<_florent_> yes it's for the C macros
<_florent_> in fact ADDR and SIZE have a CSR_ prefix but not CSR_***_BASE
<ysionneau> ah sure, sorry
<ysionneau> so you want to avoid conflicts between the csr macros and the ones in mem.h ? (SDRAM_BASE, SRAM_BASE, ROM_BASE)
<_florent_> yes, because for each memory region name you declare, you can't then use this name in csr_map
<_florent_> and with this in the software it would be clear if it's a CSR or a memory region
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<ysionneau> ok sure I get it
<ysionneau> it seems ... fair enough
<ysionneau> let's see what sb0__ thinks about it
<_florent_> In fact in Artiq there is no "XXX_BASE" used in the software, so it will not break it
<ysionneau> o/
<ysionneau> _florent_: where is the code for the ... simulation platform for misoc?
<ysionneau> I would like to have a look at how you did that :)
<ysionneau> seems you used verilator
<_florent_> in fact it's simply a mibuild backend (sim dir in mibuild), and the sim platform is in platforms, the only modification in MiSoC is the use of a sim phy for the uart
<_florent_> (which avoid having to serialize/deserialize data for the uart and speed up things)
<ysionneau> oh it's already pushed on github, cool
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<_florent_> yep, you can try it if you want, you just have to install verilator and put it nead migen, misoc directories
<_florent_> (I have to fix the verilator_root_path)
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<sb0> ysionneau, that was on linux-32
<sb0> rjo, right now we are discussing distributed-rtio vs. distributed-cpu ...
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<sb0> _florent_, yes, you can change that
<_florent_> OK thanks
<ysionneau> sb0 < ok, in fact it has nothing to do with linux-32 or 64, it's just that you were using a too old glib version, just do conda install -c fallen glib
<ysionneau> it works on both linux-32 and linux-64 now
<sb0> will the default artiq conda install pull that glib automatically?
<sb0> default as in, just following the instructions on m-labs.hk
<ysionneau> as soon as I upload the new artiq package yes
<GitHub53> [misoc] enjoy-digital pushed 5 new commits to master: http://git.io/xEsX
<GitHub53> misoc/master de698c5 Florent Kermarrec: sdram: rename self.phy_settings to self.settings (using phy.settings instead of phy.phy_settings seems cleaner)
<GitHub53> misoc/master 9733115 Florent Kermarrec: sdram: create core dir and move lasmicon/minicon in it
<GitHub53> misoc/master 3465db2 Florent Kermarrec: soc/sdram: be more generic in naming
<ysionneau> (which will depend on it)
<sb0> ok, good
<sb0> _florent_, by the way, did you get the artiq runtime to run again?
<sb0> on the kc705
<_florent_> I'm going to do continue to work on uip for Artiq and I use netboot for that, so it's I there an issue I will see it and fix it
<ysionneau> (ok artiq packages are updated)
<ysionneau> they will from now on pull glib package
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<_florent_> sb0: I've added a small README for mixxeo-soc
<_florent_> I hope it's fine
<GitHub67> [misoc] enjoy-digital pushed 2 new commits to master: http://git.io/xukV
<GitHub67> misoc/master 02ef1dc Florent Kermarrec: targets: fix mlabs_video FramebufferSoC
<GitHub67> misoc/master 3449b7c Florent Kermarrec: update README
<sb0> ah, cool. thanks!
<sb0> I guess Pipistrello is also supported now
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<GitHub27> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/xulc
<GitHub27> misoc/master ca42611 Florent Kermarrec: README: add Pipistrello
<_florent_> rjo: in case you want to test USB slave fifo with Pipistrello, you can use code from misolib/com/liteusb
<_florent_> there is the hdl and software
<_florent_> it's was developed for the same FT2232H chip that is on the Pipistrello
<rjo> sb0__: good. say hello from us.
<rjo> _florent_: re moving tests: i think it should be fine if you leave the tests at miscolib/*/{tests,tb}/*.py. if they become unittests, tools like nosetests will find them for you.
<rjo> _florent_: nice. i will have a look. do you know how I can switch the ftdi chip between uart and fifo from linux userspace? do i have to update the eeprom?
<_florent_> ok the for tests, the idea is to have a only test directory for each core and avoid duplicating test directories for a core
<rjo> _florent_: ack.
<_florent_> for the ftdi chip, I know sb0__ spent quite some time doing it on linux
<rjo> _florent_: ah. you have liteusb/software/ftdicom. i presume that does it.
<_florent_> the easy way is to use FTProg on a windows machine...
<_florent_> no ftdicom handles the communication once the chip is already configured in fifo mode
<rjo> _florent_: so mode of the mpsse is in eeprom and can not be changed temporarily?
<rjo> s/so /so the /
<_florent_> (BTW the software handle virtual UARTs in fifo mode)
<_florent_> not sure if it can be changed temporarily, I've only used it with the eeprom configuration
<rjo> but your ftdicom bypasses the kernel driver and does libusb, right?
<rjo> ok.
<_florent_> yes it's based on libusb-->fastftdi-->libftdicom-->your application
<rjo> ack
<_florent_> just for info, if you try it, you will probably have to adapt the imports in the files, since I've only imported it and changed directories
<_florent_> I've ordered a minispartan6, once I'll have it I will use it and run LiteScope over USB
<GitHub144> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/xuy0
<GitHub144> misoc/master 410a162 Florent Kermarrec: sdram: disable by default bandwidth_measurement on lasmicon
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<GitHub167> [migen] sbourdeauducq pushed 1 new commit to master: http://git.io/xgBP
<GitHub167> migen/master 36f4b68 Sebastien Bourdeauducq: mibuild/sim: style fixes
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<rjo> _florent_: i fear this will stay on my todo list for a while.
<sb0> rjo, you can update the eeprom, but the linux tool for this (ftdi_eeprom) is badly written and crippled with bugs
<sb0> the only reasonable options right now are rewrite it or use the windows tool
<GitHub119> [migen] enjoy-digital pushed 2 new commits to master: http://git.io/xgw9
<GitHub119> migen/master 29c5bb8 Florent Kermarrec: mibuild/sim/verilator: remove verilator_root, use -Wno-fatal and add verbose option (verbose disabled by default)
<GitHub119> migen/master a56fce0 Florent Kermarrec: Merge branch 'master' of http://github.com/m-labs/migen
<rjo> sb0: i know. i had to do this for the ft245r in the pdq2...
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<GitHub115> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/x2kM
<GitHub115> artiq/master 15d09c0 Sebastien Bourdeauducq: runtime: use new uart tuning word function
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<travis-ci> m-labs/artiq#39 (master - 15d09c0 : Sebastien Bourdeauducq): The build passed.
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<GitHub199> [misoc] sbourdeauducq pushed 1 new commit to master: http://git.io/x2O7
<GitHub199> misoc/master 69a0c59 Sebastien Bourdeauducq: make.py: use ternary getattr