sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<GitHub9>
[misoc] sbourdeauducq pushed 2 new commits to master: http://git.io/jhE9
<GitHub9>
misoc/master 2900429 Sebastien Bourdeauducq: soc: use set
<GitHub9>
misoc/master bbdbf87 Sebastien Bourdeauducq: Merge branch 'master' of github.com:m-labs/misoc
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<ccube>
is there dynamic memory available on the LM32 core? (malloc,free)
<ccube>
i am always getting main.c:(.text.startup+0x298): relocation truncated to fit: R_LM32_CALL against undefined symbol `malloc' when trying to use malloc
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<sb0>
"They injected almost 400 amps of current into the diode circuit for a few milliseconds. Measurements made today showed the short circuit had disappeared."
<whitequark>
ha
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<ccube>
sb0, I am kind of stuck figuring out how to use DMAControllers. I actually dont know if I am on the right way. Is there any more examples than Memtest? Maybe documentation and/or documented source code?
<sb0>
ysionneau, KeyError: 'LA00_CC_P'
<sb0>
can you double check those kc705 pins_
<sb0>
?
<GitHub103>
[misoc] sbourdeauducq pushed 1 new commit to master: http://git.io/jjnO
<GitHub103>
misoc/master 382ed01 Sebastien Bourdeauducq: minor cleanups
<GitHub71>
[artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/jjNX
<GitHub71>
artiq/master f124350 Sebastien Bourdeauducq: runtime: disable kernel-CPU functions when kernel-CPU not present
<GitHub188>
[artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/jjpm
<GitHub188>
artiq/master 6973c0f Sebastien Bourdeauducq: move patches into misc
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<GitHub60>
[misoc] sbourdeauducq pushed 1 new commit to master: http://git.io/veefY
<GitHub60>
misoc/master 696819c Sebastien Bourdeauducq: move gpio from cpu.peripherals to com
<GitHub63>
[artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/veefn
<GitHub63>
artiq/master 88a1707 Sebastien Bourdeauducq: soc: use new location of gpio module
<sb0>
hi _florent_
<_florent_>
hi
<sb0>
what was the decision regarding r_ prefixes in CSRs again?
<_florent_>
removing it? :)
<sb0>
completely then, including support for it in migen?
<_florent_>
yes I'm OK with that (I can do it if you want)
<sb0>
also we have two flterms right now, it's a bit messy. couldn't we keep the C version and just #ifdef away the offending bits when building for windows?
<sb0>
ok, please do it. thanks!
<sb0>
there's some left in dvisampler and in some of your cores
<_florent_>
but you also have to use another serial lib that you can use on windows...
<sb0>
fopen("COMx" doesn't work?
<_florent_>
using python allow us to use pyserial
<sb0>
that's a small advantage compared to the mess of two flterms
<sb0>
also... threads?!
<_florent_>
(I've used miniterm from pyserial as a basis)
<sb0>
iirc windows does give you file descriptors for COM ports, so I don't see why the C version would fundamentally not work
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<travis-ci>
m-labs/artiq#76 (master - f124350 : Sebastien Bourdeauducq): The build has errored.
<_florent_>
Do you have a better solution I can use?
<whitequark>
sb0: the reason to use a COM port library is to be able to set port parameters
<whitequark>
if you don't need that, open works
<_florent_>
thanks whitequark, here we only have to configure the baudrate
<whitequark>
then you need some kind of library
<_florent_>
sb0: I'm OK to fix the threads if you have better solution, add cmdline/initrd support and after that GDB (which was not working with MiSoC IIRC)
<_florent_>
I just need a little time to do it and I suggest keeping both c/python version while I'm doing this
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<travis-ci>
m-labs/artiq#78 (master - 88a1707 : Sebastien Bourdeauducq): The build has errored.
<rjo>
_florent_: ack. my personal opinion on code organization within misoclib: keep it flat and don't group by topic. e.g. the sata stuff might be used for non mem-related things. having 20 modules in a directory is better than 10 directories with two modules each.
<rjo>
sb0: you changed my If(por_counter > 0, ...) to If(por_counter != 0, ...) is that faster/smaller/better? i would have thought because of the unsignedness the same logic gets inferred.
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<_florent_>
rjo: I think we have too much cores to keep things flat
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<rjo>
i would agree with that if there were ~100 cores ;)
<ysionneau>
I really liked the organization with misoclib/<core>
<ysionneau>
easier to find something
<ysionneau>
instead of searching in which subdirectory it has been stored
<ysionneau>
I guess I should have said "rjo+1" :p
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<_florent_>
rjo, ysionneau: the idea with this new organization is just to classify cores with generic enough topics.
<_florent_>
for now we have ~20 cores in MiSoC, but I already have at least 5 others I'd like to integrate
<_florent_>
I also want to work on others topics (ex create a dsp topic with fft, ifft, we could also move cordic and mhamgen from migen in it)
<_florent_>
IIRC sb0 also want to move some cores that are now in Migen in MiSoC (bus definitions, bank stuff, and generally eveything that is specific to an application)
<_florent_>
So for now, some directories seem almost empty, but that's just the beginning :)
<_florent_>
For me it seems easier: I search a memory core --> it's in mem, a communication core--> it's in com
<_florent_>
But of course if I'm the only one thinkink it's better like this, we will revert it
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<rjo>
but you already have three levels of topics in several places. and is the sata stuff really always all mem? can't you reuse that ctrl.py and the k7/phy in there for other things? or are some layers in litesata more like "bus" or "protocol" or "com"? and then there are the real troublemakers like "others", "common", "misc".
<rjo>
i have been looking for litesata in com/ a few times already ;)