sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0>
ysionneau, the JFFS2 code is disgusting.
<sb0>
yes, like that comment said.
<sb0>
ysionneau, return how much data was read
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<rjo>
ysionneau: works fine here for kc705, ise.
<rjo>
ysionneau: there are xilinx_vivado_2014.2_k7.tar.gz.gpg and xilinx_ise_14.7_k7.tar.xz.gpg in that same directory, same passphrase.
<rjo>
you can actually overlay them: like docker, just better.
<rjo>
and re licenses i had a case a few months back where the ethernet mac that xilinx inferred was "000000000000". but i don't remember on what host (it was linux) and what configuration that was or what caused it. so i can't reproduce it.
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<mithro>
[florian]: ping?
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<ysionneau>
rjo: oh, how did you do it? Just by running your script? What I did is that I run your stracing script to add the missing files for k7 on top of your already existing stripped down ise version ... maybe I should have started fro scratch?
<ysionneau>
from*
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<GitHub128>
[migen] sbourdeauducq pushed 3 new commits to master: http://git.io/veP0d
<GitHub128>
migen/master 90c5512 Sebastien Bourdeauducq: genlib: remove cordic (will live in pdq2)
<GitHub128>
migen/master 8ce6839 Sebastien Bourdeauducq: mibuild/tools/write_to_file: use context manager
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<ccube>
when do I need LVTTL IOStandard and when LVCMOS33?
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<sb0>
ysionneau, i would think the correct procedure is to run the script starting with a fresh ise/vivado install, yes.
<ysionneau>
I think my explanation was unclear, I run the script with a normal ise install, but there was already a $PWD/opt/Xilinx which was the xilinx_ise_14.7_s3_s6.tar.gz from rjo
<ysionneau>
in order to end up with s3_s6_k7 and not just k7
* ysionneau
not sure how to say this clearly
<ysionneau>
rjo's script is supposed copy from /opt/Xilinx to $PWD/opt/Xilinx , normally the target is empty a priori ($PWD/opt/Xilinx does not exist). But in my case I started with a non empty $PWD/opt/Xilinx
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<ccube>
I am getting TypeError: Can not calculate bit length of <class 'migen.genlib.record.Record'> <Record 1:2:3:4:5:6:7:8 at 0x7ff959c9ce90> when trying to add a Tristate with 8 bit length to self.specials. where could the problem be?
<sb0>
probably something that has nothing to do with that tristate, unless it messes with records too
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* whitequark
sighs
<whitequark>
just wasted four hours because of if x: instead of if x is not None:
<rjo>
ysionneau: my tests were just with that tarball, generated for artiq_kc705. But overlaying (generating on top of the other tarball or unpacking on top of the other should be just fine. except for duplicate files.
<rjo>
i have a symlink as /opt/Xilinx so i need to change the prefix but that was it.
<rjo>
sb0: you should also remove the examples and the unittests if you remove cordic from migen.
<rjo>
sb0: and can i submit it to misoc? maintaining it in pdq2 and redpid and two other in-house projects is not a good idea.
<rjo>
migen-extras is also not the way to go imho.
<rjo>
there are a bunch of things in misoc that are useful outside the scope of a cpu-based soc.
<rjo>
last but not least florent's litescope iirc.
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<_florent_>
hi
<_florent_>
rjo, sb0: I'm not sure we should create too much repositories (migen-extra)
<_florent_>
Here is what I think about Migen/MiSoC:
<_florent_>
- Migen can provides very basic libraries to create logic (memory, fifo, fsm, records, etc...) build and simulate it.
<_florent_>
- MiSoC can provide infrastructure and cores to build a complete SoC. All cores that are generic enough (and not necessary related to bus, communication, ...)
<_florent_>
can live in).
<_florent_>
So for me putting cordic in MiSoC seems fine. (why not create a dsp topic?)
<_florent_>
(We can probably need cordic for others application than pdq2)
<_florent_>
Of course the idea is not for MiSoC to become a kind of OpenCores, but for that we can defines strict rules, for example:
<_florent_>
- avoid core duplication, if a user has a need that is not already covered by a core:
<_florent_>
1) if a similar core exists --> improve it or replace it with another one that provides old functionalities plus new ones.
<_florent_>
2) if a simular core does not exist --> we can add it but it has to respect all following points
<_florent_>
similar
<_florent_>
- provides simulation unit tests (for that we can use what rjo did for cordic)
<_florent_>
- add travis-ci that runs unit tests
<_florent_>
- before sending patches, user must run automatic unit tests:
<_florent_>
1) if OK --> we can merge it
<_florent_>
2) if KO --> if this is an expected result (patch provides some high impact changes) user then need to adapt all the code that is impacted
<_florent_>
otherwise, patch is rejected until unit tests are OK.
<_florent_>
If you want to limit MiSoC to SoC infrastructure, then we should create a cores repository (but only one) that contains all the cores we have and that is more focused
<_florent_>
on applications (video cores, litescope, cordic, ...). Migen/MiSoC MiCores or something like that, but I would prefer keeping only Migen/MiSoC.
* rjo
is happy with having _florent_ as a "bouncer" for misoc ;)
<GitHub169>
[misoc] enjoy-digital pushed 2 new commits to master: http://git.io/veDx9