sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<travis-ci> fallen/artiq#130 (flash_storage - 17df2b7 : Yann Sionneau): The build passed.
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<GitHub29> [artiq] sbourdeauducq pushed 3 new commits to master: http://git.io/vfsYw
<GitHub29> artiq/master a642a6b Yann Sionneau: conda: add recipe for pydaqmx
<GitHub29> artiq/master 979cd14 Yann Sionneau: pxi6733: add pydaqmx dependency + controller in entry points
<GitHub29> artiq/master 5413242 Sebastien Bourdeauducq: minor cleanups
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<travis-ci> fallen/artiq#129 (flash_storage - 2e63794 : Yann Sionneau): The build has errored.
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<travis-ci> m-labs/artiq#136 (master - 5413242 : Sebastien Bourdeauducq): The build passed.
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<GitHub159> [migen] sbourdeauducq pushed 3 new commits to master: http://git.io/vfs1q
<GitHub159> migen/master 6b59697 Alain Péteut: add Travis CI badge
<GitHub159> migen/master 7ec0eca Guy Hutchison: test: add test for asic_syntax
<GitHub159> migen/master e5b170f Guy Hutchison: travis: install verilator
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<travis-ci> m-labs/migen#12 (master - e5b170f : Guy Hutchison): The build passed.
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<GitHub43> [artiq] sbourdeauducq pushed 3 new commits to master: http://git.io/vfGtq
<GitHub43> artiq/master d5d49e7 Sebastien Bourdeauducq: runtime: fix user_kernel_state on UP
<GitHub43> artiq/master e4251c7 Sebastien Bourdeauducq: runtime: get lwip to run
<GitHub43> artiq/master 6a80944 Sebastien Bourdeauducq: runtime: increase packet buffer size
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<travis-ci> m-labs/artiq#137 (master - 6a80944 : Sebastien Bourdeauducq): The build passed.
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<travis-ci> fallen/migen#11 (conda - b375d10 : Yann Sionneau): The build has errored.
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<ysionneau> (that's normal)
<ysionneau> has anyone used Achronix FPGAs? They say their fabric can run @ 1.5 GHz :o
<ysionneau> oh RLDRAM3, I didn't know about that, SRAM like random access, with low latency and DDR3-like bandwidth
<cr1901_modern> It would've been nice if SRAM densities were so severely limited... last I checked, it takes nearly $300 to get 16MB of SRAM. That's like early 90's DRAM prices o.0;
<cr1901_modern> (to be fair, that price includes cost of labor to make boards as well- the raw cost is probably half of that)
<ysionneau> it seems you can have 1.15 Gb of LRDRAM3 from Micron, but dunno about the price
<ysionneau> RLDRAM3*
<cr1901_modern> weren't so* limited XD
<cr1901_modern> Ugh, BGA... out of the scope of my soldering skills
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<sb0> cr1901_modern, yeah, low volume = you pay through the nose
<cr1901_modern> I blame the Pi for making me think otherwise, tbh
<sb0> hahaha, totally true
<sb0> also the pi isn't low-volume, it's a smartphone soc
<cr1901_modern> i.e. it's possible to have all this memory and I/O for cheap. Sure, if you already have the capital and business deals with the company.
<ysionneau> =)
* cr1901_modern is getting sick of his modem going out to lunch
<cr1901_modern> That article hits home a bit. I like older boards/electronics precisely because they're more open and easier to service.
<sb0> it gets really cynical when people call the pi some great innovation platform. not only is it a blackbox, but also this sort of dirt-cheap device steals the oxygen of any computer project that doesn't ride on smartphone socs or similar...
<cr1901_modern> I used to think that, I don't think I agree anymore. It shouldn't take 700MHz to run a Unix either
<cr1901_modern> I can run it just fine at 50MHz- probably lower if I had the time to set up a board.
<sb0> bah. cpu resource usage waste has its advantage: it's easier to write straightforward and easy to maintain (but inefficient) programs using high level/interpreted languages and tons of libs
<cr1901_modern> Well yes, I'm not saying everyone should go back to assembly :P
<cr1901_modern> I'm probably just bitter b/c I'm not qualified to design 100MHz or above boards lol
<cr1901_modern> Hmmm, the person who added the minispartan platform used LVCMOS33 for all the IOpins, but the UCF says LVTTL. Is there any difference?
<cr1901_modern> (Well, functional difference)
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<sb0> yes, and it won't get better even if you were. GPUs do 7Gbps/pin single-ended with GDDR memory, whereas SERDES in modern FPGAs are 1Gbps or so
<sb0> (the transceivers are much faster, but they are differential, few, and cannot be used with SDRAM)
<sb0> and expensive, too.
<cr1901_modern> Great for companies with a lot of existing capital, not so much for hobbyists :/
<ysionneau> Achronix says they have 28 Gbps SerDes, don't know if that's marketing BS or not
<sb0> afaik achronix fpgas are very expensive, and difficult to source
<ysionneau> ah ok :/
<sb0> plus I'm willing to bet their design software is 10 times worse than ISE
<cr1901_modern> sb0: When adding a new platform to migen (as I'm currently doing), I am simply just reimplementing the UCF, correct?
<sb0> basically yes
<cr1901_modern> i.e. as long as the pins are correct, I don't need to use the same names as the "official" UCF
<sb0> no
<ysionneau> they are using Synopsys
<sb0> synopsys doesn't do the place-and-route
<sb0> and there's a technology-dependent part that needs to be written specifically for synopsys. if they contracted synopsys for developing it, I guess it should be halfway decent, but who knows
<ysionneau> yes they use their own P&R tool
<cr1901_modern> Actually, it seems that I have to use a preset set of names? I remember getting an error during a test run of MiSoC (MiniSoc subtarget for Papilio Pro) b/c "eth_clocks" doesn't exist.
<sb0> cr1901_modern, consistency is always good anyway
<cr1901_modern> I understand. The board I'm adding doesn't have anything not already implemented by another board anyway.
<cr1901_modern> I won't actually be able to test for another month, btw. I just suspect that my real life will become busy between then and now, and am doing the work I can ahead of time.
<sb0> "When will the first docker image appear which contains the Ask toolbar?"
<cr1901_modern> Wow, a sysadmin article without the word "systemd" in it o.0;
<cr1901_modern> (a bit scary that dependencies are so complicated that nobody knows how to build from scratch though)
<ysionneau> I asked for a quotation of the Achronix dev board : $13k.
<ysionneau> o-k.
<sb0> at least you got a quotation ;)
<ysionneau> yes now I can forward it to my bank :p or start a kickstarter
<ysionneau> anyway, it was just me beign curious about the price
<ysionneau> being*
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<larsc> still pretty affordable, its on the same order of magnitude as some of the higher end xilinx boards
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<sb0> lwip is pretty annoying to work with
<sb0> it almost feels like symbian programming
<sb0> for some reason it loves to calls your callback functions with broken pointers after you have closed the connection ...
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<sb0> first kernel run over ethernet :) with a number of bugs still
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<ysionneau> \o/
<ysionneau> nice
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<travis-ci> fallen/artiq#131 (flash_storage - ab007cb : Yann Sionneau): The build passed.
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<ysionneau> see you, gn8!
<kristianpaul> bye
<kristianpaul> :p
<ysionneau> bye!
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