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<Zorix> i know theres a soylent red.. the book i think explains it more but i havent read it.. its on my to read list though
<awygle> There's also a soylent yellow in the book but I don't think we ever find out what the other two are made of
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<awygle> Placer tool question - what operating systems do we need to support? (for both host and workers)
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<awygle> Currently using pthreads and bsd sockets and not really trying to be cross platform beyond that. I
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<rqou> hope midipix eventually gets good enough to support that?
<rqou> how much do you rely on pthreads semantics?
<rqou> e.g. interaction with signals, cancellation, etc.?
<rqou> can you get away with plain c++ thread support?
<awygle> oh right C++ has threads now
<awygle> the answer to your questions are "eh, not at all, yes"
<awygle> in order
<awygle> legitimately didn't occur to me
<awygle> i was more thinking about the networking though. really i was considering using "sendmmsg" but that's linux-y
<cr1901_modern> BSD sockets are completely nonsupported except for TCP/IP (yes yes midipix I know)
<cr1901_modern> And even then, Winsock doesn't _quite_ match up w/ what *nix does
<awygle> no SOCK_DGRAM? :(
<azonenberg> awygle: Use libxptools
<azonenberg> on my github
<azonenberg> it had a threading library before C++ added one
<azonenberg> and currently has a cross platform socket lib
<azonenberg> In general i would target recent Linux exclusively
<azonenberg> if it runs on debian 8 and newer we should be good
<azonenberg> Dont go out of your way to use POSIX-isms if you can avoid it
<azonenberg> But dont bend over backwards to support windows
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<awygle> wtf is the point of a Portable Operating System Interface X if it's not actually portable. grumble grumble.
<cr1901_modern> awygle: Quite simply, b/c they think *nix is the One True OS
<azonenberg> lol
<azonenberg> to be fair its portable across bsd, linux, osx, irix, solaris...
<azonenberg> Just not windows
<awygle> has anybody actually played with WSL in a non-trivial way?
<awygle> i don't really plan to, just curious
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<qu1j0t3> hey, was anyone here looking for probable counterfeits? This is a $25 Burr-Brown active filter chip. http://www.ebay.ca/itm/UAF42AP-PDIP-14-IC-UNIVERSAL-ACTIVE-FILTER-/322563133413?hash=item4b1a42cfe5:g:K38AAOSwIjJZSdsc
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<mithro> Bunch of stuff there
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<rqou> "This message was not sent to Spam based on your organization's request." <-- why is this possible?
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<azonenberg> rqou: so you're saying berkeley has the ability to force messages to not be marked as spam
<azonenberg> even if you wanted them to be?
<rqou> i think every gapps organization can do this
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<bibor> D
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<openfpga-github> [yosys] azonenberg pushed 1 new commit to master: https://git.io/v5HiS
<openfpga-github> yosys/master 7d42afd Andrew Zonenberg: Fixed bug where counter extraction on non-GreenPAK devices incorrectly handled parallel counter output
<rqou> hey oeuf (or anybody else): can i get some math help?
<oeuf> rqou: sure
<rqou> i have no intuition whatsoever how this formula is supposed to work: https://i.imgur.com/MyieZvS.png
<rqou> i can't even figure out what this is called
<rqou> got a simple way of explaining it? :P
<oeuf> rqou: yay rotations
<rqou> yay i suck at rotations :P
<oeuf> everyone does
<rqou> which is weird, because i seem to understand the more abstract parts of linear algebra just fine
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<oeuf> rqou: I just got back home, so I'm not going to look at that immediately; maybe ask bofh in #kspacademia (espernet) in the meantime, he can probably give a clearer answer than I can anyway
<openfpga-github> [yosys] azonenberg created counter-extraction-fixes (+6 new commits): https://git.io/v5HPK
<openfpga-github> yosys/counter-extraction-fixes c4a70a8 Andrew Zonenberg: Fixed typo in comment. Fixed bug where extract_counter would create up counters when it meant to create down counters.
<openfpga-github> yosys/counter-extraction-fixes a84172b Andrew Zonenberg: Initial support for extraction of counters with clock enable
<openfpga-github> yosys/counter-extraction-fixes 0484ad6 Andrew Zonenberg: Added support for inferring counters with active-low reset
<rqou> alright, i'll try that
<rqou> why does everybody seem to have a different idea how to do rotations?
<cr1901_modern> I've never seen that matrix before. In fact, I don't remember the last time I had to raise "e" to a matrix power
<oeuf> matrix exponentials are fun!
<cr1901_modern> I would call substituing a matrix in for a Taylor series "fun"...
<cr1901_modern> Additionally, the linked page says 4x4... that looks like 2x2
<openfpga-github> [yosys] azonenberg pushed 1 new commit to master: https://git.io/v5HX2
<openfpga-github> yosys/master e558f00 Andrew Zonenberg: Minor changes to opt_demorgan requested during code review
<openfpga-github> [yosys] azonenberg pushed 1 new commit to opt_demorgan: https://git.io/v5HXw
<openfpga-github> yosys/opt_demorgan 66e8986 Andrew Zonenberg: Minor changes to opt_demorgan requested during code review
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<awygle> Yeah that was interesting. Especially since I'm pretty sure they're fabless
<azonenberg> Lol
<azonenberg> Because the chinese government *totally* can't mess with ' get data out of TSMC
<shapr> suuure
<azonenberg> to be fair hdl is more useful
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<pie_> if i have a one pixel wide green line on my vga lcd monitor going vertically in the middle of it, is that fixable?
<pie_> :O found a pretty detailed service manual
<azonenberg> sounds like a shorted bitline in the panel
<pie_> ....is that fixable :x
<azonenberg> Got a FIB? :p
<pie_> no...
<rqou> can FIBs handle ITO?
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<pie_> heres a curl for the manual since its some shitty nondirect link:
<pie_> curl 'https://elektrotanya.com/cgi-bin/download2.cgi' -H 'Host: elektrotanya.com' -H 'User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:54.0) Gecko/20100101 Firefox/54' -H 'Referer: https://elektrotanya.com/hyundai_b70a_b71a_b90a_b91a_m17a_m17b.pdf/download.html' -H 'Content-Type: application/x-www-form-urlencoded' --data 'fid=50306&file=hyundai_b70a_b71a_b90a_b91a_m17a_m17b.pdf'
<pie_> im a B90A
<pie_> im looking at the instructions and its still impossible to get the front cover off though
<balrog> pie_: does that bypass the limits?
<pie_> no?
<balrog> the 2 per day limit
<balrog> I believe that's cookie enforced
<balrog> pie_: also something that's really funny about that site... unauthenticated users get more downloads per time period than authenticated
<pie_> lol...
<balrog> and to get an account you have to pass an electronics test
<balrog> lol
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<pie_> lol :D
<pie_> oh god the tabs on this thing...no fucking wonder i couldnt get it
<pie_> the tabs on this thing are huuuuge
<rqou> use guitar picks :P
<pie_> ...finally manage to open it now i cant find the psu...
* pie_ flails helplessly
<pie_> my mom wont stop touching my junk :(
<rqou> lewd :P
<pie_> :P :(
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<azonenberg_work> rqou: bw
<azonenberg_work> btw*
<azonenberg_work> recover_adder is being funky on the uart
<azonenberg_work> it finds a bunch of half adder/subtractor cells
<azonenberg_work> but no fulls, and cant seem to see the adders that i think are there
<azonenberg_work> havent gone far enough to figure out whats up
<rqou> blame abc?
<azonenberg_work> lol
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<rqou> btw, working on problem sets right now, so i'm not going to look at it
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<azonenberg_work> I think it might be a different encoding of the adder that i'm not used to seeing
<azonenberg_work> Will investigate more
<azonenberg_work> We definitely need to work on improving traceability through all of these conversions
<rqou> traceability? with abc?
<rqou> :P
<rqou> i guess this is one advantage of clifford's not-yet-working extract_fa
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<rqou> actually no
<rqou> that still requires abc
<pie_> how is it that out of two 12V psus i can not find a single one...
<balrog> rqou: why is abc so hated?
<rqou> it's not hated
<rqou> but it's pretty impossible to tell what abc did to your circuit
<rqou> other than "yes, it is equivalent"
<awygle> The code quality is generally regarded as not great as well, right? I have the impression that abc is hard to work on
<balrog> rqou: sounds roughly similar to skeinforge
<balrog> if anyone has dabbled with that stuff......
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<azonenberg_work> rqou: Soo
<azonenberg_work> Does the TX side of my UART fit in an xc2c32a?
<awygle> So what's the deal with abc and XOR?
<azonenberg_work> if so i'd be interested in seeing that
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<openfpga-github> [yosys] azonenberg pushed 3 new commits to master: https://git.io/v5Hp3
<openfpga-github> yosys/master b0b2f3f Clifford Wolf: Merge pull request #410 from azonenberg/opt_demorgan...
<openfpga-github> yosys/master 498526c Clifford Wolf: Merge pull request #411 from azonenberg/counter-extraction-fixes...
<openfpga-github> yosys/master 2dc9560 Andrew Zonenberg: Merge branch 'master' of https://github.com/cliffordwolf/yosys
<openfpga-github> [yosys] azonenberg deleted opt_demorgan at 66e8986: https://git.io/v5Hpc
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<azonenberg> rqou: is there a reason you changed -Os to -O0 in the makefile?
<azonenberg> Or was that unintentional
<rqou> oops, didn't mean to commit that
<azonenberg> Can you fix that?
* azonenberg is just doing a periodic review of diffs between his fork and master
<azonenberg> May want to rebase again at some point, but prob not until after the con (i dont need that hassle right now)
<openfpga-github> [yosys] azonenberg created reduce-fixes (+1 new commit): https://git.io/v5HhC
<openfpga-github> yosys/reduce-fixes ab1bf8d Robert Ou: extract_reduce: Fix segfault on "undriven" inputs...
<lain> azonenberg: looking for the NSA backdoors? ;)
<azonenberg_work> Lol
<azonenberg_work> Actually, mostly looking to see what work i should make pull requests for
<azonenberg_work> Previously i'd work on one feature at a time and submit a PR for my whole repo as needed
<azonenberg_work> but now i'm doing more active development on multiple features at once
<azonenberg_work> all in master since i use them all at once in my research
<azonenberg_work> then as various subsystems reach some level of stability, I create an ex-post-facto feature branch, cherry-pick the relevant commits, and send that upstream for merging
<jn__> [slightly OT] hmm, this sandsifter talk is nice
<openfpga-github> [yosys] azonenberg created extract_bus (+2 new commits): https://git.io/v5Hhb
<openfpga-github> yosys/extract_bus 0171c18 Andrew Zonenberg: Cleaned up some dead code
<openfpga-github> yosys/extract_bus 74d4435 Andrew Zonenberg: Initial version of extract_bus pass
<openfpga-github> [yosys] azonenberg pushed 1 new commit to extract_bus: https://git.io/v5Hje
<openfpga-github> yosys/extract_bus 101491d Andrew Zonenberg: Merge branch 'master' of https://github.com/cliffordwolf/yosys into extract_bus
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<openfpga-github> [yosys] azonenberg pushed 2 new commits to master: https://git.io/v5QJ2
<openfpga-github> yosys/master ce78717 Clifford Wolf: Merge pull request #412 from azonenberg/reduce-fixes...
<openfpga-github> yosys/master 7d1c4eb Andrew Zonenberg: Merge branch 'master' of https://github.com/cliffordwolf/yosys
<openfpga-github> [yosys] azonenberg deleted reduce-fixes at ab1bf8d: https://git.io/v5QJw
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<pie_> qu1j0t3, see above
* qu1j0t3 nod
<pie_> oh right i forgot youre in the other chan
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