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<cyrozap-ZNC> rqou: Don't LFSRs use a bunch of chained XORs?
<cyrozap-ZNC> Oh, dangit, my ZNC bouncer didn't reconnect with the right nick, brb.
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<awygle> whether they're "chained" or not depends on whether they're fibonacci or galois LFSRs
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<sn00n> huhu
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<rqou> whitequark are you back in RU?
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<sn00n> how do you decap chips in "modern" epoxy packages?
<sn00n> with HNO3?
<sn00n> and whats the best way for "flipchip" with underfill resin between the dice and the interposer?
<sn00n> lapping the backside thin as possible?
<sn00n> are there any state of the art tuts? ^^
<whitequark> rqou: ye
<sn00n> and if gaining access from the backside, what are proper imaging methods?
<sn00n> you guys must know!1 :(
<sn00n> the only method i tried up to now is droping the complete package in HNO3 and wait ... but that's not really a in situ/in vivo approach, right? ^^
<sn00n> maybe wrong channel?
<Morn_> good question
<Morn_> depends what you want to do.. do you just want to take pictures or have the chip running while decapped?
<sn00n> both would be best
<sn00n> dissolving the package in HNO3 method was only an attempt to make some pics
<sn00n> i know, if i want to make proper delayering and stuff like that, i've to kill the dice for "layer by layer" dissection
<Morn_> yeah i think you could try to manually add some new bond wires with one of those bonding machines XD
<sn00n> but for that i need to fix a lapping machine und build a plasma etcher
<sn00n> yeah, bonding machines!11
<Morn_> :D maybe wait for 30 years until they sell plasma etchers and bonding machines at every walmart for cheap
<sn00n> good idea
<Morn_> no seriously i think regular wire bonded chips must be much easier ;)
<sn00n> yeah, the internet says, that you need to mill a pocket and then mask the pocket a bit and place the package in your HNO3 streaming system
<sn00n> (i know, you don't need the pocket, but it's faster since its reduces the amount of expoy to be etched away)
<Morn_> what is a hno3 streaming system
<sn00n> i mean such a system
<Morn_> wow cool
<sn00n> there is an old defcon talk about DIY such a system
<sn00n> "Decapinator"
<Morn_> :D
<sn00n> but i dunno if that's "the best universal way to do it all!"
<Morn_> i read the book "hardware hacker" from bunnie huang and he described how he managed to decap a chip by first milling a pocket and then dropping one drop of hno3 on top of it
<Morn_> the chip still worked after that
<sn00n> yes, that i saw in a "applied science" video
<Morn_> what chip do you want to decap?
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<sn00n> Morn_: all i can get :)
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<whitequark> one drop of HNO3, some luck with a chip...
<whitequark> wouldnt work with copper bond wires
<whitequark> or pads or w/e it is, most of the time I decap with HNO3 there are no bond wires attached and the solution is green, so there was copper somewhere
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<sn00n> whitequark: ok, so there is no "best decapping" technique which preserves the functionality of the chip, right?
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<sn00n> whitequark: and most chips with bonding wires are using copper, or?
<sn00n> most _modern_ chips i mean
<sn00n> whitequark: do you think rebonding would be possible?
<sn00n> modern packaging style is mostly flipchip with bumps directly on the PCB or on an interposer, correct? except MEMS or fancy analog stuff?
<Morn_> i think normal bonding outnumbers flip chips
<sn00n> Morn_: hm ok
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<qu1j0t3> #OTD in 1958 the world's 1st working integrated circuit
<qu1j0t3> was demonstrated by Jack Kilby https://t.co/HjF14uiEVR
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<azonenberg> sn00n: If you use equal parts of strong (>70%, WFNA preferred) HNO3 and concentrated H2SO4
<azonenberg> copper bond wires normally survive
<azonenberg> Mill a cavity with a dremel if its a small chip (not necessary for a thin/fat thing like a TQFP)
<azonenberg> put it on a hot plate, add a drop of acid over the die, let it react (but not dry up completely, you want there to be liquid remaining)
<azonenberg> remove with tweezers, swish it around in a beaker of acetone
<azonenberg> repeat as necessary
<azonenberg> Obviously you want to be doing this in a fume hood etc
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<sn00n> azonenberg: ok, i'll try
<sn00n> azonenberg: and how about flip chip devices? i mean, how remove the underfill (if underfill resin is used to glue the dice on the interposer)
<sn00n> azonenberg: or is the only way backthining via lapping & wet or plasma etching?
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* azonenberg_work continues working on slides
<azonenberg_work> i think they're turning out pretty nice
<azonenberg_work> Results are definitely not as complete as i wanted them to be, but still decent
<azonenberg_work> and leaves plenty of room for follow-up work at REcon
<sn00n> cool
<azonenberg_work> grr wut
<azonenberg_work> i didnt push opt_demorgan last night
<azonenberg_work> i wanted to send a PR today but i'm already on my way to work
<azonenberg_work> Welp
<azonenberg_work> Not like i dont have other stuff to do today
<sn00n> sad
<sn00n> azonenberg_work: ok, i'll try
<sn00n> azonenberg_work: and how about flip chip devices? i mean, how remove the underfill (if underfill resin is used to glue the dice on the interposer)
<sn00n> azonenberg_work: or is the only way backthining via lapping & wet or plasma etching?
<azonenberg_work> Front side decap on a flip chip will destroy the package
<azonenberg_work> and render it unable to be PCB mounted
<azonenberg_work> if you need the chip alive, you will want to go backside
<azonenberg_work> Backside attacks are currently on my TODO list to play with
<azonenberg_work> i have a few 8-bit PICs i've wanted to play with, i dremeled up the bottom of the package and havent yet gone further
<azonenberg_work> plan was to see if i could use a TMAH based wet etch to back-thin the die
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<azonenberg_work> If you just want a bare die from a flip chip, dunk the whole thing in nitric and cook it
<azonenberg_work> you'll be left with a bare die with solder balls on the front
<sn00n> ok, so it's worth a try, nice
<azonenberg_work> You can usually remove the solder balls from the UBM by gentle swabbing with a lint-free microfiber cloth
<azonenberg_work> although there is a chance you will scratch the die or leave a crater when the bump pulls off
<azonenberg_work> i had good results with some pentium 4 dice doing this
<azonenberg_work> not actually sure how they were decapped
<azonenberg_work> i bought them a bare dies with bumps on them from some random place online
<azonenberg_work> If you get a swab with some IPA or something and wipe it'll snag the balls and rip them free
<azonenberg_work> just keep using new swabs so you arent smearing bumps across the die and scratching it
<sn00n> yeah, i use such "clean room" cloths
<sn00n> for wiping clean stuff in general
<azonenberg_work> Yeah
<azonenberg_work> i use them for everything from de-fluxing PCBs to cleaning firearms
<azonenberg_work> i also like the swabs
<azonenberg_work> Puritan Medical #3130 is my current favorite
<azonenberg_work> idk if they're cleanroom rated but they're non-linting microfiber
<awygle> How expensive are they? I hate my current solution
<sn00n> dunno 1 cent?
<sn00n> if you buy 10000+
<sn00n> but i'm not sure :)
<sn00n> azonenberg_work: i want a gun too!
<sn00n> europe >_>
<azonenberg_work> Boat is docking, back in a few
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<rqou> apparently apple is announcing things?
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<jn__> yep. new iphones and stuff
<balrog> rqou: yep
<rqou> and it's named X?
<balrog> new iphones withoput imgtec
<rqou> making cirno sad?
<balrog> without*
<rqou> wait what
<balrog> yep, 8/8+/X have apple-designed GPUs
<rqou> what did it get replaced by?
<awygle> No iPhone circle-9 for rqou
<balrog> rqou: apple's own designs
<rqou> really? i thought those were imgtec-derived
<balrog> nope, but imgtec claims they are
<balrog> (and has put out angry press releases)
<balrog> might take a court to figure out
<rqou> i can believe both claims actually
<rqou> according to libv at least the old imgtec gpus are very flexible and customizable
<balrog> yeah, but they also wanted to stop paying royalties, and imgtec probably wanted too much for a buyout
<balrog> aiui last year's were a combination of imgtec tech and apple tech, for different aspects
<rqou> hmm, anybody want to cosplay as a cute alchemist and get some insider information? :P :P
<rqou> hmm, actually maybe i shouldn't have said that
<rqou> idk if this association is public knowledge, oops
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<qu1j0t3> i can't decode all the references involved, i wouldn't worry
<jn__> i think i know what rqou is implying, but i've only read twitter
<jn__> pie_: yo
<pie_> o/
<pie_> sup
<jn__> pie_: last week, i've read about one quarter of the ANSI Forth standard :)
<pie_> thats good i guess? :P
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<jn__> pie_: the reason being that i want to do something cool with my rather limited (16KiB RAM) RISC-V board, and implementing forth seems like an interesting exercise
<pie_> im running around doing random "useless" crap most of the day, so nothing interesting from me :/
<pie_> good luck :D
<pie_> jn__, you need to implement http on it so you can download more RAM
<jn__> ;D
<pie_> hmm, i might have just thought of a code golf question: whats the minimum amount of ram you need to download more ram
<jn__> depends on whether you're using a half-reasonable definition (swapping over network) or a fictional defintion (which is much better than the other option) of downloading more ram
<extrarius_guest> a code golf question involving ram would be interesting. I'm tired of seeing winners being languages made specifically for the obscure operations often requested in code golf challenges. If they had to include interpreter size (oreven compile the 1 character into the huge amount of machine code it equates to), it would be much more interesting
<rqou> do i win if i use an HDL and use no ram at all?
<pie_> :D
<pie_> extra points for gratuitious cheati-i mean thinking outside the box
<pie_> thats the wrong word for that actually
<awygle> Presumably you'd use _some_ ram, even if it's SRAM
<rqou> does distributed ram count?
<awygle> Also I'm reminded of a tweet about "thinking he'll implement a tcp stack in verilog over a weekend"...
<rqou> *cough* *cough* azonenberg_work
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<pie_> heh
<awygle> Ugh. My body metabolizes dental anesthetics so poorly. I should have just called in sick today lol
<pie_> 0_o
<pie_> you dont mean local anasthetic right?
<awygle> I do mean locals yes. Lido and carbo in this case
<qu1j0t3> it's a lot to process :/
* pie_ scratches head
<pie_> huh.
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<azonenberg_work> awygle: I never said i would implement a TCP stack over a weekend
<azonenberg_work> I have done most of TCP, although i want to redo it and make it cleaner
<azonenberg_work> and i intentionally omitted a lot of seldom-used features as well as client support (it was server only)
<awygle> rqou tweeted something ascribing such base motives to you a while back
<awygle> My comment was more "glass houses" than anything else
<awygle> yak_queue.enqueue(language server for verilog, VHDL)
<rqou> language server?
<azonenberg_work> rqou: ice40lp1k imaging run kicked off
<azonenberg_work> ETA 10 hours
<azonenberg_work> so i'll probably grab it tomorrow after work
<azonenberg_work> this is top metal only at i think 50x objective
<rqou> wait wait what
<rqou> you have an auto-imaging setup?
<rqou> or is this at IOA?
<rqou> also, lp? not hx?
<awygle> azonenberg_work: do you have / are you interested in imaging any of the unsupported ice40s? Ultra/UltraLite/UltraPlus?
<rqou> i thought adafruit or somebody was paying somebody to RE those?
<rqou> azonenberg_work: i fixed your segfault on reduce
<openfpga-github> [yosys] rqou pushed 1 new commit to master: https://git.io/v5DPo
<openfpga-github> yosys/master 2ef47a6 Robert Ou: extract_reduce: Fix segfault on "undriven" inputs...
<azonenberg_work> This is at IOA
<azonenberg_work> and it might be a HX
<azonenberg_work> let me check
<rqou> goddammit when are you going to image my coolrunners? :P
<azonenberg_work> These are LP
<azonenberg_work> Is that not the one icestorm supports?
<azonenberg_work> This is something that showed up in a box from digikey, i forget who boughti t to me
<rqou> icestorm supports both iirc
<azonenberg_work> And now that i kinda-sorta have access to decap stuff
<azonenberg_work> and image stuff
<rqou> i don't even know how lp and hx differ other than packaging
<azonenberg_work> i'm gonna try and churn through my queue as long as i can justify it as being somewhat work related
<azonenberg_work> i.e. no random fun stuff but anything related to FPGA RE is probably going to happen in the not too distant future
<azonenberg_work> I might even get the coolrunners decapped tomorrow, although i wont be imaging them for a bit
<azonenberg_work> i have the ice40lp4k to do first
<azonenberg_work> and each one takes like a whole day to run
<rqou> what
<rqou> why?
<rqou> also, have you tried jtag-probing my coolrunners yet?
<azonenberg_work> massive numbers of photos
<azonenberg_work> No, i havent
<azonenberg_work> i was going to decap one of each
<azonenberg_work> assuming they were the same as each other
<rqou> they aren't necessarily
<rqou> welcome to china
<azonenberg_work> then save the other for live analysis
<rqou> please jtag-poke both first?
<azonenberg_work> and the breakout pattern looked the same
<azonenberg_work> i'll try to poke them tonight
<rqou> no, i want to see if they're locked and/or have bitstreams in them
<azonenberg_work> If i cant find time i'll decap them later
<rqou> oh, for your icestorm uart
<azonenberg_work> yeah?
<rqou> do you _just_ want the uart, with all signals on pins?
<azonenberg_work> Yes
<azonenberg_work> just the TX path
<azonenberg_work> float all the RX lines
<awygle> Icestorm supports lp and hx but not ul, up, or the "ice5lp" ultras
<awygle> Not sure about the ice5lps actually but sure on the rest
<rqou> that should be easy though
<awygle> What's the actual value for FuseSoC? I don't really understand what you gain by using it...
<rqou> huh, first time i heard of it
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<rqou> azonenberg_work: here's your UART: https://gist.github.com/rqou/e8f0b254bda0ffb59ced7d33da0772e8
<azonenberg_work> rqou: well xdot is still processing... :p
<azonenberg_work> ok ehre we go
<rqou> i hate xdot
<azonenberg_work> its not quite as huge as i was worried it would be
<azonenberg_work> We need a better viewer by REcon time
<rqou> i was reminded the other day that gephi is much better at large graphs
<azonenberg_work> ideally one thats interactive and lets you move stuff around
<rqou> gephi does that
<azonenberg_work> Can it open graphviz files?
<azonenberg_work> Also you know what we dont have rightnow? Mux extr5action
<azonenberg_work> Mux extraction*
<rqou> doesn't yosys already have that?
<azonenberg_work> From netlists? i dont know
<azonenberg_work> havent seen any $mux cells that i can remember
<rqou> hmm, gephi can't read these dot files
<rqou> it doesn't support record nodes
<azonenberg_work> So we need a converter of some sort?
<azonenberg_work> oh
<azonenberg_work> Hmm thats kinda important
<rqou> i'm not going to work on gephi though
<rqou> it's java
<rqou> and weird
<azonenberg_work> eeew
<rqou> it loads the graph without taking 20+ minutes though
<azonenberg_work> posted in 2011
<rqou> afaict gephi comes from "that weird part of 'CS'" that is doing data science
<rqou> or other "scientific" work
<rqou> let's just say that that part of CS is quite separated from EDA
<rqou> :P
<azonenberg_work> lol
<rqou> CS is pretty big
<rqou> EE is even more ridiculously big
<azonenberg_work> If we have to write our own visualization tool, so be it
<azonenberg_work> I'm kinda assuming we will have to do that eventually down the road
<rqou> i'm not making fun of data science people
<rqou> it's just that they're quite overshadowed by things like web apps
<azonenberg_work> because i eventually want the ability to cross-probe between decompiled HDL, graph-based schematic, and either a FPGA/CPLD floorplan or ASIC die photos
<azonenberg_work> and then move nodes across hierarchy, etc
<azonenberg_work> assign names to nets
<azonenberg_work> this will likely need a full custom tool
<azonenberg_work> probably heavy C++ with OpenGL rendering engine
<rqou> no WASM/WebGL?
<rqou> i want to be able to RE chips on my fridge :P
<azonenberg_work> I am not loading a multi-GB netlist in javascript
<azonenberg_work> :P
<rqou> you totally can btw
<rqou> iirc the max size is 2^31 items
<azonenberg_work> yes but oevrhead...
<azonenberg_work> also 2 billion nets might not be enough for a large chip
<rqou> what do you mean overhead?
<rqou> it's pretty minimal
<azonenberg_work> dont js objects have all kinds of reflection metadata?
<azonenberg_work> i assume at least like 16 bytes per object
<rqou> oooh
<azonenberg_work> probably a lot more
<rqou> no, i was thinking of WebGL typed arrays
<azonenberg_work> now multiply that by a billion objects
<azonenberg_work> this isnt just rendering
<azonenberg_work> we have to be able to manipulate the netlist
<rqou> you can manipulate WebGL typed arrays
<rqou> that's how asm.js works
<rqou> it creates a giant array of uint8 called HEAP
<rqou> i take it you can understand what happens from there :P
<rqou> ok, i just tested
<rqou> the largest webgl typed array i can create is 2GB-2 bytes
<rqou> and yes, you can create more than one
<rqou> azonenberg_work: does "clean" not get rid of wire names in yosys the way you want?
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<rqou> alternately, "clean -purge"
<awygle> isn't that basically what SigMap is for? I guess you'd have to disconnect all the other wires, but still
<azonenberg_work> awygle: that is what i want
<azonenberg_work> i want to get rid of everything else
<azonenberg_work> rqou: i already opt_clean -purge
<azonenberg_work> it doesnt get rid of them
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<rqou> idle thought: i wonder how many people have a oe1cxw QSL card? :P
<rqou> has clifford ever sent any out?
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<mithro> So, I'm in the US! Apparently a bunch of you go to digshadow's meetup group which is running tomorrow? (rqou)
<rqou> yes
<rqou> 7 pm in mountain view
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<mithro> rqou: Cool, if nothing throws a spanner in the works, I'm planning on being there
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