<lain> whoa
m_t has quit [Quit: Leaving]
clifford has quit [Ping timeout: 248 seconds]
pie_ has quit [Ping timeout: 252 seconds]
digshadow has quit [Ping timeout: 240 seconds]
_whitelogger has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 260 seconds]
* azonenberg needs that new desktop soon
<azonenberg> i'm starting to get "fork failed: cannot allocate memory"
<azonenberg> when i run commands in vivado
<azonenberg> I don't have THAT many things open...
* azonenberg notes something surprising
<azonenberg> xfce4-volumed is using 11% of my RAM
<azonenberg> Well that will free up a bit, lol
<azonenberg> But i still can't use my windows VM without closing vivado...
ZipCPU|Laptop has joined ##openfpga
ZipCPU|Laptop has quit [Remote host closed the connection]
digshadow has quit [Ping timeout: 240 seconds]
digshadow has joined ##openfpga
<cr1901_modern> azonenberg: What's the policy for "shameless self promotion" in this channel (sparingly, never, encouraged)?
<azonenberg> of what sort?
<cr1901_modern> See DM
<cr1901_modern> Okay, thanks: https://twitter.com/cr1901/status/912491635052892161 This is a blog post about porting a new FPGA board to use Migen. Also is a quick intro to Migen as well
<cr1901_modern> Hope it is useful to some people in here
<awygle> cr1901_modern: cool, will definitely check this out
<cr1901_modern> awygle: Tyvm :)
<azonenberg> cr1901_modern: re-replying here just so the whole channel can see
<azonenberg> In general, posting any material related to open source FPGA tools, at any level (from HDLs/synthesizers down to bitstream twiddling) is considered on topic
[X-Scale] has joined ##openfpga
mtp_ has joined ##openfpga
waylon531 has joined ##openfpga
X-Scale has quit [*.net *.split]
sunxi_fan has quit [*.net *.split]
mtp has quit [*.net *.split]
specing has quit [*.net *.split]
uelen has quit [*.net *.split]
mtp_ is now known as mtp
mtp has quit [Changing host]
mtp has joined ##openfpga
[X-Scale] is now known as X-Scale
specing has joined ##openfpga
digshadow has quit [Quit: Leaving.]
fpgacraft1 has quit [Quit: ZNC 1.7.x-git-709-1bb0199 - http://znc.in]
fpgacraft1 has joined ##openfpga
digshadow has joined ##openfpga
<azonenberg> lol i saw it
<rqou> azonenberg: so i just decided to take a peek at the tegra TRM
<rqou> now i understand why you are interested in systems that had security designed in from the start rather than bolted on
<azonenberg> oh?
<azonenberg> lol
azonenberg_work has quit [Ping timeout: 246 seconds]
<lain> rqou: so which category does the tegra fall under? :P
<rqou> tegra is definitely the "bolted on" category
<lain> ha
<rqou> or maybe "check the box security"
<rqou> ☑️ TrustZone
<rqou> ☑️ SMMU
<rqou> approved!
pie_ has joined ##openfpga
<pie_> <qu1j0t3> NVIDIA releases an open-source Deep Learning Inference
<pie_> <qu1j0t3> chip design (based on Xavier), with full verilog source:
<pie_> "fuck we're up against google, might as well"
<pie_> jk lol i dunno
sgstair_ has joined ##openfpga
sgstair has quit [Disconnected by services]
sgstair_ is now known as sgstair
<whitequark> rqou: thats not genome
<whitequark> thats raw reads
<whitequark> you still need to assemble it into an actual genome
<whitequark> what i had done is called "shotgun sequencing"
<rqou> yeah, i figured that out eventually
<whitequark> basically you take DNA, cut it into lots of pieces at random and sequence the pieces
<rqou> i have no idea what to do next other than "yeah, this is a popular CS problem"
<whitequark> balrog: cost is under NDA i think
<rqou> and "*mumble* *mumble* cross-correlation"
<whitequark> but let's say it was about a monthly salary of a programmer in EU
<rqou> that's still a little bit cost-prohibitive for many people though
<rqou> no "full genome sequence just for lulz" just yet
<sn00n> what's the monthly salary of a programmer in the EU?
<sn00n> btw, not on topic but ... what are currently the lowest power ARM SoC? (i mean small ones like Cortex-M3/0 .. based)
<sn00n> those Analog Devices' ADUC302x thingies?
m_t has joined ##openfpga
<cr1901_modern> whitequark: So why can't I create an bunch of whitequarks?
<pie_> because thats racist
egg|zzz|egg has quit [Ping timeout: 264 seconds]
<whitequark> rqou: balrog: no that was on discount
<whitequark> the *real* cost is at least six times that
<whitequark> if not eight
_whitelogger has joined ##openfpga
clifford has joined ##openfpga
pie_ has quit [Ping timeout: 240 seconds]
enriq has joined ##openfpga
pie_ has joined ##openfpga
pie_ has quit [Ping timeout: 255 seconds]
gnufan1 has joined ##openfpga
gnufan has quit [Ping timeout: 248 seconds]
<balrog> whitequark: is that including assembly and all?
<balrog> :P
pie_ has joined ##openfpga
pie_ has quit [Ping timeout: 240 seconds]
sgstair_ has joined ##openfpga
sgstair has quit [Disconnected by services]
sgstair_ is now known as sgstair
pie_ has joined ##openfpga
enriq_ has joined ##openfpga
enriq_ has quit [Remote host closed the connection]
<whitequark> balrog: no, I decided to do assembly myself
<whitequark> it's reallly not hard, and I studied bioinformatics formally
pie_ has quit [Ping timeout: 240 seconds]
pie_ has joined ##openfpga
<awygle> sn00n: http://ambiqmicro.com/apollo-ultra-low-power-mcu/apollo2-mcu-20170703/ maybe? Haven't done the research but the ad copy sounds cool
<sn00n> awygle: thx
<sn00n> whitequark: found pi in your genome?
<azonenberg> So my Rigol rack kit shipped yesterday apparently
<azonenberg> LeCroy LA probe and rack kit won't ship until 10/10
<azonenberg> and the PSU + rack kit are backordered until 11/22
<azonenberg> Guess i won't be getting my nice test rack for a while
<sn00n> so rigol first
<sn00n> what's part of the rigol rack kit?
<azonenberg> Its just ears for my old 100 MHz DSO
<azonenberg> and a front panel
<azonenberg> plate*
<azonenberg> i figured if i was racking my other test gear i might as well rack that thing too, it's not in as bad shape as i thought
<azonenberg> mostly just obsolete
<balrog> whitequark: https://www.abmgood.com/Whole-Genome-Sequencing-Service.html that doesn't sound too expensive :p
<balrog> (well for the value one could get out of it)
<sn00n> ah ok, a mounting kit
<sn00n> i should by a cool rack too
<azonenberg> sn00n: Yeah i have a 16U rack on my desk now
<azonenberg> right now it's just a PDU, then my lecroy dso is just kinda sitting on the base plate
<azonenberg> once all the stuff gets in there will be two 2U half-width PSUs side by side at the bottom
<azonenberg> then a 1U BNC patch panel
<azonenberg> then the lecroy, then the rigol, then the PDU
<azonenberg> and i think i'll have 1U free
<azonenberg> the lecroy is 7U racked and has three BNCs on the back (trigger in, trigger out, func gen) that i wanted to bring out to the front so a 1U patch panel brings it to 8U total
<azonenberg> then the PSUs side by side are 2 so that's 10U
<azonenberg> the rigol is 4U so 14U, then the PDU is 1U so 15
<azonenberg> yeah i have one free
<azonenberg> if i add a patch panel for the rigol that will fill it up
azonenberg_work has joined ##openfpga
<whitequark> balrog: no comment
<balrog> whitequark: hah
<balrog> I'm wondering if they're any good :p
<sn00n> azonenberg: yeah, a patch panel would be quite handy for me too
sgstair_ has joined ##openfpga
sgstair has quit [Disconnected by services]
sgstair_ is now known as sgstair
sgstair_ has joined ##openfpga
sgstair has quit [Disconnected by services]
sgstair_ is now known as sgstair
kristianpaul has quit [Quit: Lost terminal]
egg|zzz|egg has joined ##openfpga
eduardo__ has joined ##openfpga
eduardo_ has quit [Ping timeout: 240 seconds]
gnufan has joined ##openfpga
gnufan1 has quit [Ping timeout: 264 seconds]
kristianpaul has joined ##openfpga
sgstair_ has joined ##openfpga
sgstair has quit [Disconnected by services]
sgstair_ is now known as sgstair
carl0s has joined ##openfpga
<carl0s> Hi, what is the status of CoolRunner II support on yosys? Saw on twitter that 32A devices are supported, but most of the boards on ebay have a 62 device in it.
<rqou> whee, new and exciting failure mode in my apartment: the sink has hot water, but the shower does not have hot water
<rqou> how is this even possible?
<shapr> rqou: insufficient water pressure? blockage in the pipe?
<rqou> no, water is flowing just fine, it's just cold
<rqou> but the sink isn't
<rqou> carl0s: coolrunner-ii support is "almost working"
<shapr> Do you have two separate shower valves? turn the flow entirely hot?
<rqou> yeah, i did
<rqou> something is f*cked in our apartment
<carl0s> rqou, the pnr is done with Xilinx tools? Just searched a bit and the ISE Webpack is a little big
<rqou> place and route is not being done with xilinx tools
<rqou> we are working on our own place and route for cpld/crossbars
<rqou> i was going to work on it more this week, but stuff keeps coming up (such as midterms)
<carl0s> oh nice, thanks for that work
<azonenberg> carl0s: so a bit of background
<azonenberg> CoolRunner-2 has two main sub-families
<azonenberg> the 32 and 64 are low-end and are missing a bunch of features like SSTL I/Os (for DDR memory) and clock dividers
<azonenberg> I've focused mostly on the low end, although rqou has done some RE on the high end parts too
<azonenberg> The bitstream for the 32a is fully understood, although the tools aren't 100% done yet
<azonenberg> We have yosys based synthesis working, though not super efficient, and the PAR is in progress
<azonenberg> The 64a is mostly there, we have to recover the interconnect structure for the ZIA (routing fabric) still but that should be relatively easy
<azonenberg> just hasnt been a priority
<azonenberg> all of the PLAs are the same for all devices, though coded slightly differently in the bitstream
<azonenberg> The macrocells for the high-end vs low-end devices add a few more features
<azonenberg> I have no idea what the routing for the high-end parts looks like, rqou has touched it a bit but not in extreme detail
<azonenberg> carl0s: in general coolrunner is probably the 3rd most feature complete chip with an open toolchain right now
<azonenberg> ice40 is top (not our team but we collaborate with clifford etc a lot), greenpak4 is second
<azonenberg> then 4th is probably psoc5lp, although that is far from usable atm
<rqou> azonenberg: the high end part routing is understood enough to program it
<rqou> but i have no idea what the physical structure is
<rqou> probably a tree of muxes
<azonenberg> ah, ok
<shapr> I lurk here for the extemporaneous lectures
<azonenberg> yes a tree of one-hot muxes is the most plausible explanation
<azonenberg> We still need the ZIA via muxes for all >= 64 chips though
<rqou> yeah, i've been testing with the illegal source
<rqou> which isn't in our repo, so it should be ok?
<carl0s> thanks azonenberg, i just wanted to use lower end PLs, iCE40 is big for my toy projects, there is a board on ebay with a CR 64A and is really cheap, enough logic cells for me
<rqou> yeah, about those boards...
<azonenberg> rqou: lol
<rqou> btw this reminds me
<rqou> azonenberg you still need to image the chips i sent you
<azonenberg> Yes, i know
<azonenberg> see PM
<carl0s> those boards are that bad?
<rqou> they're not made for the most legitimate of reasons
<azonenberg> carl0s: they're intended to be used as xbox modchips (i forget which generation)
<azonenberg> not that you can't use them for legitimate purposes
<rqou> 360
<carl0s> i noticed that, another cheap board is one on Seed but i think they are out of stock
<rqou> they're somewhat limited on broken-out pins though
<azonenberg> Yeah
<azonenberg> carl0s: you can get coolrunners on digikey for $2ish, a 44-TQFP isn't that hard to hand solder
<azonenberg> just pick up a random tqfp breakout from adafruit or something
<azonenberg> then you can use all the pins, you just have to add a 1.8V regulator
<azonenberg> which is easy enough
<carl0s> yeah, that might end up cheaper and easier to get started with
sgstair_ has joined ##openfpga
sgstair has quit [Disconnected by services]
sgstair_ is now known as sgstair
<azonenberg> the modchips arent a bad choice if you only need a few pins
<azonenberg> But, do you? :p
<carl0s> the more the best haha
<carl0s> i will use it for toy projects, nothing serious
carl0s has quit [Quit: Leaving]
<azonenberg> Hmm apparently the round machine pins i got are the wrong diameter
<azonenberg> right pitch though, which is a start...
santitox has joined ##openfpga
Zorix has quit [Ping timeout: 264 seconds]
<balrog> azonenberg: just drill it out (just kidding lol)
<azonenberg> drill what out?
<azonenberg> my pins are too small for the mating socket
<azonenberg> they dont mate firmly
<azonenberg> Drilling the BNC was easy, i used a cutoff wheel and it came off nicely
Zorix has joined ##openfpga
<azonenberg> Also, good thing that i wore a face shield when doing that
<azonenberg> when the BNC shell broke completely it pinched a bit and shattered my dremel cutoff wheel
<azonenberg> Goggles would have stopped the worst of it but i probably still would have caught some shrapnel
teepee has quit [Ping timeout: 258 seconds]
teepee has joined ##openfpga
<balrog> ohh, too small :(
<azonenberg> yeah i have 0.47mm diameter pins
<azonenberg> and an 0.75mm socket
<qu1j0t3> azonenberg: +1 for safety equipment, wow
<azonenberg> Yeah i was pretty close to it too, had my face down level since the workpiece was small
<azonenberg> I always wear eye pro when working with any power tools, but i've started using the face shield whenever i'm working with grinding wheels just b/c i've had so many shatter when something shifted and pinched them or something
<azonenberg> Especially the tiny dremel ones
<azonenberg> Not as energetic as a big angle grinder, but they break a heck of a lot more frequently
<rqou> azonenberg the PPE guy :P
<azonenberg> rqou: i dont have any H2SO4 burns, unlike dig
<azonenberg> so i must be doing something right
<rqou> are nitric burns better or worse? :P
<azonenberg> It's probably not *quite* as nasty to the skin
<azonenberg> but NO2 is way worse for your lungs
<rqou> it reacts with proteins and stains your skin
<azonenberg> yeah but it doesnt burn you as quickly/severely
xdeller has joined ##openfpga
<azonenberg> in terms of long term scarring etc
<azonenberg> It just vaporizes, gets in your lungs, and kills you that way :p
<rqou> but in that case (cold) sulfuric doesn't either
<azonenberg> eh
<azonenberg> cold sulfuric burns too, just not quite as fast as when it's at 200C
<rqou> it does, but not instantly
<azonenberg> and it's syrupy which makes it a pain to decon
<rqou> my high school chem teacher spilled some concentrated sulfuric acid on her hand years ago with no lasting effects
<rqou> but this was right next to the sink
<rqou> so she instantly washed it off
<rqou> nilered on youtube has tried it too
<azonenberg> Doesnt make it a good idea :p
<azonenberg> and trust me, when its hot from a decap
<azonenberg> you wont get it off fast enough
<rqou> oh yeah definitely
<rqou> i think my chemistry teacher was just doing a carbon pillar demo
<rqou> not a hot decap
<rqou> but then again i'm the one researching how to ghetto-distill WFNA, so... :P
<azonenberg> bad idea
<rqou> i know someone who's done it before :P
<azonenberg> me too
<rqou> on the topic of permanent scars, what is your opinion of one of the most common causes of permanent scars, graphite pencils? :P
teepee has quit [Ping timeout: 248 seconds]
teepee has joined ##openfpga
<azonenberg> I have a graphite tattoo on my right wrist
<azonenberg> Lol
<azonenberg> i wouldnt call it a scar, the surface tissue is flat
<azonenberg> no raised scarring
<azonenberg> But there's embedded graphite that will probably never go away
<azonenberg> i've had it for like 15 years
<rqou> so azonenberg when do we try ghetto HF? :P
<azonenberg> Pretty sure dig or whitequark has done it
<azonenberg> but count me out
<rqou> last time this was brought up whitequark says he can "just acquire" HF in RU
* qu1j0t3 proposes renaming the channel to #openflasksofacid
<rqou> no, i don't keep open flasks of acid lying around
<azonenberg> lol
<rqou> i only keep closed flasks lying around, usually with labels :P
<awygle> I have gotten burned by acetic acid
<awygle> Obviously not badly, but it turns out "glacial" on an acid label is important
<rqou> lol yeah
sgstair_ has joined ##openfpga
sgstair has quit [Disconnected by services]
sgstair_ is now known as sgstair
<awygle> Who the hell decided that "Unicode" without qualification meant UTF-16 Little Endian?
<rqou> microsoft
<awygle> Apparently JEDEC as well
<rqou> wait really?
<rqou> why does JEDEC care?
<awygle> This standard describes "a Unicode string" without expanding further, and it turns out to be as above
<mtp> store it as UTF-9
<rqou> but JEDEC does "hardware"
<mtp> in case we have to interoperate with a PDP-10
<rqou> i didn't expect "hardware" people to even know what this whole "unicode" business is about :P
<rqou> so i've actually been thinking about creating a character encoding called UTF-⑨ as a "f*ck you" universal filename storing encoding
<awygle> rqou: lol "the strongest encoding"
<rqou> somehow as a hybrid of surrogateescape+WTF-8
<rqou> because linux filenames can be arbitrary bytes, and windows filenames can be arbitrary 16-bit units
<rqou> and no encoding i'm aware of can store both
<rqou> and yes, definitely the strongest encoding :P
<awygle> Dammit now I have one of the songs stuck in my head, thanks a lot rqou
<rqou> lolol
<rqou> anyways, can you mention what jedec spec is amazingly aware that unicode exists?
<rqou> or is this super-NDA?
<awygle> Just regular NDA :-P
<rqou> still better than VHDL stuck with latin-1
<awygle> Seriously? Upsetting.
<rqou> yeah, changing it would be a breaking change
<rqou> because vhdl is case-insensitive
<rqou> and accented letters are allowed in names
<awygle> I am upset about the way breaking changes are currently handled in the world
<rqou> oh, correction
<azonenberg> Re UTF-16
<rqou> arbitrary bytes are allowed in comments
<rqou> :P
<azonenberg> UTF-16 used to be the only unicode there was
<azonenberg> the original intent of the committee was that a wchar_t was 16 bits, and there would be at most 2^16 glyphs in all the world's languages
<azonenberg> and the only encoding would be big or little endian
<rqou> er, all the "actually used by countries with money" languages :P
<awygle> Trivially falsifiable, but sure
<azonenberg> Then people started adding all sorts of accented characters and compositional characters (rather than just storing the individual strokes for kanji, or a U and an umlaut as two consecutive code points, etc)
<azonenberg> and it exploded
<awygle> I believe you, but that shouldn't mean they get to bogart unqualified Unicode as a descriptor
<azonenberg> What i mean is, the standard may have been written when unicode meant an array of wchar_t's
<awygle> But I guess that's be a ~~breaking change~~
<awygle> Ah I see
<rqou> azonenberg: you forgot about the requirement for legacy round-trip compatibility
<rqou> also messing up and encoding hangul three times
<awygle> Well this standard is newer than that but now I get what you're saying
<azonenberg> How long ago did unicode grow >2^16 code points?
<rqou> more than a decade ago
<azonenberg> yes but how much longer?
<azonenberg> because when i first learned about unicode it was in a textbook written for Visual Studio '98
<azonenberg> Which came out nearly two decades ago :p
<azonenberg> It was maybe 2001-2002 when i was doing this but the book and compiler were from '98
<azonenberg> vs.net didn't come out until 2003
<rqou> so apparently 2.0 already had planes
<rqou> and that came out in 1996
<azonenberg> interesting
<rqou> 3.1 definitely has astral plane characters, and it came out in 2001
<azonenberg> Yeah but that was long after this book
<azonenberg> :p
<azonenberg> i'm also legitimately curious whether unicode actually needs this many code points
<azonenberg> emoji, for example, belong in a dingbat font
<azonenberg> Not as code points IMO
<rqou> well, now we have a tertiary ideographic plane because some people got (more) serious about adding Chữ Nôm and Zhuang to unicode
<azonenberg> In general are there that many truly unique ideographs?
<rqou> yes
<rqou> because of Chữ Nôm and Zhuang :P
<azonenberg> From what little i know of chinese, most chinese characters are compositions of simple strokes
<awygle> The history of emoji is pretty darn interesting
<azonenberg> That could each be code points in their own right
<azonenberg> and then you'd just have four or five code points for a complex "word" ideograph
<rqou> ah, so "ideographic description characters" and ZWJs
<azonenberg> which is on par with how many it takes for a typical word in a phonetic language
<azonenberg> obviously its way too late for that now
<rqou> that might work in most cases, but there's almost certainly corner cases
<rqou> e.g. does Zhuyin get its own codepoints?
<azonenberg> but i'm curious, if minimizing addition of code points was actually a goal from the start
<azonenberg> would it be possible to accurately describe all of the languages unicode now supports
<azonenberg> with <2^16 CPs?
<rqou> maybe, but we'd probably end up with more hilarious bugs
<pointfree> I'd much rather use dingbats/different fonts/a character set in which the the meaning of the smallest character codes are not lost to time. I can't remember the last time I typed a character not available on my keyboard.
<pointfree> Wouldn't it be nice of machine code instructions were printable and typable characters?
<pointfree> *if
<azonenberg> pointfree: yes, the majority of people write in one language most of the time
<azonenberg> or at least one character set / two very similar ones
<rqou> hey, i have a troll-y idea
<azonenberg> like english and german, for example
<azonenberg> or even english and a Cyrillic language
<azonenberg> can coexist well
<rqou> 256 codepoints representing integers (extends like ASN.1 DER)
<rqou> and then you ZWJ them up into images :P
<rqou> now you can have unicode bugs, ZWJ-related bugs, and ASN.1-related bugs all at the same time
<rqou> or a different idea:
<rqou> U+xxxx00 EMBEDDED PNG IMAGE BYTE 00
<rqou> U+xxxx01 EMBEDDED PNG IMAGE BYTE 01
<rqou> etc.
<rqou> with ZWJs in between :P
<mtp> lole
<mtp> same
<azonenberg> ...
<mtp> or how about
<mtp> U+xxxx00 BEGIN ENCODED PNG
<mtp> U+xxxxFF END ENCODED PNG
<mtp> and just a bytestream of image data between those two markers
<rqou> but that causes the parser to have to change state
<rqou> my idea doesn't
<rqou> wait what
<rqou> wikipedia says that they're working on asn.1 JER
<rqou> json encoding rules
<azonenberg> wait what
<azonenberg> now you can have json parsing bugs in your asn.1 parsing bugs?
<rqou> yup
<rqou> your JER will now contain an octet stream that is DER-encoded data :P
<rqou> waiting for DJER
<rqou> which of course won't be JWS compatible
<rqou> azonenberg: i should create a piece of software that uses XER and then ask you/IOA to audit it :P
<azonenberg> XER?
<azonenberg> is that... XML?
<rqou> xml encoding rules
<azonenberg> asn.1 and xml in one place
<rqou> oh and according to wikipedia CXER exists
<azonenberg> that can't end well
<rqou> canonical XML
<rqou> so why no CJER?
<rqou> azonenberg: "we added encryption support to our data by using elliptic-curve diffie-hellman written in XSLT" :P :P
<rqou> april fools challenge?