<Boulet>
there's something weird going on with mksunxiboot
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<Boulet>
mksunxiboot does not work as soon as file is >512 bytes
<Boulet>
just added a nop to prove it
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<Turl>
Boulet: well isn't the boot space 512 bytes?
<Boulet>
it should be almost the size of the sram 48kb
<Boulet>
however mksunxiboot limit it to 24KB (and i have a boot0 here that is 24kb)
<Boulet>
brom needs some sram for the stack and buffers (like when reading a sector)
<Boulet>
gosh i don't want to disassemble brom and try to find out what's wrong :(
<Turl>
:(
<Boulet>
but i think hno and rayman can generate a proper boot0, hopefully they have some answers !
<Boulet>
or maybe they did not generate it and it is just a dump of nand :(
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<Turl>
good night all
<Boulet>
bye bye
<furan>
do we have a brom dump?
<furan>
i'd love to look at that
<Boulet>
for a10 yes
<Boulet>
(disassembled)
<Boulet>
for a13 we have but not disassembled
<Boulet>
ok i have mkunxiboot working on a13 now :) just had to add some version numbers to the header
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<Boulet>
graaaaaaaah that thing still does not work
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<hno>
Boulet, the key to what's wrong is in boot0, not BROM.
<hno>
disassembly of BROM is mostly interesting to itendify how to easily do USB device mode (FEL), SD, NAND accesses in a simple manner. We know very little about those controllers.
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<hno>
Boulet, put boot0 files is dumps from nand, as that is the only place where actual parameters can be found, configured by livesuit while flashing.
<hno>
earlier the parameters was set in the fex and reflected in script.bin, but for a13 they made livesuit autodetect many things.
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<hno>
but i do doubt the validity of some of it's probed parameters.
<Boulet>
yeah, my stuff's working now
<Boulet>
i did some bad things with my SD card i think ahahahha
<Boulet>
now it's fine
<Boulet>
i might go say hi to the allwinner guys since they are not too far from me :)
<hno>
Boulet, yes, go visit Tom.
<Boulet>
yeah, that's the plan
<RaYmAn>
break in & steal & leak all the secret sauce ;)
<Boulet>
yeah, that's the plan
<Boulet>
haha
<Boulet>
actually i am not sure what to talk about yet, just meeting them would be neat
<hno>
No stolen sauce please. Can't deal with such poison.
<specing>
They are in the software park, hahahahaahahah
<popolon>
their adress in on their website :)
<popolon>
and some picture of the buildings
<popolon>
=> I deducted that was here and added on OSM
<popolon>
Not sure about the limits of the complex, the 2 sports pitch at left are for basketball represented in their picture, probably on allwinner or software park land
<specing>
corporate sports?
<specing>
unbelievable in China!
<popolon>
there are sports pitch everywhere in china
<popolon>
school, corporates, university
<popolon>
in university there are 15 or 20 tennis cluster
<popolon>
The Zhuhai campus of university of Beijing, just at west of Allwinner :))
<popolon>
18 basket pitchs + 16 tennis pitch
<popolon>
http://binged.it/Qbgr3Q <= another campus at south of the city , the white blocs at south-east are baskets pitchs too :)
<popolon>
there is 5 or 6 campus in this city
<popolon>
and in chinese gardens, every soon at morning until late the evening there are lot of people doing taijiquan (taichi), dancing, or practising sports and music
<popolon>
or traditionnal chinese games like go, chinese chess, mahjong or chinese chess
<popolon>
"Rikomagic says the device - which seems based on Panda’s ARM-powered $141 H6 netbook - will likely appeal to devs and modders, rather than mainstream consumers."
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<popolon>
not really clear, could be the box name here ????
<hno>
Hmm.. allwinner.com web site, is that an official one? It does have an old copy of the datasheet available in download, and allwinnertech marketing display on frontpage.
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<popolon>
Registrant:
<popolon>
BDD Group
<popolon>
ATTN ALLWINNER.COM
<popolon>
PO Box 459
<popolon>
care of Network Solutions
<popolon>
Drums, PA. US 18222
<popolon>
for ammwinner.com
<popolon>
just network solution that registered this domain
<popolon>
Registrar: XIN NET TECHNOLOGY CORPORATION for allwinnertech.com
<arokux_h>
hno, would it be possible for A10 to load the kernel image over network with our U-Boot over tftp? seems to be practical.
<popolon>
if you click on the chinese flag, you are redirected to allwinnertech.com
<arokux_h>
one wouldn't need to copy the image to the sd card all the time.
<RaYmAn>
you can load over serial :P
<RaYmAn>
loading over network requires that u-boot supports the network chip in question - so it'd probably be *possible* to do with e.g. the built-in mac, but wireless would probably be a hell of a lot harder
<arokux_h>
RaYmAn, I do not have a serial cable..
<arokux_h>
hm.. but I bet our U-Boot doesn't have ethernet driver right?
<RaYmAn>
Not afaik.
<RaYmAn>
you didn't ask if it was possible *right now* :P
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<arokux_h>
RaYmAn, didn't get your last message
<arokux_h>
hm.. don't the ethernet controllers provide some basic genera interface to them?
<arokux_h>
smth. like VESA (if I remember this name correctly) for graphic adapters?
<RaYmAn>
VESA is really x86 only
<jelly-home>
nothing like a little 8086 and BIOS emulation to get a framebuffer initialized
<penguin42>
arokux_h: There's no standard interface for ether cards; and no equivalent for any device on ARM, even graphics card
<arokux_h>
penguin42, I LOVE ARM
<RaYmAn>
penguin42: serial almost is ;) just $offset that's different :P
<penguin42>
RaYmAn: are you sure? I mean the ones who just use AMBA modules sure, but there are many screwed up designs that don't
<RaYmAn>
I said almost :P
<penguin42>
RaYmAn: It's like, OK, it's a serial port, there are only about 4 registers and yet they still manage to find a way to make it a bit different
<RaYmAn>
indeed
<RaYmAn>
low-speed serial seems to be vaguely standard across a lot of SoC's though :)
<hno>
arokux_h, if someone writes a wemac driver for u-boot yes.
<hno>
arokux_h, and no, there is no standard ethernet controller interface. Only the physical layer (what happens on the wire) is standardised.
<hno>
plus the protocols over it.
<arokux_h>
hno, well phys. layer should be standardized :) otherwise the other side won't understand anything.
<popolon>
this remember me the ethernet negociation problems on 10/100 HD/FD 10 years ago, depending on vendors ;)
<hno>
popolon, those are still there.
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<hno>
most people do not understand that hardcoding on one end requires you to hardcode both for proper operation.
<furan>
(I fixed the subject but the url is still inaccurate, it's just for a10/a13 devices)
<Turl>
furan: wiki? :D
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<Turl>
fuu more spam on wiki :<
* Turl
went on a bot killing spree
<hno>
furan, nice job. But please post things like this on the wiki.
<hno>
especially your findings on the nand table entry contents.
<hno>
we hope to get rid of the proprietary bootloaders.
<hno>
but will likely need to use the Allwinner NAND driver for some time.
<hno>
that nand controller is "different".
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<steev>
furan: nicely done sir
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<furan>
thanks guys
<furan>
hno: yeah it's a mess
<Marex>
hno: heya! :)
<Marex>
hno: did you get time to check the upstream goo ?
<hno>
Marex, still fighting with DRAM setup on A13. in general.
<Marex>
hno: all righty, good luck then :)
<hno>
I hope to see some life from SPL in a minute.
<hno>
But no...
<Marex>
hno: SPL doesn't start for you at all ?
<Marex>
hno: if you have serial port, you can call "serial_init()" and "serial_puts()" to pump out some debugging symbols basically right after you have stack set up (after you leave start.S and execute C code)
<hno>
The DRAM controller never finishes it's initialization for some reason.
<Marex>
just remember you need CONFIG_SPL_SERIAL_SUPPORT in your include/configs/...h
<Marex>
hno: oh this
<hno>
Running it under gdb via JTAG
<Marex>
hno: might be a timing issue due to the single stepping ?
<Marex>
or maybe you break it somewhere ?
<Marex>
hno: I think I won't be much help really, I have only a very blurry idea about this particular chip
<hno>
Does not seem to be a timing issue. Hangs at same location without any breakpoints.
<furan>
hno what are you fighting? if the source is out, I guess I'm not sure what you're doing - are you writing new drivers for these things?
<furan>
it sounds cool though
<hno>
furan, source is not out for initial boot process on A13.
<Marex>
hno: why does it hang ? the core halts ?
<Marex>
hno: aren't you hitting some exception, like DABT due to accessing uninited memory ?
<hno>
It's a loop waiting for the dram controller to flip a bit saying it's ready.
<hno>
no memory accesses yet.
<Marex>
oh, then you're likely missing some configuration ... it's hard to tell without ref. sources or datasheet
<Marex>
you can maybe setup HW watchpoints and trace the original code that does the init though ?
<furan>
oic
<Marex>
furan: wat ? :)
<furan>
oh i see
<furan>
responding to hno :)
<Marex>
hydrogen nitrogen oxygen :p
<furan>
I have yet to use jtag to debug, not even sure what sw to use, even though I have dongles for it for fpga stuff
<hno>
HW watchpoints during original initialization process would be interesting. Need to try that. But currently matching register dumps to make sure I set up the registers right.
<furan>
is there a tutorial somewhere on doing jtag debuggiing?
<Marex>
hno: you usually need to write the registers in correct sequence
<furan>
debugging
<Marex>
furan: read up on OpenOCD ... that's cool
<furan>
ok
<Marex>
furan: for stuff like programming xscale chips, read up on openwince-jtag (now urjtag)
<Marex>
furan: when you want to go to next level, get abatron bdi3000 :p
<Marex>
furan: and then the only way up is probably the lauterbach one ;-D
* Marex
puts off the drool
<furan>
haha ok
<Marex>
hno: another interesting thing you might want to try is qemulating the init code (in qemu) ... you can trap hardware accesses there really easily
<furan>
is there anything else usually on the jtag chain besides the cpu?
<furan>
on allwinner devices
<Marex>
furan: no idea about allwiener ... but there might be
<hno>
furan, no idea what's on the chain. Only know how to access the cpu.
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<Marex>
hno: the JTAG is a bus, like any other ... and there can be multiple devices connected on it
<Marex>
hno: usually, there's only the CPU, alone, sad ... but there might be eg. an FPGA on the same JTAG bus
<furan>
well I was wondering if flash was on jtag but the jtag pads I've seen are right next to the cpu
<furan>
so perhaps not
<penguin42>
don't you normally have to do evil things like wiggle the CPU pins over JTAG to do flash writes?
<Marex>
furan: that's not very likely
<Marex>
penguin42: yes
<hno>
There is no JTAG chaining to external components. But there is multiple CPUs within the chip.
<furan>
penguin42: no
<Marex>
hno: the multiple CPUs business in case of the armv7 is handled by that coresight goo arm has
<furan>
usually they're just on the jtag chain as independent devices (flash)
<furan>
I have a lot of fpga boards that are like that, fpga and flash in the same chain
<hno>
furan, I don't see any JTAG signals in the normal NAND pinout.
<Marex>
furan: I didn't see too many flash chips with JTAG pads ;-)
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