<kc8apf> why the hell does iCEcube2setup _require_ X11
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<rqou> kc8apf: Xvfb?
<kc8apf> rqou: I may need to
<kc8apf> seems no way to do a headless install though
<kc8apf> I've found the packed data but I don't understand the file format yet
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<pie_> awygle, woohooo~
<pie_> rqou, have you read blame
<gruetzkopf> hmm, 32-thread niagara shows you how badly software handles parallelisation
<pie_> psh you mean you arent using hand coded SWAR?
<qu1j0t3> gruetzkopf: i'll take it off your hands. always wanted a Niagara
* pie_ ( was screwing around with SWARing game of life at one point, kind of interesting, ran out of time)
<sorear> How much cache and memory b/w per thread?
<qu1j0t3> (and don't even mention how many FPUs per integer core)
<gruetzkopf> heh, i've just recently aquired it
<sorear> “interconnect bottlenecked” is a phrase more people should know
<gruetzkopf> yep
<kc8apf> this installer is amazingly bloated. Wacom tablet support?!?!?
<jn__> i hope glibc needs less than five hours to build on that machine…
<gruetzkopf> no problem if you make -j40 it ;:D
<sorear> Every few years someone discovers why putting 1000+ integer cores with tiny caches on a die is technically possible but a bad idea
<rqou> gruetzkopf: currently have a 10 core 20 thread Intel
<rqou> seems to work fine
<rqou> huh niagara is "only" 72W
<rqou> that's actually less than i expected
<gruetzkopf> yah the fully populated sun J4400 jbod below it is much worse :D
<rqou> also, it's one of the earliest open source CPUs
<rqou> who needs this "risc-v" stuff? :P
<jn__> yeah, sparc is nice
<jn__> i would kind of buy an MCST/Ineum military sparc laptop :)
<sorear> I love having setjmp require a syscall
<implr> qu1j0t3: you can get T1 or T2 servers on ebay for as low as few hundred $
<rqou> to manipulate the register windows?
<sorear> Yes
<implr> I actually wanted to get one but the shipping would be more expensive than the actual thing
<sorear> ia64 and am29k can do this entirely in user space, sparc can’t
<gruetzkopf> am29k is fun
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<gruetzkopf> don't have any hardware though
<qu1j0t3> implr: Yeah .. i almost got some 5xxx free
<gruetzkopf> wow
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<pie_> rqou, context?
<rqou> something that digshadow asked me about IRL
<pie_> ah
<pie_> i asked because iirc there was a talk about similar things a ?few? weeks back
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<cr1901_modern> (Count12 test fails when I try to run tests. No time to really debug in detail)
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<feuerrot> gruetzkopf: you also put the storage into the rack?
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<azonenberg> cr1901_modern: ping me in a day or two
<azonenberg> Just got home from a multi-day sar op, have a few minuts to restock food and batteries and then grab a bit of sleep before re-deploying in the morning
<azonenberg> cr1901_modern: the not implemented message is intentional and only applies to the sim model
<azonenberg> it should be fully supported in hardware but i have no time to debug
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<cr1901_modern> azonenberg: ack, thanks
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<openfpga-github> [Glasgow] shapr commented on issue #33: could this be unpacked with more detail? Might be able to use the octopart API https://github.com/whitequark/Glasgow/issues/33#issuecomment-388071910
<openfpga-github> [Glasgow] whitequark commented on issue #33: So, I've had an issue several times that the Mouser part number didn't match the value of a resistor (less a problem with capacitors because we only have like one capacitor whose value actually matters, the rest is decoupling). It's a thing that's *really* easy to miss with manual review, so I want to automate it.... https://github.com/whitequark/Glasgow/iss
<openfpga-github> [Glasgow] whitequark closed pull request #39: Add README transcribed from twitter thread (master...master) https://github.com/whitequark/Glasgow/pull/39
<openfpga-github> [Glasgow] whitequark commented on issue #39: Thanks! Eventually I need to set up ReadTheDocs, but this should do meanwhile. https://github.com/whitequark/Glasgow/pull/39#issuecomment-388073515
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<rqou> finally my immune system decided it was going to kick in
<rqou> my throat finally hurts less and my nose is now full of nice thick green mucus
<awygle> And now I feel sick
<awygle> Glad you're feeling better
<rqou> whoops :P
<rqou> disease transmission over IRC :P :P
<jn__> don't catch that internet virus!
<rqou> ILOVEYOU.vbs
<whitequark> awygle: looks like I have fought setup/hold timings for one tiny instance and won
<awygle> oh?
<whitequark> I have one synchronous FIFO piping correct data into the host
<awygle> hooray!
<daveshah> whitequark: awesome
<whitequark> azonenberg: there's been some pulseview change and it is REALLY fast now
<daveshah> yeah I've noticed that too
<whitequark> like "protocol decoder triggering on every edge on 1M samples of a 8 bit data bus also changing on every tick"
<whitequark> and it still renders smoothly
<rqou> azonenberg: how do you feel about packing some XeF2 into a chip to make it self-destructing?
<whitequark> what
<whitequark> you're aware that XeF2 is explosive, right
<whitequark> or do you mean that and not etching
<pie_> > self destructing
<whitequark> at least use something less sensitive, like transition metal azides
<whitequark> (note: do not actually do this)
<awygle> lol
<pie_> "things i will not work with". unrelated, rqou, i managed to lose the link, who was the electron microscopbe bird site dude you mentioned yesterday
<whitequark> nanographs
<pie_> thanks \o/
<rqou> blame darpa :P
<awygle> i am intensely curious about MEMS hammer
<whitequark> rqou: lol what the fuck
<whitequark> do they realize it'll going to blow if you so much as hit it with your finger
<whitequark> XeF2 is absurdly sensitive
<pie_> whats a mote
<awygle> i'm gonna guess SmartDust stuff
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<pie_> Meh, I dont see a contact for nanographs, I want to ask him if the "awesome microscope manuals" are scanned anywhere and don't want to make a tweeter...
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<whitequark> awygle: ha, the 4-FIFO version of arbiter doesn't pass timing
<whitequark> 26.9/30 MHz
<whitequark> actually no
<whitequark> that's 1-FIFO version
<whitequark> the 4-FIFO version is... faster?!
<awygle> o_o
<awygle> better seed i guess??
<whitequark> man arachne is bullshit
<rqou> man, i really want to play with mems now
<awygle> yup
<rqou> azonenberg get homecmos working pl0x
<awygle> whitequark: something to think about - at what point does it become not worth your time to keep trying to make this work in a 5k?
<awygle> (also, synthing it for an HX8k and seeing what timing you can hit would be an interesting data point)
<whitequark> awygle: well
<whitequark> there's a lot of avenues for improvement
<whitequark> timing-driven placement for arachne is one
<whitequark> I could also just use a PLL and run it much slower
<rqou> heh, also somebody else who has realized that silver epoxy can be used for wirebonds
<whitequark> wtf why did yosys infer two BRAMs here
<daveshah> whitequark: yosys' heuristic is to an infer a block ram if it will be more than 2% used
<whitequark> ah, because I asked it to do four and two were redundant
<whitequark> aha, if I use a buffered FIFO then it works better
<rqou> TIL MEMS doesn't have good simulation tools?!
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<pie_> mems sounds like youd have to simulate ALL the physics
<tnt> esden: On that pic : https://twitter.com/esden/status/994453700604182530 Is that a pre-made multicolor cable harness ? The premade one from semtec I found were all black wires.
<awygle> yeah mems sound like lots of mixed-domain FEM
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<rqou> yet another NC-FET dissertation talk
<esden> tnt: that cable has a flag in the order code selector on their page: https://www.samtec.com/products/sfsd
<rqou> is this going to become "a thing" soon?
<esden> I will have to get in touch with them directly, as I want the color order to be more specific than the one they have randomly there ... :D also have to ask about the crimps and heatshrink on the other side... as I said before on my streams, samtec main business are odd custom connectors and wire harnesses. Most of the stuff they sell you can not even select on their website... :D
<esden> I just wanted to get close to what I want with the samples ... now the fun will begin :D
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<tnt> esden: oh nice, I missed that on digikey, should have gotten the colored one.
<balrog> rqou: I thought Tanner EDA was primarily focused on MEMS
<balrog> (We used to have it here for academic use before Mentor bought them out)
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<tnt> esden: btw, no streams recently ? :)
<shapr> I'd love to see whitequark streaming glasgow dev
<whitequark> shapr: I resent how my voice sounds so no chance of that
<shapr> aw, too bad
<tnt> whitequark: do it like nurdrage and use a voice changer :p
<whitequark> tnt: won't help
<whitequark> it's not so much just pitch as the entire set of parameters
<qu1j0t3> get a friend to dub over it
<qu1j0t3> they see only google's AI closed captions
<qu1j0t3> voice firewalled
<whitequark> that's not really livestreaming
<qu1j0t3> could be!
<qu1j0t3> you've seen live interpreters at conferences
<whitequark> meh, I don't really see much point anyway
<whitequark> I get distracted a *lot*
<shapr> I understand that, I have many chunks of 45 minutes of productivity.
<qu1j0t3> i have few chunks of four minutes of productivity.
<awygle> i keep planning to stream stuff
<pointfree> I can never get myself to listen to my own talks. I guess I just sound different outside of my inner ear. A friend of mine (Sam Falvo) listens to his own talks and his are much smoother than mine. Maybe I should try listening to my own talks on youtube as well, there could be something to it.
<awygle> then convincing myself it's uninteresting
<awygle> i did some boring javascript streams back when i was unemployed and trying to improve my resume
<awygle> maybe i'll stream glasgow rev C pcb stuff
<awygle> "watch me drag traces around in kicad"
<shapr> awygle: yes plz
<shapr> I learn fastest when pairing with someone on something, whatever that thing might be
<rqou> everyone knows the actual reason to watch streams is because cats :P
<shapr> awygle's cats are cute
<rqou> yeah
<whitequark> awygle: ha, do it
<sorear> pointfree: you know kc5tja?
<jn__> rqou: c3voc needs more cats
<rqou> don't they already have one on every podium? :P
<awygle> i will 100% have a cat on my lap, they love it when i do pcb stuff
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<jn__> rqou: but Maneki-neko (apparently that's the right translation of Winkekatze) aren't real cats :D
<awygle> yeah ok i'll give it a shot, why not
<rqou> are your cats fat and lazy, or are they extremely energetic like scanlime's?
<qu1j0t3> haha
<pointfree> sorear: Yes, I see him almost every month at svfig. I've learned a lot from conversations with him. sorear, do you know him through risc-v stuff?
<q3k> some day I'll get a second monitor so I can watch streams ,_,
<q3k> i feel like I'm missing out
<awygle> rqou: one is fat and one is skinny, one is lazy and one is energetic, but the pairing is not what you'd expect
<zkms> good morning
<rqou> lol
<rqou> afternoon zkms
<sorear> pointfree: yes, and I also touched kestrel many years ago
<sorear> back when it was a 65816 project
<awygle> apparently i should be at this "teardown" conference in portland?
<esden> tnt: Digikey has a very limited selection of samtec stuff... you have to look on the samtec site directly and order samples/products from there. Digikey is also puting quite a heavy markup on samtec stuff...
<rqou> yeah people seem to be flooding my TL about it but i don't really "get" it
<awygle> well, people i think are cool will be there, and it's 3h away by car. so i feel like maybe i should head down there this weekend.
<rqou> timing is a little bit awkward anyways
<esden> you all did not hear about teardown until today? o_O
<awygle> i didn't, no
<awygle> is it a Big Deal?
<zkms> what is teardown
<q3k> i haven't either
<rqou> i don't want to have to rush up and back down in time for commencement
<tnt> esden: yeah. I didn't look but since I'm in europe I expect shipping might be killing me if I order from samtec just a few connectors :p
<esden> it is the first time they are doing it... but it is promising to be on par with supercon ... so yes very big deal :D
<rqou> one week later would have been perfect
<esden> and in my backyard so perfect :P
<rqou> i don't know about supercon either
<awygle> hm maybe i'll get down there for sat/sun
<esden> rqou: well now you do :D
<rqou> also, idk who "they" are or why they matter
<awygle> rqou: hackaday
<awygle> hackaday supercon
<rqou> hackaday is hosting teardown?
<esden> no crowd supply is teardown
<esden> hackaday is supercon
<rqou> yeah somehow i don't really know anything about these
<rqou> other than people (mostly @pdp7) flooding my TL about it
<esden> so far supercon is the best US based hacker related conference I have been to
<q3k> i went to the hackaday unconference in dublin, it was pretty decent
<q3k> although very fast paced and draining for me
<rqou> not BH/DC?
<q3k> FUCK defcon
<q3k> it's garbage
<esden> wtf no both suck
<pointfree> sorear: Yeah kc5tja has given an enourmous number of talks at svfig meetups. Always something new to apply. I'm tempted to write an irc client and gopher client for one of the kestrel forths.
<jn__> yay, gopher \o/
<esden> rqou: do not waste your time on BH/DC ... unless you have a very good commercial reason to go there do not waste your time or money
<q3k> even the ctf at defcon doesn't make up for the shitty conference
<q3k> and it's a good ctf.
<whitequark> sign, so many off by ones
<whitequark> sigh*
<daveshah> whitequark: I feel in some contexts that could even be a Freudian slip
<whitequark> hahaha
<pointfree> jn__: irc and email don't take much code to implement. That just leaves the web. If I were to set up a gopher proxy to the web, based on the readability bookmarklet maybe I could use the kestrel or a microcontroller such as a PSoC 5LP for most of my daily computing needs.
<whitequark> "email doesn't take much code to implement" uh
<whitequark> really
<pointfree> whitequark: I used to send emails with telnet.
<daveshah> If you're going that route, go the full open hog and go for risc-v on ice40
<daveshah> With external hyperram it should easily be able to handle all that stuff
<whitequark> pointfree: I can send emails with telnet
<whitequark> but it's one thing to do that and the other is to have a compliant implementation
<Ultrasauce> i sure as shit wouldn't want to use my own tcp/ip implementation on a daily driver
<rqou> I've sent email using telnet, but going through a local MTA first to fix all of the noncompliance :P
<whitequark> Ultrasauce: i totally would
<whitequark> my tcp/ip implementation is very solid :P
<esden> q3k: yeah I do not attend the ctfs ... I heard those are good. But vegas in general is not a place for humans to be. The drinking party culture at DC is also not really fun. I prefer the Mate fueled culture of CCC, over booze fueled DC...
<Ultrasauce> solid but very much a subset is it not?
<q3k> yep.
<q3k> i mean, ccc isn't sober either
<esden> no definitely not... but that is nothing compared to DC
<q3k> but you don't go there to get waster and P A R T Y A T T H E P O O L organized by CLOWNSTRIKE
<q3k> *wasted
<whitequark> Ultrasauce: define "subset"
<rqou> no ipv6 :P :P :P
<whitequark> it has ipv6
<rqou> oh?
<whitequark> we merged that recently
<q3k> whitequark: by the by, what congestion control algorithm did you employ in smoltcp?
<rqou> nice
<whitequark> q3k: lololol it doesn't have any
<q3k> oh
<whitequark> that's probably one notable omission out of three
<rqou> <troll> no tcp/ip over classic bluetooth PAN </troll>
<whitequark> the other two are window scaling and probing zero windows
<Ultrasauce> well i mean your readme is full of big bold "it doesnt do this" lists
<rqou> but seriously, no non-Ethernet transports
<whitequark> Ultrasauce: sure, because i like being very explicit
<whitequark> rqou: no one wanted it badly enough to implement?
<rqou> i can totally imagine somebody wanting smoltcp to be usable for TCP over SLIP/PPP?
<whitequark> we used to have PPP in ARTIQ
<whitequark> but it wasn't important enough to fund during smoltcp migration
<daveshah> I ran PPP over LoRa once
<daveshah> It was actually usable, at about 1kByte/s
<rqou> also no .1q
<daveshah> Might be interesting for certain low bandwidth embedded applications
<pointfree> whitequark: Yeah I'd probably just write an imap4 forth wordset. I wouldn't write an email server right now.
<whitequark> rqou: no one wanted it badly enough etc
<rqou> wat
<rqou> i actually want .1q
<whitequark> hm?
<whitequark> sure, write a PR :P
<rqou> lol at some point
<q3k> 802.1q sounds trivial to implement
<q3k> unless I'm missing something
<whitequark> sure
<q3k> if you leave that unimplemented I might do it if I ever touch smoltcp
<rqou> it is if you don't care about the priority part
<rqou> (which i personally don't)
<q3k> i don't think anyone does
<rqou> BRCM does
<rqou> my father did
<whitequark> hit BRCM with an ICBM imo
<rqou> lol
<rqou> i actually have used DiffServ though
<q3k> nuke broadcom from orbit indeed
<rqou> i was doing a bulk upload to crashplan and a housemate complained that this made overwatch very laggy :P
<whitequark> i just used linux tc on the router
<rqou> poke the diffserv classes a bit and linux automagically improves it
<rqou> explicit messing with tc isn't required
<rqou> also seriously we have way too freaking many ways to mark "class of service" type of information
<zkms> i just used fq_codel or whatever the heck that's called
<rqou> yeah well crashplan's gui just has a little dropdown that pokes the diffserv label
<rqou> so that was even easier
<whitequark> oh that makes sense
<q3k> small brain: use 802.11p
<q3k> normal brain: manually assign TC classes to devices
<zkms> whats 11p
<q3k> cosmic brain: overprovision the fuck out of your uplink
<q3k> *.1p
<q3k> derp
<awygle> 11p is vehicles
<rqou> oh yeah wifi has yet another way to encode class of service information
<rqou> that's distinct from .1p or diffserv
<rqou> honestly a home network only really needs three traffic classes: bulk, normal, and real-time
<zkms> tbh you can get good results with fq/sfq-ish things that isolate flows and a queueing mechanism that does head-drop and measures the latency it imposes (and keeps it under a certain threshold)
<zkms> without any sort of manual classification
<awygle> Manual classification always feels like you've already lost
<awygle> Train a neutral network to measure perceived latency using some kind of human factors model, te
<awygle> *tweak queueing params based on output
<rqou> lol
<sorear> Are there good implementations of real-time? I mostly hear complaints about USB isochronous
<rqou> yeah i don't get what the deal is with USB isoc
<rqou> afaict on the bus level it's not that much different
<rqou> but apparently in the driver layer everything is fucked?
<whitequark> it's identical on the bus level because it only affects how the host schedules packets
<whitequark> well, almost identical
<whitequark> there's no ACKs and some stupid token toggling
<rqou> yeah, scanlime keeps talking about some complicated AF logic about how USB allocates bandwidth but i haven't bothered yet to look into wtf she's talking about
<rqou> e.g. telling people they're doing it wrong by calling read() in a loop or something?
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<pie_> is there such a thing as a reference implementation
<pie_> (which kind of implies it shouldnt suck >_>)
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<rqou> idk
<rqou> i kinda agree with azonenberg that Ethernet is the proper future
<balrog> USB isn’t going away
<zkms> old: ethernet fronthaul; bold: ethernet keyboard
<pointfree> Ethernet is going away (on laptops)
<awygle> yeah there's things Ethernet doesn't do as well as usb
<awygle> It would be great to get something not-terrible for those niches, but...
<zkms> what are those things
<zkms> i dont know anything about usb
<rqou> i find that the only things USB is good at are ubiquity and low cost
<pointfree> yea, as for things I like about usb itself, nothing comes to mind. I'm drawing a blank.
<balrog> pointfree: I'm curious, anything new on the PSoC side of things?
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<rqou> and issues with "tuples of 16 bit integers" and <strike>DRM</strike>"user-protecting" driver signing are just really really dumb
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<awygle> power delivery, autoenumeration. Both built in and not tacked on patchily implemented afterthoughts. Device classes.
<awygle> "Ethernet mouse" is missing a lot of stuff to make it work
<whitequark> 5 Gbps with USB: trivial
<whitequark> 5 Gbps with Ethernet: requires Thunderbolt
<qu1j0t3> thundernope
<awygle> I quibble with both of those points, but I do get where you're coming from.
<awygle> rqou isn't wrong about the extortion game either. there's tons wrong with usb. but it's also not good to fail to acknowledge the good.
<whitequark> i'm not a fan of usb as you believe have seen
<whitequark> i fucking hate the abomination
<whitequark> it's an example of how to not make a protocol
<balrog> whitequark: where can I get a copy of the Thunderbolt specification?
<whitequark> balrog: not a faintest clue
<whitequark> if it's pirated somewhere i don't know where
<balrog> whitequark: and that's my problem
<balrog> I'm not a fan of USB, but we have it and we have to deal with it
<balrog> it's easier to avoid UEFI/ACPI than USB :/
<balrog> which are other abominations of standards
<whitequark> what gave you the idea that I like Thunderbolt?
<balrog> I'm not saying you like it
<whitequark> the fact that 5 GbE requires Thunderbolt is an argument against using Ethernet vs USB
<whitequark> "it's even worse!"
<balrog> where's 10GbaseT?
<whitequark> also Thunderbolt
<whitequark> I mean anything over 1 GbE is Thunderbolt.
<whitequark> unless you have a desktop which is lol
<awygle> It exists but I think the only phys are in brcm and Qualcomm chips
<awygle> Marvell etc. Nothing you can just buy.
<balrog> yeah that's what it seems like
<balrog> which is what azonenberg was complaining about
<kc8apf> *sigh* another satellite startup thinks they've solved the "bring internet to the world" problem. Almost as bad as blockcahin.
<awygle> kc8apf: who now?
<kc8apf> he seemed to quickly realize that his sales pitch wasn't going to work on me
<awygle> That's a lot of people, burn rate must suck
<kc8apf> has GV backing so they've at least convinced someone that they have a viable business plan
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<zkms> speaking of RF links i found out that apparently there's HFT people using transatlantic HF/shortwave links to get faster latency than fibre; i knew they did this with microwave but i didn't know they'd actually gone to HF >_>
<rqou> just attended a dissertation talk about doing deep learning on complex-valued data
<rqou> essentially it's "yeah, you can do that, but the devil is in the details"
<Bike> i d on't understand how that's different from just having two dimensions?
<rqou> doing it that way doesn't quite work as well
<rqou> so e.g. if you ReLU both channels independently, that's not really physically meaningful for your system
<whitequark> woohooo i think i have conquered half of the FIFOs
<Bike> that sounds like it involves a system more specific than "complex-valued"
<rqou> not really?
<rqou> use case was MRI postprocessing and similar "signals" tasks
<whitequark> rqou: quite amazingly, my transfer function seems to work
<rqou> "transfer function"?
<whitequark> between FIFO addresses
<whitequark> what we discussed yesterday
<rqou> oooh that kind of transfer function
<rqou> too many overloaded terms
<balrog> rqou: we had graduation ceremonies today
<balrog> when's yours?
<rqou> next week
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<Bike> swear the whole area around campus in the city was traffic hell for it
<balrog> Bike: yep it always is
<rqou> it's quite the opposite right now
<rqou> campus is slowly dying :P
<rqou> (it's still finals week)
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<openfpga-github> [Glasgow] whitequark reopened issue #19: Move R12-R16 to top side https://github.com/whitequark/Glasgow/issues/19
<whitequark> rqou: correction: it does not work
<openfpga-github> [Glasgow] whitequark opened issue #40: Add CDONE test point https://github.com/whitequark/Glasgow/issues/40
* whitequark stabs everything
<whitequark> i was assigning 2 to a 1-bit signal because of a copy-paste erro.
<whitequark> oh no it doesn't pass timings now by 0.7 MHz
<jn__> randomize/retry until it passes?
<whitequark> gross as hell
<whitequark> can we just get timing-driven placement in arachne
* whitequark facepalms
<whitequark> replacing 512-deep FIFOs with 511-deep FIFOs solved it
<rqou> oh yeah i would have done that anyways
<rqou> fixes/hides many bugs related to empty/full handling
<whitequark> lol nope
<whitequark> the FIFOs are from migen and well-tested
<rqou> ok, you/sb0 are better/more patient than me :P
<whitequark> and I fix fencepost errors, not paper over them like you
<rqou> wait, is this a single-clock-domain FIFO?
<whitequark> right now yes
<rqou> that's easier to fix correctly :P
<rqou> i've definitely seen people drop an element to make CDC FIFOs work :P :P
<whitequark> meh there's just a gray counter
<whitequark> in the CDC FIFO case
<rqou> if you're careful/patient and actually go debug it :P
<rqou> rather than being in "ship it" mode :P :P
<whitequark> i *am* in "ship it" mode
<whitequark> that just means i debug things faster.
<rqou> ooh now that i have free time i should work on the ИГГ1-64x64M that you made me buy :P
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<rqou> time for me to learn "wtf is a nixie tube?"
<rqou> at least i did learn "wat r a flyback"
<rqou> wait what
<rqou> the existing project on hackaday.io for this is so weird
<whitequark> which
<rqou> why's it BJT-based?
<reportingsjr> folks: don't buy cheap pre-crimped connectors on ebay. It will only end with sadness.
<rqou> ah, because it's stolen from an ancient soviet driver circuit schematic
<qu1j0t3> rqou: Ah shapr and I own examples of this i think
<rqou> welcome to the modern power semiconductor era, we have MOSFETs :P
<rqou> and there's some weird switched capacitor thing going on too?
<rqou> oh _that's_ why
<rqou> it's not a flyback either
<rqou> it's a naive boost converter
<whitequark> lol
<rqou> ok, i really should just start from scratch on this
<rqou> the existing designs for this are all crap from a previous era
<rqou> because it isn't a flyback you can't have good conversion ratios so it uses some weird switched capacitor thing
<rqou> oor you could just get with the times and boost 5V -> 400V directly
<qu1j0t3> /b 6
<implr> repost: checkmate apple: 20:23 <implr> za bardzo nie wiem co kupic/wziac
<implr> derp
<implr> meant to paste this: https://www.youtube.com/watch?v=84UbMd76x2E