<whitequark> awygle: the usual term is "newtypes" and it's very common in FP
<whitequark> now that you mention it, it does seem oddly lacking in rust
<awygle> yeah rust has "newtypes" but they seem to be _strictly_ identical, just renamed
<whitequark> no, `type A = B` is not a newtype
<awygle> there's no custom derive where you pass in a constraint function, or anything nicely ergonomic like that
<whitequark> it's a type alias
<whitequark> `struct A(B)` is a newtype
<awygle> yeah
<whitequark> or rather, `struct A(B)` is rust's replacement of newtypes
<whitequark> since in ocaml you can do `type a = private b`, which is an explicit newtype construct
<whitequark> or `type a = b` and make it abstract in the mli
<whitequark> also I'm not sure why you'd need a custom derive, implementing new is only five lines or so
<awygle> it was just a thought/example
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<awygle> the next open source microcontroller design should be called LEG
<rqou> it'll cost you an ARM and another LEG to buy one :P
<jn__> LEGO will be happy to license some of these :)
<rqou> nah, they can get away with using slow H8s :P
<qu1j0t3> jn__: they'll certainly try to sue
<whitequark> rqou: they're using ARMs for a long time
<whitequark> atmel sam iirc
<rqou> yeah I know
<rqou> the ev3 is a ti AMxxxx (the v5TE one, not a cortex-a)
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<rqou> also ev3dev has an amazing oobe
<rqou> unfortunate nobody seems to really care much about it
<qu1j0t3> you can youtube that shiz
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<mithro> Does anyone know where the names in hlc come from? (daveshah / jhol)
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<rqou> yes, the issue is that you're using conda :P
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<rqou> mithro: serious question, why the heck are you using conda?
<rqou> i thought we've already established that it's a piece of shit, and you aren't targeting physicists or "that weird scientific part of the python ecosystem"
<mithro> rqou: I'm hoping to target windows+mac shortly and conda seems the best option for that
<rqou> have you considered... tarballs?
<rqou> but actually
<rqou> like what i've been doing
<mithro> rqou: Conda isn't great - but it's better then tarballs
<rqou> not according to whitequark
<mithro> rqou: I guess I disagree with whitequark on this topic then
<mithro> rqou: Anyway this bug isn't conda I don't think -- it is some type of shell thing...
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<azonenberg> kc8apf: re format for a fully par'd design
<azonenberg> i think we need to create (for debugging, even if it's not part of the full workflow)
<azonenberg> a generic format akin to XDL
<azonenberg> Something that is chip independent and can be used by different toolchains
<azonenberg> and maps 1:1 to a bitstream but is human readable
<kc8apf> Chip independent and 1:1 to bitstream is pretty challenging
<kc8apf> awygle: see derive-new and derive-more crates. Makes newtype pattern more reasonable.
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<azonenberg> kc8apf: yeah but i think its possible
<azonenberg> basically some way of specifying config bits for each primitive
<azonenberg> and routing tile
<azonenberg> in an abstracted form
<azonenberg> Without the format caring what each tile does
<azonenberg> It's OK if the "XDL" to bitstream mapping is chip specific
<azonenberg> as long as tools can manipulate the intermediate generically
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<rqou> azonenberg: so you mean my internal data structure dump? :P :P
<rqou> it's definitely a 1:1 map to the bitstream
<rqou> (or at least should)
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<azonenberg> rqou: i mean in general though
<azonenberg> not toolchain specific
<azonenberg> we have too much fragmentation now
<azonenberg> the point is trying to unify a bit
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<rqou> ugh i just noticed my data structure isn't actually deserializable
<rqou> thanks rust for having f*cked arrays
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<openfpga-github> openfpga/master b9cfcaf Robert Ou: xc2par: Use trick to make OutputGraph deserializable
<openfpga-github> [openfpga] rqou pushed 1 new commit to master: https://git.io/vhUtb
<rqou> azonenberg: ok, now xc2par really does have a "post-par netlist format" :P :P
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<awygle> whitequark: this sucks. the USB IC is supposed to be for a host so the pinout is all backwards. i'm making it work but like, shit
<rqou> wait awygle what chip are you working with?
<rqou> ah ok
<openfpga-github> [Glasgow] awygle created usb_protection from master (+0 new commits): https://github.com/whitequark/Glasgow/commits/usb_protection
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<awygle> whitequark: i pushed this as a branch, because i'm not very happy with it. specifically the crystal is a bit far from the cypress part and things are just generally crowded. if you can see a way to improve things, please do. i need to get to sleep.
<rqou> wtf I've gotten like 20 ads on birbsite today
<rqou> wtf is going on?
<awygle> goddammit I didn't actually push anything!
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* awygle gets out of bed...
<openfpga-github> [Glasgow] awygle pushed 1 new commit to usb_protection: https://github.com/whitequark/Glasgow/commit/d2df739d44eb40c25ebb08aa0d4a8aba11b82324
<openfpga-github> Glasgow/usb_protection d2df739 awygle: Add USB protection IC.
<azonenberg> awygle: re crystal placement
<azonenberg> one of the reasons i like oscillators is that placement is less critical
<azonenberg> just put a cap on them and a series terminator to the IC and you're golden
<azonenberg> so still two passives like a crystal, cost is very slightly more but usually insignificant
<azonenberg> and more layout friendly
<cr1901_modern> series termination?
<cr1901_modern> (specifically, on the clock? why would you want that?)
<awygle> ringing on a clock input is Bad
<cr1901_modern> Yea, but I thought the load would take care of that
<cr1901_modern> guess not
<awygle> depends on the oscillator and the input. better to have room for a terminator and not need it than need it and not have it
<azonenberg> yeah i normally default to a ~33 ohm terminator for single ended lines
<azonenberg> then adjust if i have problems
<awygle> being honest I rarely terminate local clocks
<awygle> just keep the trace short instead
<azonenberg> i didnt used to
<azonenberg> now i prefer to put the footprint there, i can always 0R it
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<azonenberg> welp, my coasters are inbound
<azonenberg> I ordered the v0.3 boards a day or two later
<azonenberg> So they should be following close behind
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<azonenberg_work> rqou, pointfree: so are you folks both definite for the work party?
<rqou> idk about pointfree
<azonenberg_work> if so, can you PM me email addresses? trying to get a thread going to plan specifics
<azonenberg_work> dates, times, noms, etc
<azonenberg_work> i know if have yours somewhere but send it again to make sure (on my work laptop atm and i dont think i have you in contacts here)
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<reportingsjr> whitequark: what do you use to get screenshots of your scope?
<qu1j0t3> link to said screenshot?
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<reportingsjr> qu1j0t3: I don't have one on hand
<reportingsjr> I'm almost certain that whitequark has a rigol ds1054z which I also just purchased.
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<kc8apf> I've always just saved screenshots to a USB drive
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<awygle> yeah my scope just has a button
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