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<awygle> azonenberg_work: i'm officially bailing on the FPGA meetup tonight. take good notes lol
<azonenberg_work> awygle: lol kk
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<whitequark> rqou: i dunno, maybe ms one day opensources nt
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<openfpga-github> [Glasgow] whitequark opened issue #28: Lattice iCE40HX8K-BG121 121-ball caBGA https://github.com/whitequark/Glasgow/issues/28
<kc8apf> I'm being beaten by 30 yr old copy protection schemes
<whitequark> awygle: poke
<awygle> is poked
<whitequark> what's the factor between DAC control word and output voltage?
<awygle> I don't know it offhand
<whitequark> uhh
<whitequark> it's inverted?!
<awygle> yeah :(
<whitequark> lol okay
<awygle> that's the primary bummer of the technique
<whitequark> maybe I should just
<whitequark> bring up the ADC and measure it experimentally
<awygle> i can math up a linear factor in a second
* awygle never has a pencil when he needs one
<whitequark> awygle: hmm what should i send it via
<awygle> okay, offset and slope are in that doc now
<awygle> that's from voltage actually, not DN
<awygle> whitequark: uh DHL is pretty good usually?
<whitequark> alright
<awygle> i don't ship internationally much
<whitequark> ... why do I have a shared google document titled "#DoesItFart"
<awygle> .....
<awygle> 'that's what they do best!"
<Bike> disappointed in this lack of bivalve gases
<whitequark> 'Several examples heard every day, very audible and stinks to high heaven'
<dingbat> Well that's the best link I've seen this week
<cr1901_modern> Unicorns fart rainbows- whoda thunk?
<cr1901_modern> As do Poptart cats, which is a notable omission
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<openfpga-github> [Glasgow] whitequark pushed 2 new commits to master: https://github.com/whitequark/Glasgow/compare/d5cbdfbb447a...87a8ee021dfa
<openfpga-github> Glasgow/master 87a8ee0 whitequark: Add an explicit device status word and much improve error handling.
<openfpga-github> Glasgow/master d7fb74c whitequark: Add I2C address constants....
<openfpga-github> [Glasgow] whitequark opened issue #29: Add serial number storage to CYP_MEM https://github.com/whitequark/Glasgow/issues/29
<openfpga-github> [Glasgow] whitequark opened issue #30: Expose hardware revision and serial number via USB descriptors https://github.com/whitequark/Glasgow/issues/30
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<rqou> huh, i just assembled a <redacted> and 330 ohm really is too low for modern LEDs
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<whitequark> lol
<awygle> haha
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<zkms> q3k: making GSM baseband.
<openfpga-github> [Glasgow] whitequark reopened issue #12: ON Semi FXMA108BQX QFN-20 https://github.com/whitequark/Glasgow/issues/12
<whitequark> awygle: aaaargh
<whitequark> TPS73101 doesn't have an active low EN pin
<whitequark> combined with the DAC that outputs 0V at startup, this means that, after plugging in, the board outputs 5V5 on Vio pin
<azonenberg> whitequark: time to bodge on a pulldown?
<whitequark> rework a pullup into a pulldown
<openfpga-github> [Glasgow] whitequark pushed 3 new commits to master: https://github.com/whitequark/Glasgow/compare/87a8ee021dfa...985f1d422e66
<openfpga-github> Glasgow/master 985f1d4 whitequark: Implement configuration of I/O buffer voltage....
<openfpga-github> Glasgow/master 690d046 whitequark: Fix DAC addresses on schematic.
<openfpga-github> Glasgow/master c2454d0 whitequark: Pulse ACT LED when there is USB activity.
<whitequark> azonenberg: you should add a checklist item
<whitequark> "verify that active-low pins connect to active-low signals/nets and vice versa"
<openfpga-github> [Glasgow] whitequark opened issue #31: ENVA/ENVB should have pulldowns, not pullups https://github.com/whitequark/Glasgow/issues/31
<openfpga-github> [Glasgow] whitequark closed issue #27: Connect ~ENVA, ~ENVB, ~OEQ, ~ALERT to spare FPGA balls https://github.com/whitequark/Glasgow/issues/27
<openfpga-github> [Glasgow] whitequark commented on issue #27: On second thought having two entities in the system control I/O buffers doesn't sound like such an awesome idea after all, so probably not. And the polarity of ENVA/ENVB is different, too. https://github.com/whitequark/Glasgow/issues/27#issuecomment-386209529
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<rqou> lolol clifford's twitter
<rqou> clifford needs to hire another intern just to answer dumb questions :P
<azonenberg> rqou: funny, i keep using the cheapest leds on digikey
<azonenberg> and they're never high efficiency
<rqou> still higher than the "20mA for a dim red glow" LEDs of the 80s
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<whitequark> azonenberg: wow usb is a steaming pile of shit
<whitequark> just how can a protocol be so useless
<gruetzkopf> hey, intel worked on it
<whitequark> I'll bite
<whitequark> what's wrong with PCI, APIC, HDA and SQL?
<q3k> PCI is okay
<q3k> APIC is ever so slightly overengineered
<whitequark> well yes
<whitequark> it *was* made by intel after all
<whitequark> but it doesn't strike me as horrible
<q3k> HDA is an overengineered shitshow that's impossible to program against https://wiki.osdev.org/Intel_High_Definition_Audio
<whitequark> " The best way to identify HDA is probably just to look for the Class code (4h) and subclass (3h), but the HDA specification doesn't tell you to do this."
<whitequark> off to a good start
<whitequark> "Setting things up at the near end is relatively easy, part of it being done by keyhole surgery through a couple of ordinary ports in the PCI device configuration space, while the rest is done through the memory mapped ports located at an address found at index 10-17h (though the lowest four bits should be taken as zeros)."
<whitequark> wtf
<q3k> scroll down to 'setting up the afg codec'
<q3k> tl;dr you need to traverse graphs in your driver in order to play some audio
<whitequark> "It may be wise to keep count of the number of links in the path just in case a codec sends you round in circles"
<whitequark> yeah this has intel written all over it
<whitequark> "A VMware document notes that "software does not have a reliable way to determine its frequency. Generally, the only way to determine the local APIC timer’s frequency is to measure it using the PIT or CMOS timer, which yields only an approximate result."
<whitequark> what
<q3k> oh, duh
<q3k> you need calibration loops :P
<q3k> that's the least annoying part
<whitequark> no, it's not annoying
<whitequark> it's just ridiculous
<whitequark> the system knows how fast the timer is running!
<whitequark> at least put it in ACPI or something
<q3k> well then you have to parse acpi
<q3k> fuuuuuuuck acpi
<whitequark> h
<q3k> fuuuuuuuuuck the dsdt in particular
<whitequark> o. this is called HPET
<whitequark> "the actual frequency is provided to the operating system by a hardware register giving the number of femtoseconds per period"
<whitequark> lol femtoseconds
<gruetzkopf> heh
<gruetzkopf> i still want to build the maximum length audio path possible in a tegra x1
<gruetzkopf> this includes 36 trips through the digital audio crossbar and 4 through mux/demux
<q3k> i want to run linux on the cortex-r dedicated to audio
<gruetzkopf> on X1 it's a A9
<whitequark> digital audio crossbar
<jn__> also: open TRM, search for "not secured"
<whitequark> that sounds terrifying
<whitequark> hang on
<whitequark> tegra x1 has a core dedicated to audio?
<gruetzkopf> yep
<whitequark> and it's an a9?
<gruetzkopf> yep
<jn__> whitequark: it runs an Opus decoder in the switch
<whitequark> what in the fuck
<q3k> gruetzkopf: right
<gruetzkopf> it can also DMA all over the place
<q3k> whitequark: you will like the x1 block diagram
<gruetzkopf> and apparenty counts as a tz secure source (not yet confirmed)
<gruetzkopf> if that works i need a close look at the opus decoder
<whitequark> what the fuck
<q3k> i like looking at the path from the ccplex to sp/dif
<jn__> silicon space has become too cheap
<gruetzkopf> which of them
<q3k> axi,axi,arm7 data bus,sapb,axi
<whitequark> how does it manage to not fall apart constantly
<gruetzkopf> the chapter on audio processing in the TRM is 200 pages
<q3k> this thing is totally just duct taped together
<q3k> also it has like 4 falcons
<gruetzkopf> https://gruetzkopf.org/audioblocks.png jpeg artifacts not mine
<whitequark> no
<whitequark> do not want
<jn__> this is almost readable
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<implr> q3k: i like how their connections are so nonplanar that they had to route some arrows under the memory controller
<q3k> or the blue/brown arrows for 'control signals' and 'pcie'
<whitequark> ok wtf
<whitequark> who here understands LDOs
<whitequark> I thought I understand LDOs
<whitequark> I was wrong
<whitequark> I'm controlling an LDO with a DAC and a code word change of 1 LSB results in the output jumping from 2.5V to 5.0V
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<openfpga-github> [Glasgow] whitequark opened issue #32: Incorrect Mouser PN for R19, R22 https://github.com/whitequark/Glasgow/issues/32
<gruetzkopf> whoops
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<openfpga-github> [Glasgow] whitequark opened issue #33: Develop a tool to validate capacitor/resistor values against Mouser API https://github.com/whitequark/Glasgow/issues/33
<openfpga-github> [Glasgow] whitequark closed issue #32: Incorrect Mouser PN for R19, R22 https://github.com/whitequark/Glasgow/issues/32
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<openfpga-github> [Glasgow] whitequark opened issue #34: Use a polyfuse instead of a regular fast-blow fuse https://github.com/whitequark/Glasgow/issues/34
<whitequark> rqou: so I counted my turbomolecular pumps again
<whitequark> turns out I have four
<whitequark> I do not remember buying four turbopumps
<gruetzkopf> did you leave them alone in the dark? they tend to breed.
<awygle> morning
<daveshah> just curious, has anyone ever tried to use both iceprog and fx2lafw on the same PC at the same time?
<daveshah> somehow they seem to interfere with each other
<daveshah> libusb weiredness I suppose
<q3k> well they're both looking for the same ftdi chip, no?
<whitequark> daveshah: for some reason sigrok detects ice40 devboards ... oh
<whitequark> tha't's why
<q3k> oh no, fx2 is a cypress..?
<q3k> dunno
<daveshah> yeah
<q3k> iceprog / lattice programmers are just an ft2232
<daveshah> the only thing in common I think is libusb I think
<daveshah> yeah iceprog is ft2232
<q3k> no, libusb shouldn't be a problem ehre
<q3k> *here
<q3k> unless they use it wrong
<daveshah> I'm not sure
<q3k> and keep handles to unused devices open
<q3k> i'm afraid you'll need to ltrace/strace this
<daveshah> iceprog reports weird errors to do with read failures, failing to open port, and failing to set latency timers at different times
<daveshah> sigrok just fails to capture
<q3k> i'd start by getting some ltrace traces from both tools
<q3k> and then grepping for libusb calls
<q3k> the only thing I can think of is sigrok being funny and poking at the ft2232
<q3k> while iceprog is using it
<daveshah> yeah, or something lower down the stack broken
<q3k> from my knowledge occam's razor dictates shitty sigrok code as the likely culprit :P
<q3k> i don't think libusb or the usb linux stack is likely the culprit here
<q3k> likely culprit likely culprit likely culprit
<whitequark> is sigrok code bad?
<whitequark> i found it okay personally
<q3k> not necessarily bad, just the largest and least tested in this case
<q3k> and with the widest area of interaction with devices
<whitequark> right
<daveshah> it seems that is most likely too, iceprog has always been rock solid on its own
<openfpga-github> [Glasgow] whitequark pushed 2 new commits to master: https://github.com/whitequark/Glasgow/compare/4b17418f204d...37c1f1e4a653
<openfpga-github> Glasgow/master 37c1f1e whitequark: Always enable I/O buffers on startup (until alerts are implemented).
<openfpga-github> Glasgow/master 60e9674 whitequark: Fix typo that inverted OED bits.
<awygle> whitequark: looks like it's coming along! awesome!
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<whitequark> awygle: ayup
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<mithro> Morning everyone
<awygle> o/
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<whitequark> awygle: yep, works properly after rework
<whitequark> I used a 51k resitsor instead of 49.9k and this seems to have affected the result somewhat
<awygle> sure, to be expected
<whitequark> yours is ready to be mailed
* whitequark really hates magnet wire now
<awygle> what did you magnet wire? the pull resistor change?
<whitequark> yes
<azonenberg> whitequark: get some 30ga kynar wire
<whitequark> didn't feel ok blasting the target with 5V every startup
<whitequark> azonenberg: i normally use soviet surplus ptfe wire
<azonenberg> and, if you can find it, square cross section bare copper wire
<whitequark> at least, i assume it's soviet surplus
<awygle> yeah definitely. a surprising number of existing solutions do that (looking at you, bus blaster)
<whitequark> but i think i ran out
<azonenberg> circuitmedic "circuit tracks" is the product i use but i imagine there are competitors
<whitequark> awygle: WTF
<azonenberg> awygle: wait what?
<qu1j0t3> whitequark: Yeah ptfe is not exactly cheap new on digikey
<awygle> well 3v3 not 5v but yeah, iirc that's true. it has to be commanded to switch.
<qu1j0t3> errr mine is from mouser, when they had a clearance sale. the only colour i could get was BROWN
<qu1j0t3> of course
* qu1j0t3 mutters no it wasn't it was Newark element14.
<awygle> i use magnet wire that has the melty insulation
<whitequark> i tried to melt this one but it wouldn't budge
<awygle> i find it fairly easy to work with and it takes a huge load off my mind re: accidental shorts (something i'm very paranoid about)
<whitequark> so i stuck the wire in pliers and then used an xacto knife to scrape the insulation off
<whitequark> it's mildly tedious but easy and reliable
<whitequark> however, it took me a while to invent that technique
<whitequark> which is why i'm pissed
<whitequark> two fucking hours spent on rework
<awygle> wow, that's pretty shitty
<azonenberg> meanwhile i just cut a piece off my spool of bare wire
<azonenberg> bend to shape
<azonenberg> then epoxy over the top
<azonenberg> (if it's long, for short runs i leave it bare)
<azonenberg> Skill is great, but the right tools for the job make skill a lot less important :p
<whitequark> i prefer tools
<awygle> epoxy is such a pain in the ass
<whitequark> but i have a flight in three days
<whitequark> and it's a weekend
<whitequark> well basically a weekend
<openfpga-github> [Glasgow] whitequark closed issue #13: Micrel MIC5355-S4YMME MSOP-8 https://github.com/whitequark/Glasgow/issues/13
<kc8apf> Heard today ESA is planning to use http://www.nanoxplore.com/categories/17-efpga.html in a new project. Being ESA, they are thinking about open source tools for it.
<whitequark> 4-LUT, DFF, CYC... is this an ice40 clone?
<whitequark> on a smaller node and with more luts
<kc8apf> that's my impression
<daveshah> I like the fact that "multiple clock" is a feature
<whitequark> lol
<daveshah> I wonder if there has ever been an FPGA architecure that literally allowed only one clock
<whitequark> some small CPLDs?
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<kc8apf> my contact at Thales says they've already been discussing opening up the tools. Sounds like we might get access to official configuration docs and timing models.
<cr1901_modern> I could use a node in complexity between GP4 and HX1K
<whitequark> that's like
<whitequark> lp384
<cr1901_modern> oh wait, I can't read ._.
<cr1901_modern> Oh right, forgot about that
<q3k> >NX-eFPGA blocks are programmed with our in house mapping software (NanoXmap) performing all required steps to transform a synthesizable RTL description into a bit stream downloadable in the NX-eFPGA through various hardware interfaces. The mapping process is built on advanced proprietary algorithms optimized for the architecture and capable of handling complex routing structures as well as LUT utilization
<q3k> greater than 90%.
<q3k> the marketing wank is strong in this one
<q3k> tl;dr 'we rolled our own p&r and it's good enough'
<kc8apf> per my contact: "their tools are not very good"
<azonenberg> kc8apf: ooooh
<q3k> what a twist
<azonenberg> that would be a game changer
<awygle> lmao "advanced proprietary algorithms"
<azonenberg> larger vendor releasing official docs
<awygle> how "larger" is this vendor exactly?
<daveshah> yeah, it would be very exciting
* awygle has never heard of them before
<whitequark> isn't it even fabless?
<whitequark> i mean
<whitequark> not just fabless
<whitequark> it seems to provide ip on demand primarily
<whitequark> do they have any actual products?
<q3k> yeah, they give you a macro to fab the thing yourself in your design
<daveshah> apparently the IDE is "Linux, Python-based"
<q3k> >Our eFPGA IP is available in the form of standard silicon proven hard macros easy to integrate on to SoCs
<kc8apf> I expect it would be similar to LEON
<awygle> they're valued at 2$ on a canadian stock exchange and have never made a profit
<awygle> (2$ a share which is not actually a useful metric)
<daveshah> Looks like their chip viewer might not be too bad
<kc8apf> as in, ESA will push for them to release the complete design free-for-use
<q3k> that would be super cool
<kc8apf> first discussion with Thales today. He's going to see if he can get me early access to docs.
<whitequark> looks reasonably different from ice40 actually
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<kc8apf> EDN article says they've fabbed a few design that are available in dev kits
<kc8apf> "Both contain 35k LUTs, 2.8 Mb of embedded RAM, one 430 Mbps SpaceWire CODEC and embedded DSP, and are available today with ESCC and QML qualification expected in Q2 and Q3 of this year respectively."
<q3k> mmm, spacewire
<kc8apf> just what i need: an FPGA w/ SpaceWire ¯\_(ツ)_/¯
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<whitequark> wtf is spacewire?
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<kc8apf> whitequark: you really don't want to know
<q3k> whitequark: it's a wire for space
<kc8apf> satellite people have unique ideas for data buses
<azonenberg> i thoguht people usually just used arinc 429 for that?
<q3k> I only know of this because I regularly have beers with one very jaded satellite engineer.
<kc8apf> azonenberg: only on planes
<whitequark> off to a good start
<Bike> looks like an old video game
<Bike> in a good way, if it was one
<whitequark> Bike: I was going to tag you but I see that wasn't even necessary
* q3k makes mental note to craft a CTF challenge around spacewire
<whitequark> q3k: "packet switching wormhole routing routers"
<whitequark> "wormhole routing" in context of space agency makes me worried
<awygle> lol spacewire
<q3k> *snrk*
<awygle> spacewire's not _that_ bad
<Bike> why the laughter then
<Bike> it bodes, you understand
<awygle> not that it's good, but i'll take it over e.g. 1553
<kc8apf> awygle: exactly
<awygle> i wanted a very-low-power spacewire impl for cubesats but nobody is interested
<q3k> awygle: cubesats are on my bucket list of things to do when I become rich
<Bike> i don't think LCL exactly counts as blood
<whitequark> cubesats are old, the new hotness is orbsats
<whitequark> worship the orb
<Bike> oh like that one balloon thing
<awygle> ORB IS HORSE
<Bike> i love that thing
<awygle> Bike: balloon thing?
<Bike> sec
<Bike> don't bother putting electronics or anything on your satellite
<Bike> zero power
<awygle> and the new hotnesses are all basically chaffe (chaf?)
<awygle> chafe?
<awygle> Bike: what... is this
<Bike> it's a balloon they put in space
<Bike> you bounce signals off it
<Bike> or did, i mean, it's gone now
<awygle> oh wow
<awygle> that's pretty cool
<Bike> https://upload.wikimedia.org/wikipedia/commons/7/78/LAGEOS-NASA.jpg fact: all passive satellites are cool
<awygle> not as cool as the 'build an ionosphere' guy
<Bike> that was fucked up
<awygle> but very cool
<Bike> privatize west ford
<whitequark> "build an ionosphere"?
<awygle> Project West Ford - launch a bunch of copper needles into space to give signals something to bounce off of in case of sunspots or Soviet EMP
<Bike> one of those us military exuberances, like when they wrote up a proposal to make wyoming a radio transmitter
<Bike> "not like we're using it for anything else"
<awygle> i missed this one
<whitequark> oh
<Bike> oops, wisconsin
<awygle> what a great name
<Bike> project happy, or project blood, depending on your etymological decisions
<awygle> i love the word Sanguine
<qu1j0t3> it's OKAY
<qu1j0t3> I use it from time to time
<qu1j0t3> and of course nobody knows what the heck i meant
<Bike> use what
<Bike> "sanguine"?
<Bike> i thought you meant, like, wyoming
<whitequark> "The Clam Lake facility, which served as the test site and was originally called the Wisconsin Test Facility (WTF)"
<whitequark> appropriate
<qu1j0t3> the word 'sanguine', which i do not think means "happy"
<awygle> it's one of those things, like using the other meanings of "affect" and "effect", that is good amateur grammarian snipe bait
<qu1j0t3> yes
<Bike> "Anticipating the best; optimistic; not despondent; confident; full of hope."
<Bike> close enough
<qu1j0t3> obscure senses FTL/FTW depending on pov
<qu1j0t3> Bike: "not despondent" would be the closest to how i would have defined it
<Bike> "irresponsible mirth; indulgent in pleasure to the exclusion of important matters" oh that's more like it
<qu1j0t3> which dictionary is this? :)
<Bike> wiktionary, so if you want to impeach it go ahead
<qu1j0t3> those are senses i wasn't familiar with
* qu1j0t3 checks the closest dictionary
<Bike> it quotes shakespeare tho
<q3k> Bike: sanguine's 'happy' etymology actually stems from 'blood' anyway
<qu1j0t3> interesting.
<Bike> i've never actually heard it in relation to blood, and i only realized there was a connection when i heard "consanguinity" in anthropology class
<qu1j0t3> i didn't realise it was so POSITIVE
<Bike> q3k: yeah, like "melancholy"
<awygle> lol "ensanguinate"
<Bike> or bilious, but that's kind of more obvious
<Bike> imo, exsanguinate.
<q3k> Bike: the blood etymology in it is fairly obvious if you know romance languages
* qu1j0t3 toasts everyone with sangria
<qu1j0t3> q3k: Yes :)
<whitequark> Bike: i was thinking of exsanguination
<Bike> q3k: well, you see.... i don't
<Ultrasauce> this is definitely a subject that requires a sense of humour
<qu1j0t3> Bike: haha, bilious... great segue
<awygle> yeah but the connection to the four humors thing is less obvious
<q3k> Bike: fair enough, I'm a bit of a language nerd
<awygle> it's basically a yandere word
<Bike> and i'm almost positive i've never heard "choleric" to refer to an emotional state
<Bike> or at all, really
<q3k> Bike: 'choleric' is a thing in polish, interestingly (choleryk/cholerycznosc)
<Bike> nice
<Bike> meaning what, angry?
<q3k> so is 'sangwinik', TIL
<q3k> choleryk meaning agitated, vivid, ...
<Bike> and it's in common use?
<q3k> ambitious
<q3k> well, not ambitious
<q3k> can't really translate it well
<q3k> yeah, it is
<Bike> i love that, when some word is obscure in some language but a cognate is common
<q3k> I mean, you might not use it, but you'll understand it / have heard it before
<Bike> unlike "choleric"
<q3k> yeah
<Bike> kind of fell out of fashion along with, like, the british empire
<q3k> there's also this other more common meaning of 'cholera' which means being pissed off / angry / about done with this fucking thing
<q3k> all of this shit is basically untrasnslatable literally
<q3k> which indicates that it's more phraseological than strictly factual
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<whitequark> q3k: ha, cholera means that in polish as well as in russian then
<Bike> oh, damn, "chole" is greekish for bile, so it's the same chole as in melancholy, and when you're the other kind of choleric you're expelling chole
<q3k> i'm not surprised :P
<Bike> learning on a wish
<qu1j0t3> Bike | i love that, when some word is obscure in some language but a cognate is common // This happens VERY often between say English and Portuguese.
<Bike> yeah i've noticed! but i can't remember any examples since i don't actually know portuguese
<azonenberg> whitequark: so what current did you end up running your searchlight^hindicator LEDs at?
<whitequark> 1 mA for green ones
<whitequark> there are three of them which makes things significantly worse
<azonenberg> no i mean, did you rework them>
<azonenberg> ?
<whitequark> no
<whitequark> too lazy :p
<gruetzkopf> spacewire!
<gruetzkopf> i've always wanted to redo my half-assed implementation and implement RMAP
<gruetzkopf> the ECSS-E-ST-50 series of standards is fairly interesting
<awygle> CCSDS/ECSS standards are pretty good generally
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<whitequark> hm
<whitequark> what if I have a toplevel I/O port that has mixed function bits in it in verilog
<whitequark> if I say input or output they all become that
<whitequark> if I say inout yosys wants me to connect it to SB_IO
<cr1901_modern> I would connect it to an SB_IO during finalization, but I could've sworn yosys is just fine w/ inout by itself?
<cr1901_modern> oh wait you said Verilog, not migen
<whitequark> i'm fixing a migen bug
<whitequark> and no
<whitequark> top.blif:138: fatal error: toplevel inout port 'io[0]' not connected to SB_IO PACKAGE_PIN
<whitequark> oh hm
<whitequark> blif
<azonenberg> This might be an icestorm issue?
<whitequark> yes
<azonenberg> if you have an inout pin
<azonenberg> you should be able to assign it to a output-only signal
<azonenberg> and just ignore thei nput
<whitequark> yes, it's an arachne-pnr issue
<whitequark> wtf arachne-pnr uses the gnu brace indentation style
<whitequark> at least it doesn't use gnu indentation, or i would have ragequit
<whitequark> yeah
<whitequark> I fixed it
<whitequark> sec
<whitequark> wtf, the tests are broken
<qu1j0t3> whitequark: yeah, gnu indentation ... honestly i don't get it, it's like a troll. does anyone use it in earnest
<whitequark> the part where they mix tabs and spaces is just completely insane
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<sorear> Do you like that more or less than the form feeds
<whitequark> the form feeds aren't anywhere near as annoying
<whitequark> just some weirdo characters in the middle of code, sure, whatever
<whitequark> did -anyone- run arachne-pnr tests at -all-
<whitequark> if [ x"$?" != x"0" ]; then
* whitequark stabs arachne-pnr into the abdomen
<balrog> whitequark: what if they are tristate?
<whitequark> balrog: elaborate
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<balrog> Like if a pin is intended to be tristate
<balrog> Also I think clifford is the maintainer now
<Prf_Jakob> whitequark: CI has been broken for over a year \o/
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