<whitequark> awygle: now imagine the same thing but directly above you
<whitequark> for three months
<whitequark> at one point i went there with a large metal bar but they were two men who are much larger than me
<whitequark> so i reconsidered
azonenberg_work has quit [Ping timeout: 260 seconds]
genii has quit [Read error: Connection reset by peer]
<openfpga-github> [Glasgow] whitequark commented on issue #26: A flat cable with IDC connectors works just as well and is marginally easier to remove. Vio/Vsense map to non-populated pins on an unmodified cable, those should probably be shorted together. https://github.com/whitequark/Glasgow/issues/26#issuecomment-392219096
<openfpga-github> [Glasgow] whitequark commented on issue #26: Note that the cable should be populated with the connectors facing *opposite* sides of the cable. Guess how I know. https://github.com/whitequark/Glasgow/issues/26#issuecomment-392219448
azonenberg_work has joined ##openfpga
digshadow has quit [Ping timeout: 245 seconds]
<azonenberg_work> awygle: fyi the guys from work are taking the 11:25 ferry
<azonenberg_work> tomorrow
<azonenberg_work> So thats probably a good one to shoot for
digshadow has joined ##openfpga
<digshadow> rqou, azonenberg: I have a XC2C64A-5-VQ100 design using 2 FBs and using 40 inputs, the same inputs going to both FBs. In the first design each FB has 12 outputs, in the second 13. The first design seems to work fine, but the second dies with " Insufficient number of input pins. This design needs at least 40 but only 38 left after allocating other resources", after going from 0 to hundreds of buried nodes
<digshadow> good output with 12 outputs per FB: https://gist.github.com/JohnDMcMaster/749aca2783febb31b573d759829192a8
<digshadow> Any quick thoughts on why this might happen?
<awygle> sounds reasonable
<digshadow> I would expect I should have been able to go up to 16 just fine
<digshadow> oh wait
<digshadow> nvm I get it now
<digshadow> it just s tated it in a weird way
<digshadow> 64 total pins on the device, 64 - 2 * 12 = 40
<digshadow> or rather 2 * 13 = 38
<digshadow> its allocating the output pins first
<azonenberg_work> So you have to constrain the pins
<azonenberg_work> as a workaround?
azonenberg_work has quit [Ping timeout: 252 seconds]
<rqou> azonenberg: passing through Eugene (o/ esden)
<digshadow> azonenberg: no I was just reading the report wrong
<digshadow> basically, they were using a derrived number
<digshadow> that wasn't immediately obvious to me
Zorix has quit [Quit: Leaving]
Guest41456 is now known as gruetzkopf
Zorix has joined ##openfpga
<digshadow> added that check
<digshadow> oops
<digshadow> should be / FBs
Lord_Nightmare2 has joined ##openfpga
Lord_Nightmare has quit [Ping timeout: 248 seconds]
Lord_Nightmare2 is now known as Lord_Nightmare
steakpizza has joined ##openfpga
steakpizza has quit [Remote host closed the connection]
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 248 seconds]
steakpizza has joined ##openfpga
<azonenberg> digshadow: what are you trying to do again? fuzz the zia?
<openfpga-github> [Glasgow] whitequark pushed 1 new commit to master: https://github.com/whitequark/Glasgow/commit/7b10caa743fef11740eca420f9ae567bc26215d6
<openfpga-github> Glasgow/master 7b10caa whitequark: Allow retargeting applets to different port and pins....
<digshadow> azonenberg: yes
<azonenberg> in ise?
<digshadow> but I need to play with a few things first to understand what I can do
<digshadow> yes
<azonenberg> i was thinking of fuzzing the silicon
<azonenberg> Which would be fun to do anyway
<digshadow> go for it
<digshadow> would be fun to see
<digshadow> but...I'm not sure you have time
<azonenberg> me, rqou, and awygle are doing "stuff" after the work party
<azonenberg> Exact definition TBD
<azonenberg> i figure if i have ~8 people working on the house for a weekend i can afford to spend an evening on something else
<azonenberg> awygle: btw, i forget if i mentioned
<digshadow> + others?
<azonenberg> but if you're staying for the hackathon after the construction please bring a change of clothes so you dont get stuff all over the couch/chairs
<azonenberg> digshadow: error_404 and 3 other folks from work, awygle, rqou, me, ally
<azonenberg> all coming over tomorrow in hopes of finishing electrical and framing
<digshadow> gotcha
<azonenberg> In exchange for pizza
<digshadow> let me know if you need any abspestos or such to install
<azonenberg> We already removed all of the asbestos ceilings unfortunately
<azonenberg> and the asbestos floor tiles are already installed
<azonenberg> So i think we're set
<azonenberg> If you have any radon we'll take that though
<digshadow> I saw a cool device once that concentrates basement radon
<azonenberg> and releases it into the hvac system?
<digshadow> by bubbling it through water I think
<digshadow> no into a tank
<azonenberg> aww thats no fun
<digshadow> demo showed them putting a geiger counter in there
<azonenberg> i was thinking pumping it into the baby's bedroom or something
<digshadow> and it spiking up
<azonenberg> Give him super powers
<digshadow> Yeah, i'm fairly certain that works
<digshadow> just make sure its high quality radon, or they might get a lame superpower like ability to grow fingernails quickly
<azonenberg> ooh so like deadpool
<azonenberg> But only in the fingernails?
<whitequark> "asbestos floor tiles"?
<qu1j0t3> "Protect yourself from the licking flames of hell with this one easy trick, finance available"
steakpizza has quit [Remote host closed the connection]
azonenberg_work has joined ##openfpga
<azonenberg> whitequark: old linoleum floor tiles often had asbestos in them
<azonenberg> There's a few parts of the basement that have them
<azonenberg> We haven't had them tested but are treating them as presumed asbestos
<azonenberg> They're non-friable so harmless unless you damage them by scraping them off the floor etc
<azonenberg> Once we get to the point of finishing those rooms we'll either have a pro remove them or just put new tile/whatever over top and entomb them for all eternity
<azonenberg> We also had some asbestos on the ceilings but thats all taken care of
<awygle> "entomb them until the next person buys this house"
<Zorix> we ripped out the asbestos at work
<Zorix> course i had to wade through the dust of that crap several times
<rqou> azonenberg: entering Portland
<rqou> probably stopping here for nomz
<whitequark> rqou: why not just take a plane?
<rqou> $$$
<whitequark> you're driving for like, longer than i am awake today
<whitequark> what
<whitequark> that's like 80$ or something iirc
<rqou> also you have to deal with security theater
<whitequark> not getting an anal probe from a tsa is unamerican, don't you know?!
GenTooMan has quit [Quit: Leaving]
<whitequark> tsa officer
<rqou> i never claimed to be particularly American
<sorear> We also have trains, theoretically
* whitequark bursts into laughter
<Bike> this is no time for jokes
<Bike> is this portland oregon? because the one time i took a train to portland it was three hours l ate
<rqou> I would love a European-style train network here
<whitequark> even i know that the us doesnt have trains
<rqou> we do, for freight
<sorear> There’s one train a day going from here to Portland but it’s the wrong Portland
<rqou> we don't have functional passenger trains worth a damn though
<awygle> It's more expensive to train to Portland than fly from here
<whitequark> yeah
<awygle> if I can be ##openanime for a second... Wtf is Madoka Rebellion? I am baffled.
<Bike> movie sequel to the show, i think?
<rqou> the train is in general more expensive and slower than anything
<whitequark> yep
<whitequark> (to both)
<whitequark> Rebellion is strange.
<whitequark> also, Homura did nothing wrong.
<awygle> I just finished ot
<awygle> and I can't like, process it in a useful way. It's just weird as hell. And also Monogatari as hell lol
<whitequark> well duh SHAFT
<awygle> The Most Shaft Anime
noobineer has joined ##openfpga
<awygle> well yeah but the anime was shaft too and it didn't have the head tilt
<whitequark> and yeah you'll need a few tens of hours to really dissect its philosophy
<whitequark> ha
<whitequark> awygle: https://i.imgur.com/Ifdrnp3.gif
<awygle> lol
<Bike> that goat knows what it's doing with its life
<awygle> I was looking for power lines but we got bridges instead
Lord_Nightmare2 has joined ##openfpga
<zkms> apparently some of the monogatari power line scenes are directly traced from IRL power lines
Lord_Nightmare has quit [Ping timeout: 252 seconds]
Lord_Nightmare2 is now known as Lord_Nightmare
<whitequark> yeah that happens a lot
<digshadow> rqou: FYI thinking I'm stopping for the day, but this is where I'm at. 1) I can get a fair bit of control how things are laid out using just verilog using (* LOC="FB1" *) stuff + noting tools pack things pretty linearly starting at beginning (as you previously noted) 2) I agree the power thing now is not that useful, I had misinterpreted that output, but now I understand the XC2C a lot better 3) I don't think 2 matters. I think I can t
<digshadow> also azonenberg
<digshadow> the only thing that 2 made me miss is that it won't be official names
<digshadow> oh also I only poked at the tcl API briefly
<digshadow> I need to take a more serious look at that still
<whitequark> "I think I can t" cut off then
steakpizza has joined ##openfpga
digshadow has quit [Ping timeout: 260 seconds]
noobineer has quit [Remote host closed the connection]
Bike has quit [Quit: Lost terminal]
<openfpga-github> [Glasgow] whitequark commented on issue #52: Footprint and symbol merged. https://github.com/whitequark/Glasgow/issues/52#issuecomment-392237288
steakpizza has quit [Remote host closed the connection]
<rqou> azonenberg: passed JBLM
<azonenberg> Roger
digshadow has joined ##openfpga
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 260 seconds]
bitd has joined ##openfpga
<whitequark> whoo, async FIFOs working on glasgow at last
<azonenberg> :D
<whitequark> though icetime reports real weird timings
<whitequark> i'm thinking of adding a GLASGOW_YOLO environment variable that just ignores the timing report
rohitksingh has joined ##openfpga
pie_ has quit [Ping timeout: 245 seconds]
<daveshah> whitequark: is icetime reporting 0.0MHz by any chance?
scrts has quit [Ping timeout: 264 seconds]
steakpizza has joined ##openfpga
Lord_Nightmare has quit [Ping timeout: 252 seconds]
Lord_Nightmare2 has joined ##openfpga
Lord_Nightmare2 is now known as Lord_Nightmare
pie_ has joined ##openfpga
steakpizza has quit [Ping timeout: 252 seconds]
<whitequark> daveshah: no
<whitequark> it's reporting numbers smaller than what would be with synchronous logic
<daveshah> It could just be arachne-pnr's randomness
<daveshah> Because arachne is not timing driven, results can vary quite a bit
<whitequark> could be
<azonenberg> daveshah: what is arachne trying to optimize then?
<azonenberg> And are there plans to replace it with a proper timing-driven router?
<daveshah> azonenberg: arachne places to optimise minimum wirelength only
<daveshah> There are plans in the future both to improve arachne and look at other options
* azonenberg eagerly awaits parallel ice40 par
<azonenberg> :p
<daveshah> Right now your best bet is just to run arachne on lots of cores in parallel and pick the best result :P
<azonenberg> lol
<azonenberg> i meant, testbed for our eventual 7 series parallel par
<daveshah> Should get at least a 10-15% improvement, if not more
<daveshah> Indeed
<daveshah> I would love to say more...
<daveshah> Personal plans are hopefully still too look at ecp5 par one way or another as my masters project
bitd has quit [Remote host closed the connection]
bitd has joined ##openfpga
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 256 seconds]
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 268 seconds]
clifford has joined ##openfpga
m_t has joined ##openfpga
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 265 seconds]
scrts has joined ##openfpga
<tnt> Turns out assembling a fx2grok-tiny is above my soldering skills ... after 2h30 all I have to show for it is a device that doesn't enumerate :(
Bike has joined ##openfpga
user10032 has joined ##openfpga
rohitksingh has quit [Quit: Leaving.]
rohitksingh has joined ##openfpga
rohitksingh has quit [Client Quit]
rohitksingh has joined ##openfpga
xdeller has joined ##openfpga
steakpizza has joined ##openfpga
xdeller_ has quit [Ping timeout: 256 seconds]
rohitksingh has quit [Quit: Leaving.]
eduardo_ has joined ##openfpga
rohitksingh has joined ##openfpga
steakpizza has quit [Ping timeout: 245 seconds]
eduardo__ has quit [Ping timeout: 260 seconds]
rohitksingh1 has joined ##openfpga
rohitksingh has quit [Ping timeout: 240 seconds]
rohitksingh1 has quit [Ping timeout: 256 seconds]
SpaceCoaster has quit [Quit: ZNC 1.6.5+deb1 - http://znc.in]
m_t has quit [Quit: Leaving]
SpaceCoaster has joined ##openfpga
noobineer has joined ##openfpga
noobineer has quit [Ping timeout: 276 seconds]
noobineer has joined ##openfpga
<tnt> Ok, I must be an idiot but I can't figure out how the retention latch on the samtect cable for the fx2grok-tiny are supposed to work ...
<mithro> Morning
<mithro> If anyone is bored this weekend and wants to help me out, I could really use a verilog model for the xc2064's CLB
<pie_> iirc there was some ?crystal? diffraction method where the random orientations of the particles would result in constructive interference in certain directions but i dont remember what this was, might have just been xray diffraction on a mass of crystals instead of a single one but i couldnt find anything
<pie_> whitequark, ? ^
steakpizza has joined ##openfpga
steakpizza has quit [Ping timeout: 264 seconds]
<sorear> Are you thinking of powder diffraction? Anyway across multiple crystals you have no coherence and no interference
user10032 has quit [Remote host closed the connection]
noobineer has quit [Ping timeout: 260 seconds]
<pie_> well, yeah i guess it must be poweder diffraction im thinking of.
m_w has joined ##openfpga
Xark has quit [Ping timeout: 260 seconds]
Xark has joined ##openfpga
SpaceCoaster has quit [Ping timeout: 252 seconds]
SpaceCoaster has joined ##openfpga
<pie_> i forgot how cool my materials science textbooks are
<pie_> if only id study them
<pie_> sorear, ok yeah turns out its poweder diffraction
<pie_> found it in my *other* matsci textbook
<pie_> i mean specifically this is what i was remembering readin
m_t has joined ##openfpga
pie__ has joined ##openfpga
bitd_ has joined ##openfpga
bitd has quit [Ping timeout: 245 seconds]
pie_ has quit [Ping timeout: 245 seconds]
noobineer has joined ##openfpga
noobineer has quit [Read error: Connection reset by peer]
<awygle> boats boats boats
<mithro> awygle: ship!
<awygle> oh come on! ugh. guess I'm waiting for the *next* boat
<awygle> in 45 minutes. fuck.
<rqou> heh, azonenberg and his $WIFE are pretty cute with matching 3M respirators
<pie__> lmao
<pie__> #wifegoals
<rqou> #waifugoals :P
<pie__> good point
<pie__> rqou should have brought some cat ears as a visiting present
<rqou> well mine are really expensive
<rqou> get your own :P
DocScrutinizer05 has quit [Disconnected by services]
DocScrutinizer05 has joined ##openfpga
bitd_ has quit [Remote host closed the connection]
<jn__> apropos cat ears. we now have a "vacuum" cleaning robot in aachen, and it kind of deserves cat ears
<sorear> A vacuum is, by definition, already maximally clean
<mithro> Just used vpr to place-and-routed the iceblink example (with real pin constraints)
<awygle> awesome
<awygle> I'm finally on the boat