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<cyrozap> My two LimeSDR's arrived today :3
<cyrozap> Total cost was $400. I find it amazing that I can now get two, much better SDRs than my bladeRF for the same price as one. I guess that's what 4 years and sponsorship by Canonical and the IC manufacturer can do :P
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<cyrozap> Here's hoping someone writes an LTE baseband implementation for the FPGA so we can have overpriced, nearly-FOSS LTE dongles...
<mIKEjONES> yea and also betraying and stealing your customer's roadmap while lying to them about the state of one's chip
<mIKEjONES> </no hard feelings>
<balrog> cyrozap: YateBTS?
<cyrozap> mIKEjONES: Oh, wow, I wasn't aware of that...
<cyrozap> balrog: That's mostly telecom backend stuff, I'm talking more about the PHY/MAC layer.
<balrog> ahh...
<mIKEjONES> cyrozap: yea that's never going to happen, lime did their crowdfunding to afford the maskset for the LMS7002M
<mIKEjONES> the chips you received were not mass produced
<mIKEjONES> the company was on the verge (and still is on the verge) of going out of business
<balrog> :(
<balrog> so is it worth picking up a LimeSDR?
<balrog> mIKEjONES: oh, can you access the ADC directly with the LimeSDR?
<balrog> one of the applications I have requires bypassing the RF front end
<mIKEjONES> balrog: "yes" but it's not a real ADC
<mIKEjONES> there's no buffers
<mIKEjONES> meaning you won't be able to sample voltages without a ridiculous amount of signal conditioning
<mIKEjONES> the ADC has tons of missing codes
<balrog> :/
<balrog> so I'd be better off with a bladeRF?
<balrog> (the application would be capturing NTSC video off laserdiscs)
<mIKEjONES> for that purpose sure, the software support on the bladerf is much more stable/mature
<mIKEjONES> btw, if it's not already abundantly clear, I'm nuand / bladeRF :P
<balrog> ahhhhhh
<rqou> holy asymmetrical travel times
<rqou> 1 hr one way, 30 min the other way
<rqou> welcome to the Bay Area
<mIKEjONES> I was just about to ask
<mIKEjONES> 101's starting to look a lot like LA, non-stop traffic
<mIKEjONES> got stuck on 101 at 1AM on a weeknight a few weeks ago
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<cr1901_modern> "(8:07:40 PM) mIKEjONES: there's no buffers" What do you mean "no buffers"?
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<pie__> i made a cpu :3
<pie__> anyone want to try pieasm lmao
<pie__> well its only opcodes
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<lain> :3
* pie__ tries to add load instruction
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<lain> mIKEjONES: the lime has no S&H?
<mIKEjONES> hrm?
<mIKEjONES> oh sample and hold
<qu1j0t3> shipping and handling
<mIKEjONES> lain: each sample is about $50 with Fedex International
<mIKEjONES> :P
<lain> lol
<pie__> tfw you dont even know why something you made 20 minutes ago works
<pie__> oh nvm
<mIKEjONES> it does (it's crap) but the pins go straight to silicon traces, there's a massive impedance mismatch between the ADC, its pins and the PCB
<mIKEjONES> you absolutely cannot use the chip as a standalone ADC
<lain> yow
<mIKEjONES> yea it's no joke
<mIKEjONES> if you touch the ADC pins on the package
<mIKEjONES> you add additional capaticiatnce to the internal ASIC's metal layers
<mIKEjONES> so even if you put some kind of circuit on the ADC pins, but decide to sample baseband RF samples instead, they will be distorted
<lain> that is rather unfortunate
<mIKEjONES> just wait until you see the noise figure and SFDR!
<lain> I've been meaning to see if the hmcad1511 would make a decent ADC for I/Q
<lain> you can run it as 2x 500MS/s
<lain> it's 8bit output but 10bit internally, so no missing codes for various "digital gain"
<lain> it has an amusing internal architecture
<lain> and it's /cheap/
<pie__> yay load works \o/
<qu1j0t3> pie__: yay!
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<mIKEjONES> lain: holy poop
<lain> lol
<cr1901_modern> mIKEjONES: I never really thought about this, but what happens if an ADC is missing its buffers? Signal is attenuated? Or worse?
<lain> basically: distortion
<lain> given the impedance mismatch mIKEjONES mentions, I'm guessing various reflections, distortions, undesirable junk in general
<pie__> oh...hm...iguess a stack would be useful
<pie__> this isnt shenzhen.io >.>
<lain> lol
<pie__> also need to add a reset so i dont have to wait for it to loop around memory lol
<cr1901_modern> I managed to make LM32 deadlock, and now I have to comb through simulations to figure out wtf went wrong
<pie__> tfw youre off by one on the grid and you cant tell so your pins arent actually connected
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<pie__> note to self: i should be using an enable, not gating clock
<pie__> wooo finally got a simple increment loop
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<pie__> ah to be 5am
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<pie__> ok now pipeline it
<pie__> kek
<pie__> jk
<rqou> azonenberg: fs.com 10g optics work fine as far as i can tell
<rqou> ixgbe 0000:01:00.0 eth2: NIC Link is Up 10 Gbps, Flow Control: RX/TX
<lain> pew pew
<mIKEjONES> cr1901_modern: if it's missing its buffers it's not a usable ADC
<rqou> lain: no "firin' mah lazer?" disappoint :P
<mIKEjONES> without buffers it's only good for digitizing current sources that run in the nano-Amp range simce of an ASIC
<mIKEjONES> the impedance matching is also calibrate for on chip signals
<lain> rqou: it was implied
<mIKEjONES> if you drive the pins fron a big ridiculous PCB trace you will see impedance mismatches (reflections), strong intermodulations
<azonenberg> rqou: BER measurements?
<rqou> i have no idea how to get those :P
<azonenberg> send a lot of udp packets or ICMP echoes and see how many come back
<azonenberg> :p
<lain> iperf!
<rqou> no iperf for now
<rqou> due to hardware not being here yet, this is the only 10g-capable node
<azonenberg> Loopback?
<azonenberg> iperf to self
<azonenberg> get a loopback cable
<rqou> i can try that later
<lain> just put a mirror in front of the optics
<lain> I'm sure it'll be fiiiine
<lain> >_>
<lain> <_<
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<rqou> psa: setting the LSB of word 0x2c (byte 0x58) of the eeprom of an ixgbe card disables the sfp compatibility check
<rqou> (without needing a kernel module option)
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<lain> :o
<rqou> yes, it's in the source and undocumented
<rqou> the datasheet for the chip just labels the word as "software reserved"
<rqou> i have no idea if setting this bit disables the check for windows and/or esxi though
<pie__> ixgbe? sfp?
<pie__> oh ethernet
<rqou> gotta have all the gigabits :P
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