<whitequark>
azonenberg: looks like the US is going to be one of Those Countries into which I only travel with a blank phone/laptop
<qu1j0t3>
whitequark: that's not new though
<qu1j0t3>
whitequark: they've been confiscating and searching devices back through Bush years to the best of my knowledge.
<qu1j0t3>
(also not returning them)
<qu1j0t3>
this is documented by a lot of people with a public profile like Moxie Marlinspike and Poitras, but it must happen to thousands with no publicity given that it's been going on for over 10 years
<balrog>
qu1j0t3: yeah, but expect it to multiply a thousand fold now
<qu1j0t3>
sure.
<whitequark>
^
<qu1j0t3>
but it was a problem before, and it was political.
<whitequark>
mind you, *before* it was one of those countries where I only go with FDE and full backups for all my devices
<qu1j0t3>
the social media thing (which i don't think is new either) is a probelm even if your devices are blank.
<whitequark>
but at this point? I'll have to be ready to give up any keys as well
<azonenberg>
whitequark: my policy for many years has been to not travel internationally, period, with any sensitive data whatsoever
<rvense>
qu1j0t3: you mean making people log in to facebook?
<qu1j0t3>
you had to be ready do give up the device before.
<azonenberg>
And I do not know my own facebook password
<qu1j0t3>
rvense: yes - also for visa applications.
<rvense>
fun fact - they've been doing that in iran since maybe 2009
<whitequark>
qu1j0t3: yeah, realistically, no.
<rvense>
at the border
<qu1j0t3>
whitequark: but it was happening.
<azonenberg>
It's stored in a volume on my desktop that i cannot get to remotely
<whitequark>
qu1j0t3: I know
<qu1j0t3>
k.
<whitequark>
the difference is in probability, is al[Dl
<azonenberg>
So if asked to turn over the creds anywhere other than home, I simply cannot comply
* qu1j0t3
nods
<qu1j0t3>
azonenberg: they won't hesitate to deny entry :-)
* azonenberg
debates changing password recovery email to one that I don't have access to on the road
<azonenberg>
qu1j0t3: I dont think us citizens normally get that level of scrutiny at the US border
* qu1j0t3
wonders if anyone remembers Rubber Hose filesystem
<azonenberg>
and i've never had foreign customs ask me for such either
<whitequark>
the social media thing is rather unique to the US
<qu1j0t3>
nor have i, but i'm conscious of the risk
<azonenberg>
i dont get it, tbh
<qu1j0t3>
whitequark: rvense just said it isnt.
<azonenberg>
I dont post anything on fb that is of interest to intelligence
<azonenberg>
And if a TLA really wants to see my profile they can just send a subpoena to zuckerberg
<azonenberg>
why do they need my password?
<qu1j0t3>
it's cheaper
<azonenberg>
Yes but what happens if you dont remember the password? Pretty sure if you have a US passport, at least, they can't turn you away
<whitequark>
qu1j0t3: ... in places not run by theocracies, I should have added
<whitequark>
azonenberg: it's CBP
<whitequark>
they dont want your password to spy on you
<whitequark>
they want your password to harass you about something they dont like
<rvense>
azonenberg: the real why is why are you expecting logic from a bunch of scared old tech-illiterates competing to appear the most resolute..
<whitequark>
rvense: i think that's unfair
<whitequark>
as a security measure it's useless. as a demonstration of power, works very nicely
<rvense>
they don't want your password in particular they just want to slam a desk and yell "i demand action!"
<rvense>
whitequark: i suppose
<whitequark>
the question is why would anyone take it at face value and consider it designed as a security measure
<whitequark>
it's not, like, 2000
<qu1j0t3>
they want to detect a level of political conformity - purity if you will.
<qu1j0t3>
dissenters not welcome.
digshadow has joined ##openfpga
<rvense>
qu1j0t3: whatever it is i don't like it..
* qu1j0t3
nods
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 255 seconds]
digshadow has quit [Quit: Leaving.]
ZipCPU has joined ##openfpga
ZipCPU|Laptop has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 264 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 245 seconds]
ZipCPU has quit [Ping timeout: 255 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 255 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU has quit [Ping timeout: 258 seconds]
ZipCPU|Laptop has quit [Ping timeout: 258 seconds]
kuldeep has joined ##openfpga
kuldeep_ has quit [Read error: Connection reset by peer]
ZipCPU has joined ##openfpga
digshadow has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 248 seconds]
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU has joined ##openfpga
ZipCPU|Laptop has joined ##openfpga
ZipCPU has quit [Ping timeout: 256 seconds]
ZipCPU|Laptop has quit [Ping timeout: 264 seconds]
ZipCPU|Laptop has joined ##openfpga
digshadow1 has joined ##openfpga
digshadow has quit [Read error: Connection reset by peer]
ZipCPU has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 255 seconds]
ZipCPU has quit [Ping timeout: 256 seconds]
ZipCPU has joined ##openfpga
ZipCPU|Laptop has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 240 seconds]
ZipCPU has quit [Ping timeout: 264 seconds]
ZipCPU has joined ##openfpga
ZipCPU|Laptop has joined ##openfpga
ZipCPU has quit [Ping timeout: 258 seconds]
ZipCPU|Laptop has quit [Ping timeout: 256 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
DocScrutinizer05 has quit [Disconnected by services]
DocScrutinizer05 has joined ##openfpga
digshadow1 has joined ##openfpga
digshadow1 has quit [Client Quit]
ZipCPU has quit [Ping timeout: 264 seconds]
massi has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 248 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
kuldeep has quit [Remote host closed the connection]
kuldeep has joined ##openfpga
<rqou>
offtopic: whitequark: how the heck does tcpdump even have CVEs? doesn't it just receive data from the capture interface and write it to a file?
<whitequark>
lol no it has decoders and filters
<rqou>
wait it does? not sharing the wireshark code?
<rqou>
i have literally never used it in that mode before :P
<whitequark>
uhm, it predates wireshark by a lot
<whitequark>
they both use libpcap filters, but in wireshark those are the "capture filters"
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 245 seconds]
<rqou>
huh tcpdump is from the late 80s
<rqou>
i always thought it was the same age as wireshark (formerly ethereal, circa 1998)
ZipCPU|Laptop has joined ##openfpga
<whitequark>
that would be tshark
ZipCPU has joined ##openfpga
ZipCPU has quit [Ping timeout: 248 seconds]
ZipCPU has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 256 seconds]
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 258 seconds]
ZipCPU has quit [Ping timeout: 255 seconds]
Bike has quit [Quit: nut]
qu1j0t3 has quit [Ping timeout: 264 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
kuldeep has quit [Remote host closed the connection]
kuldeep has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 276 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 252 seconds]
qu1j0t3 has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU|Laptop has joined ##openfpga
Marex has quit [Ping timeout: 240 seconds]
Marex has joined ##openfpga
ZipCPU has quit [Ping timeout: 264 seconds]
ZipCPU|Laptop has quit [Ping timeout: 255 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
flaviusb has quit [Quit: Leaving.]
ZipCPU has quit [Ping timeout: 255 seconds]
ZipCPU|Laptop has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
flaviusb has joined ##openfpga
ZipCPU has quit [Ping timeout: 264 seconds]
ZipCPU|Laptop has quit [Ping timeout: 252 seconds]
ZipCPU has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
ZipCPU has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has quit [Ping timeout: 255 seconds]
ZipCPU has joined ##openfpga
ZipCPU|Laptop has joined ##openfpga
ZipCPU has quit [Ping timeout: 248 seconds]
ZipCPU|Laptop has quit [Ping timeout: 240 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
pie_ has joined ##openfpga
promach has joined ##openfpga
pie__ has joined ##openfpga
pie_ has quit [Ping timeout: 248 seconds]
<lain>
lol
digshadow has joined ##openfpga
pie___ has joined ##openfpga
pie__ has quit [Ping timeout: 240 seconds]
pie___ has quit [Ping timeout: 240 seconds]
pie_ has joined ##openfpga
pie_ has quit [Ping timeout: 240 seconds]
<azonenberg>
Welp my eye testing confirms, there's enough capacitance on the protection circuit to cause problems even at 100 Mbps :(
<azonenberg>
hard to say exactly due to scope b/w limits
<azonenberg>
but i see some eye closing
<lain>
:<
<azonenberg>
lain: I know what my next project is going to be
<azonenberg>
maybe even before starshipraider since it's pretty simple :p
<azonenberg>
BER tester
<azonenberg>
and PRBS generator
<lain>
:3
<azonenberg>
with SMA connectors
<azonenberg>
so i dont have to clip onto the 0.1" headers on my zybo with flying leads :p
<azonenberg>
i'm sure thats great for my eye :p
<lain>
haha
<azonenberg>
i did do an eye plot off the incoming vs outgoing data though
<azonenberg>
and its worse after the protection
<lain>
I'm not sure your data is reliable with that scope though, fwiw
<nats`>
yep
<nats`>
it has a lot of capacitance too
pie_ has joined ##openfpga
m_t has joined ##openfpga
<nats`>
but with the startship raider design you can easily pass 100MHz but not sure you can get full amplitude 300 or 500 MHz needed to keep enough harmonic on your square wave
<lain>
the ds1000 series (not the ds1000z series) has really bad trigger jitter
<nats`>
I wonder if the BERT core inside xilinx chip is now free or still a rip off
<lain>
lol
talsit has left ##openfpga [##openfpga]
<azonenberg>
nats`: i know for a fact i cant
<azonenberg>
my calculated -3dB bandwidth based on diode capacitance alone was 204 MHz
<azonenberg>
i need smaller diodes
<azonenberg>
But i cant figure out how to get the clipping i need without them
<nats`>
by not using the IO structure you choose I guess
<azonenberg>
Lol
<azonenberg>
Well, one strategy i'm considering that *might* work
<azonenberg>
is if i found a diode with a higher forward voltage
<azonenberg>
i.e. not a schottky
<azonenberg>
but lower capacitance
<azonenberg>
i might be able to shunt to a voltage other than power/ground
<azonenberg>
also considering some kind of zener
<lain>
put the diode in the feedback loop of an opamp so it has no real voltage across it until the input voltage goes above the opamp's output capabilities :D
<lain>
I don't know if that would actually work but I feel like I've seen some similar fuckery in some analog stuff
<lain>
probably won't work /at speed/ though :P
<lain>
or just.. make the thing hi-Z for input mode, 50ohm for output or IO mode
<azonenberg>
well i need to survive weird voltages in IO mode too :p
<lain>
ehh I dunno
<lain>
I think for high speed, the probes are typically permanently or semi-permanently attached, so my feeling is: for initial probing you want something that will survive anything, but once you know the attachment points, it's safe to go with a typical I/O stage
<lain>
(because it's difficult to achieve the desired bandwidth with a temporary probe, unless perhaps it's an active probe, but in that case you can just make the probe itself disposable)
<lain>
but I know that flies in the face of your front-end design :P
<lain>
I'm very curious to see if it's possible to do what you want :D
<azonenberg>
Yeah
<azonenberg>
Its an extremely difficult set of requirements
<azonenberg>
This is my best attempt so far, it works, just not as fast as i want
<lain>
one thing, I dunno if you've considered
<lain>
divide the signal down on the input
<lain>
well, I guess for IO that doesn't help
<azonenberg>
Yes i considered it, but not for io
<azonenberg>
exactly
<azonenberg>
Protecting a tristated io buffer is just as hard as protecting the input
<azonenberg>
(when the output buffer is *on*, you can just current limit)
<lain>
input-only is so easy
<lain>
hm
<lain>
what if
<pie_>
whatcha guys workin on
<lain>
what if youuuu had separate input and output (dedicated each) at the $expensive board, and then had a simple active probe design doing the actual tristate logic, cheap enough to be disposable?
<lain>
not ideal but maybe a plan C or something
<lain>
:P
<azonenberg>
well the issue is, if an output buffer goes tristate
<azonenberg>
it no longer is shunting any excess voltage throug hthe fet to a power rail
<azonenberg>
so now it has to bear the full voltage
<azonenberg>
i.e. if you put 12V on a 5V FET through a resistor, when turned on, it'll probably be OK
<azonenberg>
b/c you have voltage divider between the terminator and the fet
<azonenberg>
and the fet's rds(on) is small enough you dont see much voltage at the fet
<azonenberg>
but when the fet is off you see the full voltage
<dingbat>
azonenberg: how's the starship raider going?
<lain>
dingbat: azonenberg is in a battle royale with physics
<lain>
:D
<azonenberg>
Sooo i think i may be making progress
<dingbat>
lain: as expected :)
<azonenberg>
First off, reverse recovery time doesnt matter, right?
<azonenberg>
I wont have signals going negative during normal operation
<azonenberg>
and its OK if it takes a couple ns to turn on/off during a fault coming/going
<lain>
they have a patent on this which discusses the design
<lain>
I thought it was a pre-packaged active rectifier but that's not really it
<lain>
it's a mosfet but the gate is sorta schottky design, and then they add an "adjustment" contact smack in the middle of the gate which is doped according to what you want to optimize the device for
m_w has joined ##openfpga
<azonenberg>
interesting
<azonenberg>
lain: anyawy so
<lain>
it can create a very fast, low-leakage diode
<azonenberg>
Tell me what you think
<azonenberg>
Right now my design calls for a diode with <0.5V Vf
<azonenberg>
dumping into the 0 and 5V rails
<azonenberg>
to limit to -0.5 to +5.5
<azonenberg>
What if I had a diode with 1V Vf
<azonenberg>
dumping into dedicated 0.5V and 4.5V rails?
<azonenberg>
With lots of capacitance to handle the surge when i dumped a fault into it, and a source/sink regulator
<lain>
as long as those rails are stiff enough (enough capacitance) to hold the fort until protection kicks in, I don't see why that wouldn't work, off the top of my head
<dingbat>
azonenberg: does the relaxed Vf requirement allow you to speed up the diode enough?
<azonenberg>
Yes
<azonenberg>
my current diodes are 10pF, i found a 7 pF that is still low cap
<azonenberg>
i'm looking at 4 pF ones with higher Vf
<azonenberg>
and i think i can get even lower
<lain>
I don't remember the properties of those FERDs but might be worth a look
<lain>
I think they're mostly intended for rectification though in switchers
<dingbat>
ESD protection diodes for USB3/HDMI/etc have stupid low capacitances, have you looked at those?
<dingbat>
Probably too high voltage tho
<azonenberg>
dingbat: yes, they have poor performance for sustained discharge and also do not have good control over steady-state voltage
<azonenberg>
i used one of those and it clamped me to +8V
<dingbat>
Ah gotcha
<azonenberg>
and ADI confirmed the comparator *cannot* survive 8V for 150 us
<azonenberg>
which is how long it takes my relay to open
<azonenberg>
So looking at the 1N4448 from fairchild right now
<azonenberg>
Average current 200 mA, peak recurrent current 400 mA, 1 sec pulse current 1A
<azonenberg>
Capacitance is 2 pF
<azonenberg>
Forward voltage at 5 mA is 0.62V
<azonenberg>
It does begin to conduct at lower voltages, at 250 mV it leaks 1 uA
<azonenberg>
but for a 50 ohm digital input i can handle 100+ uA of leakage at which point it has Vf of 500 mV
<azonenberg>
then at say 300 mA of fault current Vf is 1.1V
<azonenberg>
So say I had an 0.6V reservoir voltage
<azonenberg>
With an input of 0V i have 600 mV across the diode forward biased, which means I leak about 0.7 mA
<azonenberg>
Which is the equivalent leakage of a 7K ohm pullup to 5V
<azonenberg>
(except obviously as the input voltage rises the leakage drops)
<azonenberg>
Now let's say I apply -12V, through 39 ohms (assuming no ESR from fault source) that's 307 mA
<azonenberg>
At 300 mA Vf of the diode is about 1.15V
<azonenberg>
Which means I'm at 0.6 - 1.15 or -0.55 which is slightly beyond my abs max but not much
<azonenberg>
if i used a slightly larger resistor i'd probably be fine
<azonenberg>
say 45 ohms would put If at 266 mA and i'd clamp almost perfectly to 0.5V
<azonenberg>
Now if i had two of these diodes with 45 ohm series resistance that's a cutoff of 884 MHz
<azonenberg>
Which is the 2nd harmonic of a 400 Mbps data stream... not ideal, but way closer to what i wanted to get
<azonenberg>
So i'd need bias voltages of 0.6V for the low-side clamp and 4.4V for the high side
<azonenberg>
lain: does my math sound sane? Not saying i'd use this diode specifically, just thinking about the architecture in general
promach has quit [Ping timeout: 276 seconds]
<azonenberg>
I'm looking at another diode that leaks a touch more and may need a slightly higher bias but has <1 pF capacitance
<lain>
cutoff of 884 MHz - so that's the -3dB point?
<lain>
and yeah at a cursory glance the math looks fine
<azonenberg>
lain: yeah
<azonenberg>
i think i can get even better, i saw another diode that would let me get well beyond 1 GHz
<azonenberg>
i think i need to prototype this
<azonenberg>
its promising
<lain>
for digital the relevant estimation is knee frequency btw
<azonenberg>
gotta run though
<azonenberg>
oh?
<lain>
Fknee = 0.35 / r
<lain>
where r is the 10-90% rise time
<lain>
as long as the transmission line has pretty flat response up to the knee frequency it's proobably fine
<lain>
it's an estimation of course, but basically: the majority of the energy in a digital signal concentrates below the knee frequency
massi has quit [Quit: Leaving]
amclain has joined ##openfpga
pie_ has quit [Ping timeout: 240 seconds]
eduardo__ has joined ##openfpga
eduardo_ has quit [Ping timeout: 245 seconds]
Bike has joined ##openfpga
ZipCPU|Laptop has quit [Ping timeout: 240 seconds]
ZipCPU has quit [Ping timeout: 256 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
<nats`>
if you go for so small diode stop and use USB3 dedicated protection
<nats`>
it goes above 4GHz
mifune has joined ##openfpga
mifune has quit [Changing host]
mifune has joined ##openfpga
m_t has quit [Quit: Leaving]
mifune has quit [Quit: Leaving]
seu has quit [Ping timeout: 240 seconds]
seu has joined ##openfpga
ZipCPU has quit [Ping timeout: 276 seconds]
ZipCPU|Laptop has quit [Ping timeout: 256 seconds]
ZipCPU|Laptop has joined ##openfpga
ZipCPU has joined ##openfpga
<rqou>
azonenberg: i have a 500mhz bw / 5 GS/s scope if you want me to run tests on it
<rqou>
it even has ethernet so you can remotely control/pwn it :P
<nats`>
for those kind of test the best oscilloscope is a sampling scope
<rqou>
yeah but those are weird and uncommon :P
<lain>
I wouldn't say sampling scope is the "best" for that
<lain>
if you have sufficiently high sample rate and bandwidth, it's fine either way :P
<nats`>
it's the best to draw eye diagramm
<nats`>
especially because you're really more precise jitter side
<nats`>
and a really better resolution
<nats`>
sampling scope are not uncommon at all
<nats`>
they are often sold as communication analyzer like CSA803A
<lain>
modern scopes should have no issue with trigger jitter
<lain>
afaik
<nats`>
yep but still issue with amplitude resolution
<lain>
well ok, that is true.
<lain>
depends how much precision you need
<nats`>
we have a 26GHz lecroy at work but we still bought a tektro sampling scope for network analysis
<nats`>
amplitude resolution is a pretty big parameter in an eye measurement
<lain>
can I borrow that lecroy
<lain>
and by borrow I mean steal
<rqou>
i had access to a very similar lecroy when i was at broadcom
<nats`>
if I could I would :D
<lain>
I have an agilent dsox2024a
<nats`>
you were at broadcom ?
<lain>
it does things
<rqou>
unfortunately i was trying to measure i2c (nobody could find the "generic crappy 300mhz scope")
<nats`>
which BU ?
<lain>
lol
<rqou>
it was also unavailable for a week because some guy decided to hook it up to something and put a "do not touch" sign on it
<rqou>
until my other coworkers noticed that that guy was on vacation
<nats`>
rqou where were you in broadcom ?
<nats`>
STB ?
<rqou>
applications engineering for the ethernet switches
<nats`>
ok :)
<nats`>
anyway I have a CSA803A at home :)
<rqou>
aka "customer says thing doesn't work" department :P :P
<nats`>
I don't power on it really often :p
<nats`>
yep you were an FAE ?
<rqou>
it's called AE which is one level behind the FAE
<nats`>
oky :)
<rqou>
broadcom has a ridiculous amount of support staff
<nats`>
we made an arad based switch at work :D
<rqou>
oh, you're using those weird parts :P
<nats`>
not my project, it was made by an other colleague but I participated in debug :)
<nats`>
pretty nice board
<rqou>
dune projects get bounced to a different team :P
<rqou>
my team was only strataxgs
<nats`>
and where ar eyou working now ?
<rqou>
now i'm "funemployed" aka working on my own projects
<nats`>
:D
<rqou>
aka "cleaning my room"
<nats`>
maybe one day I'll be funemployed too :)
<rqou>
funemployed does mean no income though :(
<nats`>
yep I guessed that :D
<nats`>
next coming job will be more on the RF side
<rqou>
hmmi know nothing about RF
<rqou>
despite having an amateur radio license :P
<nats`>
I don't know much but I'll learn :)
<nats`>
ah I don't have one but made a lot of rf crap totally illegaly :p
<nats`>
time to slep :)
<nats`>
sleep
<nats`>
good night guyz :
<rqou>
my NAS motherboard has bounced around Kansas City for three days now
<rqou>
FedEx wtf r u doin?
<mtp>
fedex and ups are merging to form a new company: fed-up
<rqou>
at this point it seems the most reliable shipping within the US is actually USPS