clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<mattvenn> In my efforts to make a sliding DFT in Verilog
<tpb> Title: GitHub - mattvenn/fpga-fft: sliding DFT for FPGA, targetting Lattice ICE40 1k (at github.com)
<mattvenn> I'm a bit stuck on how to handle the integer maths
<mattvenn> the 'twiddle factors' are scaled to make the most use of the precision available
<mattvenn> but then when I'm doing the multiplication, things quickly overflow
<mattvenn> in my python implementation, the frequency bins stay low, because all the twiddle factors are <= 1
<mattvenn> how do I handle keeping repeated multiplications within the bounds of my registers?
<sorear> your repo is misnamed, that is not a fft
<mattvenn> I started off doing an FFT and then changed to SDFT
<mattvenn> but what is the difference?
<sorear> do a bit shift? (x * 85) >> 8 ~= x * (1/3)
<sorear> hmm, finite precision is a problem, disappointed that the paper doesn't cover numerical stability at all
<mattvenn> this one touches on it: https://www.dsprelated.com/showarticle/776.php
<tpb> Title: Understanding and Implementing the Sliding DFT - Eric Jacobsen (at www.dsprelated.com)
<mattvenn> but just mentions that you can tweak the coefficients down a little if it overflows
<mattvenn> however, I definitely some scaling happening somewhere before I consider that
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<keesj> there was an other amp hour interview that was ICE/FPGA related
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<keesj> I wonder how stable the tinyFPGA clock is and how the bootloader performs.
<keesj> it was not 100% clear to me what functionality is present when using Yosys
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<mattvenn> it all works with icestudio, which depends on apio, which depends on icestorm/yosys
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<tinyfpga> keesj: the TinyFPGA BX uses a MEMS oscillator from Microchip
<tpb> Title: DSC6000 Family MEMS Oscillators | Microchip Technology (at www.microchip.com)
<tinyfpga> keesj: its accurate within 25ppm and has a jitter on the order of 10s of ps
<tinyfpga> keesj: like mattvenn mentioned, it’s 100% compatible with icestorm/yosys.
<mattvenn> hey tinyfpga !
<tinyfpga> hey mattvenn :)
<tinyfpga> I lurk around here once and a while...get push notifications to my phone when my handle is mentioned
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<mattvenn> cool
<mattvenn> good to see your recent boards worked out well
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<mithro> tinyfpga: Hey!
<tinyfpga> mithro: hey, what’s up?
<mithro> tinyfpga: How goes things?
<tinyfpga> mithro: very busy...was lucky to have time to assemble the samples last night
<tinyfpga> mithro: need to update the website now for the BX so the reviewers have instructions to use Atom IDE with APIO/icestorm
<tinyfpga> mithro: and fill out some paper work for arrow to start an order of FPGAs for the next TinyFPGA BX production run
<mithro> tinyfpga: That would be awesome - interested to see how atom + apio work
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<develonepi3> Are most on this irc using RaspBian to work with IcoBoard?
<mithro> daveshah: Do you know if with the ".param LUT_INIT 0110" can I just pad it with zeros to get the 16b version?
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