clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<mithro> Is there a "icebox_unexplain" -- IE does the inverse of what icebox_explain does?
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AlexDaniel is now known as AlexDaniel``
AlexDaniel`` is now known as AlexDaniel
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<daveshah> mithro: not at the moment, but the icebox_explain output should be lossless so I imagine you could make one
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<tpb> Title: Intel Xeon processor with FPGA now shipping FPGAer (at fpgaer.wordpress.com)
<emeb> Looks like they just slapped an existing processor and existing FPGA down on the same carrier.
<emeb> Alert the media!
<daveshah> At least its using UPI and not PCIe, as I feared
<emeb> Seems like it's got both.
* emeb has no idea what UPI is so is clueless as to why you'd prefer one over the other.
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* mazzoo neither
<mazzoo> but maybe daveshah drops a few more words
<awygle> UPI is QPI but with less Q and more U
<awygle> (it seems to be some kind of intel communication bus, either between CPU cores or CPU to chipset, not sure which)
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