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<
cr1901_modern >
So TIL there are at least 2 connectors for PCIe cards in laptops- "Mini Card" and M.2. And until tonight I erroneously believed ExpressCard was related.
00:59
<
Zorix >
hmm i was under the impression m.2 was only for storage
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<
Zorix >
or it might be that it works for pcie but only m.2 storage works in a pcie that allows for m.2
01:03
<
azonenberg >
m.2 provides connectors for both usb and pcie on the same connector, iirc
01:03
<
azonenberg >
not all hosts or devices implement both
01:09
<
unixb0y >
mithro: whats up?
01:10
<
mithro >
I'm still fighting with make files :-/
01:11
<
unixb0y >
Oh really?
01:11
<
unixb0y >
Anything I can help you with?
01:11
<
unixb0y >
I’m not sure what exactly your issue is
01:11
<
unixb0y >
But if you want you can tell me
01:15
<
mithro >
unixb0y: If you have time to do things, I have plenty of things I need done :-P
01:15
<
unixb0y >
Haha that’s cool :D
01:15
<
unixb0y >
Had a lot of stress because of today’s exam but now it’s over
01:16
<
unixb0y >
I have something next week but maybe I can help a bit in my free times :)
01:16
<
unixb0y >
And after next week also !
01:16
<
unixb0y >
Just let me know 😊
01:16
<
mithro >
unixb0y: Do you have any preference for what you want to work on?
01:17
<
unixb0y >
Not really, but if it’s less Vivado specific that’s better!
01:17
<
unixb0y >
Currently I only have access to Vivado in a VM and it’s very slow
01:18
<
mithro >
unixb0y: Something which would be super useful would be adding Verilog domain support to Sphinx -- that is mostly python coding...
01:18
<
unixb0y >
Python would be awesome!
01:18
<
unixb0y >
It was one of my first programming languages and I’d love to work more with it 👌🏼
01:18
<
mithro >
that would help more then just prjxray
01:19
<
unixb0y >
Okay! In which way?
01:20
<
mithro >
Being able to generate nice documentation from verilog files
01:20
<
unixb0y >
I’ve already used it for something around SymbiFlow that I happen not to remember just now :D
01:20
<
unixb0y >
Oh so you want to generate the docs directly from Verilog?
01:20
<
unixb0y >
“Is” there already something?
01:21
<
unixb0y >
Or an example or a specification?
01:21
<
mithro >
Our current plan was to do doxygen-verilog -> breathe -> sphinx
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<
unixb0y >
Okay alright, I’ll have a look tomorrow!
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<
rqou >
azonenberg: you don't run your kernels with intel_iommu=on?
05:49
<
rqou >
seems to reduce gpu-related crashes but idk if it's foolproof or not
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azonenberg >
rqou: i run them with default debian settings, whatever that is
06:25
<
rqou >
default is off
06:25
<
azonenberg >
i havent looked into hardening further
06:25
<
rqou >
idk why though
06:25
<
rqou >
blame debian for being too conservative i guess
06:26
<
rqou >
all my machines run with intel_iommu=on
06:28
<
smkz >
i was getting weird lockups whilst starting X so i had to put intel_iommu=on,igfx_off a while ago, idk if that issue is fixed though
06:29
<
rqou >
worksforme(tm)
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<
whitequark >
rqou: it's not too conservative
17:03
<
whitequark >
iommu is often pretty broken
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<
rqou >
whitequark: always worksforme(TM)
17:22
<
rqou >
i thought there are workarounds/blacklists for most/all of the buggy chipsets
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<
awygle >
C# promotes int variables but not integer literals, so int number = 512; long l = aBigInt * number; works but long l = aBigInt * 512; doesn't
20:19
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20:28
<
rqou >
lol i never remember promotion rules and always get bitten
20:29
<
awygle >
I would be okay if it was like "oh you needed to cast to long". But they're both integers!
20:30
<
jn_ >
this rule sounds backwards
20:31
<
awygle >
What actually happened is that (unsigned * 512) became unsigned where (unsigned * int) promotes int to long and becomes long. Apparently.
20:31
<
awygle >
Because 512 fits in an unsigned
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