Bike has joined ##openfpga
soylentyellow has joined ##openfpga
<mithro> I know a bit about FIDO
<rqou> yeah?
<rqou> that's just using it normally
<mithro> rqou: Yes, I wasn't saying I could already do what you wanted...
<mithro> whitequark: You were writing firmware for the FX2, right?
m_w has quit [Quit: Leaving]
m_w has joined ##openfpga
<rqou> mithro: from what i've heard the fx2 is awful to work with
<rqou> have you considered using an arm microcontroller instead?
<mithro> rqou: It is
<mithro> rqou: Give me a cheap ARM microcontroller that can do USB2.0 480Mbit to an input/output port?
<rqou> can an fx2 actually sustain that?
<rqou> i know some stm32s have usb high speed
<rqou> but fast gpio usually isn't a priority
<mithro> rqou: Yes
<rqou> O_o
<mithro> rqou: Well, it acts as a dump pipe
<rqou> what would you attach it to? use it as a logic analyzer?
<mithro> rqou: We use it to stream USB video
<rqou> what about doing the extra work and just attaching a ulpi phy to your fpga?
<mithro> rqou: That is what rohit is wokring on
<rqou> not integrated with migen?
<rqou> er
<rqou> not integrated with daisho?
<rqou> oh nvm, it's very incomplete
<rqou> wait, daisho has ulpi support?
<rqou> mithro: why not the daisho core?
<mithro> rqou: He wants to write a migen one
<mithro> rqou: The daisho one does quite a lot in HDL which should be done by a CPU
<mithro> IIRC
<rqou> lol don't tell azonenberg that
<mithro> rqou: Why?
<rqou> azonenberg tends to believe that everything should be done in HDL and not by a CPU
<qu1j0t3> we need to introduce azonenberg_work to the TempleOS guy and watch what happens
azonenberg_work has quit [Ping timeout: 245 seconds]
soylentyellow has quit [Ping timeout: 252 seconds]
<cr1901_modern> 640x480 is the God-Mandated Graphics Mode
<cr1901_modern> err 640x480 VGA*
<mithro> cr1901_modern: Heyo
<mithro> cr1901_modern: I think I have things to chase with you but I can't remember :-P
<cr1901_modern> mithro: Just yell at me in privmsg if you remember, I'm not going to be around tonight
soylentyellow has joined ##openfpga
genii has joined ##openfpga
genii has quit [Quit: GO LEAFS GO !!]
asy has quit [Ping timeout: 248 seconds]
asy has joined ##openfpga
futarisIRCcloud has joined ##openfpga
rohitksingh has joined ##openfpga
rohitksingh has quit [Client Quit]
unixb0y has quit [Ping timeout: 245 seconds]
unixb0y has joined ##openfpga
azonenberg_work has joined ##openfpga
indefini has joined ##openfpga
<bubble_buster> ugh. anyone else have issues with riscv-tools and automake?
ZipCPU|Laptop has joined ##openfpga
<sorear> i usually use riscv-gnu-toolchain, i don't know who maintains riscv-tools or what it's for
<bubble_buster> thanks I'll try that
digshadow has quit [Ping timeout: 245 seconds]
rohitksingh_work has joined ##openfpga
digshadow has joined ##openfpga
<azonenberg> welp
<azonenberg> i'm now even more confused
<azonenberg> :p
<azonenberg> Good new: i found a bug in my bitstream parsing
<azonenberg> Bad news: the new results are, i think, even more confusing
<azonenberg> now i get to go back and re-examine my SVF parsing...
<azonenberg> so, it appears that the vu9p is three SLRs each of which needs 6679260 words to configure
<azonenberg> The bitstream consists of...
<azonenberg> standard header
<azonenberg> sync word
<azonenberg> a bunch of writes to setup registers like normal
<azonenberg> a write to FDRI of 6679260 words (one SLR)
<azonenberg> wrapup stuff, CRC, etc
<azonenberg> then a DESYNC command
<azonenberg> Followed by 400 NOPs
<azonenberg> After THAT comes a new sync word
<azonenberg> with a SHUTDOWN command
<azonenberg> a RCRC (reset CRC)
<azonenberg> a write to register 0x1e (reserved/undocumented) with no content
<azonenberg> And a type-2 write to FDRI
<azonenberg> ... which is 13359580 words
<azonenberg> aka, two SLRs
<azonenberg> Then a START and a DESYNC
* azonenberg is even more confused now :p
<lain> xilinx wut r u doin
<azonenberg> so i think i understand what you're supposed to do (think)
<azonenberg> I have to verify i dont have any MORE bugs
<azonenberg> The headers up to the FDRI write are a kind of "broadcast" data that is supposed to go at the start of every SLR's config
<azonenberg> So you send that, then the first FDRI write goes to the first SLR
<azonenberg> At the end of that you send DESYNC, a bunch of nops, SYNC, SHUTDOWN, RCRC
<azonenberg> (this might only be for unused SLRs? need to check a bitstream that isn't empty in the other two - this is an led blinky)
<azonenberg> The second SLR is the same, but you send the first half of thesecond FDRI write
<azonenberg> then you send the second half to the other one
<azonenberg> Then after THAT you send data to the master SLR to config the chip
<azonenberg> This will make more sense once i pretty up the output and upload it, sec...
<azonenberg> So good news is, its not O(n^2)
<azonenberg> the bitstream is just 3x bigger than i thought
<azonenberg> and http://thanatos.virtual.antikernel.net/unlisted/prorgam-log.txt is what's actually in the .bit
<azonenberg> lain: make any sense to you?
<azonenberg> i think the 0x1e register is a sentinel of some sort, it's never actually sent to the chip
<azonenberg> i think it's "FDRI for the other SLRs"
<azonenberg> So i think basically the algorithm is, send everything from start of bitstream to the 0x1e write to the first SLR
<azonenberg> Then replace the FDRI write in that bitstream with the first half of the 0x1e write and send that to the second
<azonenberg> Replace the FDRI write with the second half of the 0x1e write and send to the third SLR
<azonenberg> then send everything after the 0x1e write to the master to boot
<lain> sounds reasonable
<azonenberg> silly me thinking i could just program it the same way i did a 7 series
<azonenberg> althoguh honestly this probably would be the exact same issue with a monolithic 7 series
Bike has quit [Quit: Lost terminal]
keith-man has joined ##openfpga
<rqou> hi guys, i need some halp with basic circuits
<rqou> given a transfer function in the laplace domain, how do i get the cutoff frequency? :P
<rqou> azonenberg?
<lain> by asking Wolfram?
<lain> (I don't know)
<rqou> lol
<rqou> apparently we all suck at basic circuits
<azonenberg> rqou: lol um, not a clue
<awygle> rqou: don't you just... find it?
<azonenberg> the only cutoff i know how to calculate is 1/(2*pi*rc)
<azonenberg> :p
<awygle> rqou: transfer function = (cutoff value), solve for w
<rqou> what is (cutoff value)?
<rqou> lol i totally passed ee40 years ago :P :P
<awygle> probably -3 dB but technically i think you can define eit
<sorear> that sounds vaguely right
<azonenberg> yeah -3 db is the usual cutoff point
<sorear> although if it's a test you probably need to agree with someone else's definitions :(
<azonenberg> what annoys me as a DSP guy
<azonenberg> is that everyone does dB mW
<azonenberg> and not dB V
<azonenberg> So your ADC readings dont convert directly
<azonenberg> i.e. -3 dB is half the *power* not half the voltage
<awygle> what annoys me as an RF guy is dBuV/m :P
<rqou> apparently we're _all_ great at basic circuits today
<sorear> the best thing about V/m is that when you go into the freq domain you suddenly have Hz^-(1/2)
<sorear> what kind of unit is that
<rqou> and this is why i don't do analog
<rqou> (says the guy currently taking power electronics and who has previously taken optics)
<azonenberg> i'm kinda being forced into analog by inconvenient facts of life
<azonenberg> like digital not being actually 0V or Vdd
<azonenberg> if i could stay in the digital domain trust me, i would :p
<rqou> linear optics ABCD matrices are fun
<awygle> i almost never care about the voltage unless i'm like "hmmm did my amplifier explode because i passed its Vec or whatever?"
<rqou> state vectors are [x, theta] and you multiply them by matrices to find the new state
<azonenberg> meanwhile my analog is all test equipment AFEs these days
<awygle> actually i think i mean Veb or Vbe depending on the polarity. the one that makes it asplode real good.
<rqou> so light propagation is {{1, d}, {0, 1}} iirc
<azonenberg> awygle: you want explosive decap?
<azonenberg> try ~11V from a li-ion battery pack with no protection (bare 18650s)
<awygle> here's a fun game to play - choose the length of RG-316 that will allow your amplifier to survive a failed antenna deploy :P
<azonenberg> Backwards
<azonenberg> into a 7805 or similar LDO
<azonenberg> You end up getting very close to an ideal voltage source (super low ESR) into a forward biased diode
<azonenberg> Shrapnel went all over the room
<awygle> (the answer is k*lambda/2 for any integer k)
<sorear> do the batteries explode, or the LDO, or both?
<awygle> that is a good one lol
<azonenberg> sorear: Pieces of the LDO went everywhere, the batteries were fine
<awygle> we tried to blow up our batteries once
<awygle> those suckers are robust
<azonenberg> thankfully it fragmented fast enough that the battery didn't heat up much
<awygle> not big fans of vacuum though
<azonenberg> it failed open because pieces of it were all over the room :p
<awygle> we mostly slow-killed them by charging them while they were frozen
<azonenberg> I was the lucky SOB flipping the power switch but my friend from down the hall freshman year wired it up without checking polarity
<azonenberg> Ever since that incident i've worn safety glasses when first turning on a new board
<azonenberg> (the guy is now a fae for ti, lol)
<sorear> fae=
<azonenberg> field applications engineer
<awygle> "Do you know how many lamps have exploded in my hands over the years?" "No, master." "None. Because I am careful."
<awygle> which reminds me i need to get some Pb-free solder
<awygle> azonenberg: what's your formulation again? SAC705 or something?
<azonenberg> SAC305
<awygle> so close. wrong prime.
<azonenberg> that's kinda the de facto standard for most stuff
<azonenberg> Sn + 3% Ag + 0.5% Cu
<azonenberg> aka Sn/Ag/Cu 3/0.5
<awygle> do you get it from anyone in particular or should i just hop on amazon?
<azonenberg> I buy from digikey just to make sure i actually get the stuff i asked for
<azonenberg> no particular brand preference
<azonenberg> i have two reels from... chipquik i think (yes they make more products than desoldering alloy) that i'm still working my way through
<azonenberg> almost all of my soldering is reflow so i dont use a ton of wire
<azonenberg> really just for connectors and rework
<awygle> yeah i almost never need wire but i specifically designed this board to be iron-solderable
<azonenberg> if you saw my twitter thread
<azonenberg> at some point i want to design a SMD Challenge board that is entirely WLCSP and 01005
<azonenberg> except possibly 0201 for the LEDs as i don't know if you can get them in 01005 yet
<awygle> i did see that
<awygle> you can
<awygle> god only knows why
<azonenberg> i was thinking discrete 74xx DFF + inverter to make a clock divider
<azonenberg> then like an 8 kHz MEMS oscillator
<azonenberg> you can get those all in 0.5mm WLCSP that are 2xN balls
<azonenberg> so should be routable on oshpark rule
<azonenberg> then 01005 0.1 uF decoupling caps scattered around
<awygle> how the hell is "estimated delivery march 12th" two day shipping. go fuck yourselves.
<azonenberg> Digikey has fast shipping, buy from them
<azonenberg> its not amazon prime but its pretty quick
<azonenberg> anyway i'm thinking given the small number of signals i should be able to approach "cellphone mobo" level component density
<azonenberg> with almost everything on the top layer
<azonenberg> i can have long squiggly power/ground since at 8 kHz i doubt there'll be much to worry about re decoupling :p
<awygle> that sounds kind of fun in a way but i have no desire to attempt it lol
<awygle> and the abusive shipping was on cat toys, not solder
<azonenberg> oh
<azonenberg> Buy them on digikey too
<awygle> cat toy, lead free solder, printer
<awygle> not a bad amazon cart
<azonenberg> 1528-1391-ND
<azonenberg> That's a cat toy right?
<sorear> health hazards: old: lead in the solder new: resistors can become airborne and are an inhalation risk
<azonenberg> lol
<awygle> azonenberg: that's three times the price of a fully assembled one on amazon lol
<azonenberg> awygle: lol digikey isnt always the cheapest source for things (that particular one i'd just buy from adafruit as they're the seller)
<azonenberg> But at least you know what you're getting
<azonenberg> i have a rule of not buying parts from sketchy sources unless i plan to decap them
<azonenberg> In which case a counterfeit is an interesting blog post :p
<qu1j0t3> it's a good rule, but i just bought a dozen Yamaha YM3014B DACs from China and they're perfect
<qu1j0t3> actually it was a friend's request for himself and then i realised they were ideal for my own project so i bought some more
<qu1j0t3> however i'm about to test some china-bought analog multipliers, normally fairly pricey, so we shall see about those :)
keith-man has quit [Ping timeout: 245 seconds]
<awygle> what is this potatosemi thing
<awygle> .... so you know how sometimes your fingers or toes feel kind of tight and you flex them strongly to make them pop or otherwise loosen up?
<awygle> it turns out that when your foot has been broken, is not anymore, but still isn't fully healed... the swelling can replicate that feeling almost exactly. except when you flex your toes it fucking _hurts_.
<awygle> that was not smart.
<awygle> anyway, http://www.potatosemi.com/ what is this? is it legit at all?
<azonenberg> I've heard of them
<azonenberg> Havent used 'em
pie_ has quit [Ping timeout: 265 seconds]
<azonenberg> but apparently they make stupid-fast discrete logic
<awygle> a decap of that would be very interesting
<azonenberg> If somebody buys one or two for me, once i get the new lab up and running
<azonenberg> i'll do it
<azonenberg> But keep in mind there will be lead time as i have a backlog to go through
<azonenberg> i havent done decaps in a while
<awygle> rqou: you seem much more susceptible to self-funding ridiculous projects, any interest?
<rqou> sorry busy will look later
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
pie_ has joined ##openfpga
<rqou> awygle: sorry no convenient distributors
<rqou> also, how do you like the "oh shit problem set is due" latency? :P
* awygle continues dreaming of sushi and class hierarchies
<rqou> sushi?
<lain> sushi is delicious
* azonenberg is weird and likes his fish cooked
<rqou> azonenberg your $WIFE needs to turn you into more of a weeb
<rqou> :P
<azonenberg> lol i didnt use chopsticks until i met her
<azonenberg> But she doesnt like seafood at all
<azonenberg> did you not notice all of her sushi was vegetarian? :p
<azonenberg> she likes meat as long as it came from something without gills
<rqou> fine, how about squid? :P
<rqou> no gills :P
<azonenberg> She likes calamari
<azonenberg> (is that squid or octopus? i always mix them up)
<rqou> huh, that really does fit the "no gills" heuristic lol
<azonenberg> Also, we made tiny japanese powder donuts today
<azonenberg> weeb level ++?
<rqou> lol
<rqou> waiting for the day your $WIFE shoves some cat ears on you :P
<azonenberg> monochroma or lain are more likely to do that sooner
<azonenberg> They strike me as the catgirl type :p
<rqou> O_o apparently the universal postal union runs on a giant spreadsheet of doom: https://www.youtube.com/watch?v=dHhkNwE7pr8
<rqou> with 500k cells
<azonenberg> people think the world runs on all this super advanced tech
<azonenberg> nope :p
<azonenberg> it's ibm mainframes using EBCDIC, text files of bank transactions with fixed column formatting because they predate scanf
pie_ has quit [Ping timeout: 240 seconds]
<azonenberg> and more
<rqou> lol
<rqou> only ACH is such a disaster
<rqou> i keep hearing SEPA is slightly less of a disaster
<azonenberg> what about SWIFT? i havent looked int oit at all
<rqou> idk
<rqou> oh btw HK has their own transaction processing system called CHATS owned by the hk monetary authority
<rqou> but it can clear USD/EUR/RMB in addition to HKD
<rqou> it's great for laundering money :P
<azonenberg> lol
pie_ has joined ##openfpga
pie_ has quit [Ping timeout: 248 seconds]
<lain> ha
<rqou> apparently north korea laundered a decent amount of money through HK using CHATS
<rqou> the problem is that the us government doesn't see CHATS transactions unless they specifically ask
<rqou> so transactions slip through their heuristics
<smkz> nice
futarisIRCcloud has joined ##openfpga
pie_ has joined ##openfpga
m_t has joined ##openfpga
pie_ has quit [Ping timeout: 240 seconds]
gnufan1 has quit [Ping timeout: 252 seconds]
pie_ has joined ##openfpga
Bike has joined ##openfpga
futarisIRCcloud has quit [Quit: Connection closed for inactivity]
rohitksingh_work has quit [Read error: Connection reset by peer]
pie_ has quit [Ping timeout: 240 seconds]
rohitksingh has joined ##openfpga
Bike is now known as Bicyclidine
pie_ has joined ##openfpga
genii has joined ##openfpga
rohitksingh has quit [Quit: Leaving.]
rohitksingh has joined ##openfpga
rohitksingh has quit [Quit: Leaving.]
rohitksingh has joined ##openfpga
cr1901_modern has quit [Read error: Connection reset by peer]
cr1901_modern has joined ##openfpga
<pie_> ??? <awygle> here's a fun game to play - choose the length of RG-316 that will allow your amplifier to survive a failed antenna deploy :P
rohitksingh has quit [Read error: Connection reset by peer]
rohitksingh has joined ##openfpga
<awygle> pie_: the failed deployment means the antenna input is not 50 ohms. Thus the voltage on the amplifier is a function of the transmission line length
<pie_> aha
<pie_> weird :P
ZipCPU|Laptop has quit [Ping timeout: 245 seconds]
FabM has quit [Quit: ChatZilla 0.9.93 [Firefox 52.5.0/20171114221957]]
keith-man has joined ##openfpga
m_w has quit [Quit: leaving]
m_w has joined ##openfpga
keith-man has quit [Ping timeout: 276 seconds]
<azonenberg_work> awygle: re antenna failure
<azonenberg_work> a) why do you care about the PA if the antenna doesn't work? Don't you have no contact with the bird and it's a write-off?
<azonenberg_work> b) is it possible to switch an attenuator into the signal path and/or lower TX gain, send a brief transmission while measuring return power, then only go up to full juice if nothing is wrong?
<awygle> azonenberg_work: you ask 2 of the 3 questions i asked in this meeting
<awygle> a) according to our mechanical guys, it was possible that re-firing the deployment mechanism would clear a stuck antenna (it was a burn line under tension, not an explosive)
<awygle> b) yes, but "while measuring return power" is somewhat tricky unless you design the system for it from the start (which our contractor didn't and we didn't ask because neither party really knew what they were doing)
<awygle> c) apparently it was too difficult to actually detect deployment (read: mechanical would have had to do more work and they had more social cachet)
<azonenberg_work> in SAR we lose >#1K ruggedized HTs occasionally when somebody doesn't screw the antenna in all the way and transmits (they're stored in a pelican case w/ antennas remove)
<azonenberg_work> i'm really surprised more radios dont have this kind of protection built in
<awygle> most consumer radios just back off the TX power 3 dB from the explody point
<awygle> apparently professional equipment is allowed to have sharper edges
<azonenberg_work> These are public safety radios designed to be abused a bit
<azonenberg_work> But seriously
<azonenberg_work> they have a low power setting that shouldn't be explodey
<awygle> also you won't see this with QAM radios
<awygle> (or ASK i guess)
<awygle> because you can't drive them as far into saturation as you can with PSK or FSK
<awygle> without royally garbaging up your signal
<azonenberg_work> is it that hard to have the first transmit when it's turned on do that? Then measure return power and go to max after verifying it's OK
<azonenberg_work> and these are analog FM
<awygle> s/SK/M/g
<awygle> "measure return power" typically requires a hybrid coupler which is expensive at lower frequencies
<azonenberg_work> it seems like it should be doable with a high impedance voltage divider right off the antenna line
<azonenberg_work> at low freqs the stub to the resistor wont be worth worrying about
<awygle> also if you're half-duplex it's hard to sort out reflected power from incident power
<azonenberg_work> just have like a 100:1 divider then a peak detector or something, doesnt have to be fancy
<azonenberg_work> you dont even need a tuner
<azonenberg_work> if Vpp on the antenna exceeds X, you have a problem
<awygle> so if you eff up the impedance with a divider, you're going to have transmission line effects on your return power sampler too
<awygle> standing waves etc
<azonenberg_work> Suppose your line is 50 ohms
<azonenberg_work> and you have a 500K ohm divider
<azonenberg_work> that's close enough to an open circuit that the antenna / PA should see it as an open circuit
<awygle> right, but the power detector will see a source impedance of ~infinity
<awygle> you might get away with it if you rectified and LPF'd it right at the divider
<azonenberg_work> That's what i was thinking
<azonenberg_work> I have no idea what band you're working in
<azonenberg_work> but for ~140 MHz VHF you can make htings pretty big
<awygle> this particular instance was 450 MHz
<azonenberg_work> and neglect transmission line effects
<azonenberg_work> you just care about how much current the line can source
<awygle> all our high frequency stuff used better antennas than monopoles
<azonenberg_work> lol
<awygle> protip - a 30cm by 10cm by 10cm cubesat is not a good approximation of the earth, for purposes of antenna design
<awygle> at least not at 450 MHz
<azonenberg_work> kik
<azonenberg_work> lol*
<awygle> 8 GHz? fine no problem (well, different problems, but an integral ground plane is ~free)
<awygle> that 8 GHz radio was a trip too. it had a 40 mil wide transmission line
<awygle> "why did you chop a comically large hole right under THE SYNTHESIZER of all things?" "because if we tried ot match this as GCPW our return loss would be, like -3 dB" "... oh"
<awygle> which reminds me, hey azonenberg_work, do you have a license for a real SI toolkit?
digshadow has quit [Ping timeout: 248 seconds]
<pie_> si?
<awygle> like Si9000 or something?
<awygle> pie_: signal integrity
<pie_> aha
<azonenberg> no i do not
<azonenberg> i really want to get hyperlynx or somethign along those lines
<azonenberg> but i havent had the time to even look at whats on the market for linux
<azonenberg> i recall cadence had halfway decent tooling for *nix years ago, unsure if they still do
<azonenberg> Also i want something that lets me work in kicad and isn't tied to somebody's pcb layout tool
* awygle waits for rqou to materialize out of nowhere to poke whoever that is that talks about writing a field solver
<azonenberg> lain
* azonenberg pokey pokey
<awygle> hm. i wanted a differential GCPW calculator. looks like maybe a free one does exist tho
<awygle> that would let me do USB and similar on two-layer 1.6mm FR4
rohitksingh has quit [Quit: Leaving.]
rohitksingh has joined ##openfpga
<awygle> i'm surprised there don't seem to be any mPCIe to PCIe adapter cards
<awygle> cr1901_modern: not exactly what i was looking for (though very cool!)
<awygle> i just want a passive, cheap card that lets me take an mPCIe wifi card (for example) and put it in my desktop
<whitequark> $10?! that's like the cost of a minipcie wifi card itself
digshadow has joined ##openfpga
<awygle> balrog: i was looking for something less wifi-specific. but i guess the only specific thing is the bracket which is replaceable...
rohitksingh has quit [Quit: Leaving.]
<pie_> minipcie to pci convverter?
<pie_> oh <awygle> i'm surprised there don't seem to be any mPCIe to PCIe adapter cards
<awygle> to be physically compliant with PCIe you need to make a pretty large board, which can get expensive since you likely need multiple layers for your FPGA or whatever. would be nice to do a smaller many-layer module and a cheap(ish) 2-layer carrier, and mini-PCIe seems like a natural fit for that
<lain> can you actually get the right impedance on a 2 layer board?
<azonenberg> i'd do 4 minimum
<azonenberg> for something like that
<azonenberg> you guys remind me i really want to try building IRATEFISH at some point
<azonenberg> the name is a combination of IRATEMONK and SuperFish
<azonenberg> Goal: PCIe NIC that looks like a bog-standard desktop 1000base-T NIC to software (same register sets as one of the ones virtualbox etc uses or something)
<azonenberg> But in between sending packets, it's a DMA master that scans your RAM for expanded AES keys, which it slurps up into a table in BRAM
<azonenberg> When it sees a TLS session, it attempts to decrypt with the extracted keys
<azonenberg> If it gets a successful decrypt, it does some quick sanity checking to make sure the traffic is HTML (vs JSON or something)
<awygle> lain: that's why i wanted to try the differential GCPW solver, if somebody had one
<azonenberg> then inserts ads
<azonenberg> Re-encrypts with the session key
<azonenberg> re-MACs with your HMAC key
<azonenberg> and sends it on to the host OS
<awygle> i think you should be able to get acceptable imedance, you certainly can for single-ended
<azonenberg> boom, undetectable TLS MITM ad insertion
<azonenberg> using the actual TLS cert of the real server
<azonenberg> encrypted with the actual session key
<awygle> basically your coupling to ground is primarily edge-coupled instead of broadside through the dielectric
<kc8apf__> azonenberg: that's what things like Netronome are for
kc8apf__ is now known as kc8apf
<azonenberg> kc8apf: whats that? quick googling suggests some kind of programmable nic
<azonenberg> and i wanted to try going all the way
<azonenberg> to the point of laser remarking the FPGA with some kind of fake OEM logo
<azonenberg> so the card itself would, to a quick glance, look exactly like the real thing
<azonenberg> insert a typo or two to avoid trademark issues
<azonenberg> Basically, the design concept was "what would happen if an ad network hired a bunch of ex-NSA implant developers to come up with the most invasive adware possible"
<sorear> it's probably harder to socially engineer people into installing a pcie card than to run an exe
<azonenberg> you literally have to replace hardware to clean the system, and it's undetectable by any host-based AV
<azonenberg> sorear: the scenario was, this would be put there by the OEM
<azonenberg> and nobody would think anything of it
<azonenberg> just like superfish
<azonenberg> it'd be in there from the factory
<azonenberg> crapware on steroids
mumptai has joined ##openfpga
<awygle> azonenberg: can't you tell if a device is doing a suspicious amount of DMA?
<azonenberg> awygle: Good question, I don't know how hard it would be to detect
<azonenberg> i think a tight IOMMU configuration would lock it down well
<azonenberg> but i don't know of any OSes that actually use vt-d to lock down hardware right
<azonenberg> i've only heard of it being used for vm passthroug hof NICs etc
<sorear> you'd need to be very on top of your update game
<awygle> right but my point was just that it's less "undetectable" than "novel"
<kc8apf> azonenberg: yes, NIC w/ built-in processor and SDK. Used a lot in high-frequency trading
<awygle> (assuming you can in fact get DMA stats)
<azonenberg> well more specifically
<azonenberg> there is no software modified or installed on the host
<awygle> right
<azonenberg> So a reinstall, ram/disk scanner, etc wont help
<azonenberg> Not that it cannot be detected from software
<kc8apf> acts like a normal NIC but can modify buffers in-flight
<azonenberg> yeah but the tricky bit is getting the tls session key
<azonenberg> So i figured dma'ing that out of host ram is the best route
<balrog> [15:01:50] <azonenberg>but i don't know of any OSes that actually use vt-d to lock down hardware right
<balrog> macOS does it for Thunderbolt devices
<balrog> I doubt anyone does it for "trusted" devices
<whitequark> balrog: Apple does
<whitequark> they have bridgeOS now
<whitequark> uhhhh I'm not actually sure how much of what I know about bridgeOS is public yet so I should shut up
<balrog> newosxbook.com/articles/BridgeOS.html
<kc8apf> linux iommu support is coming along. hostile PCIe devices is a plausible attack vector that I know some groups defend against.
<whitequark> but the summary of it is "it's absurdly paranoid"
<balrog> whitequark: that's the thing only in the iMac Pro?
<whitequark> also, CopperheadOS does IOMMU for builtin peripherals
<sorear> whitequark: gp0 has published some details on the iOS IOMMU setup, which is impressive but doesn't count because apple's bespoke ARM IOMMU != vt-d
<whitequark> mostly it's the GPU that shits all over the place
<azonenberg> whitequark: yeah my question was more, desktop linux / windows
<azonenberg> do those lock down the iommu yet?
<azonenberg> To the point that a rogue pcie device can't just go read keymat out of arbitrary physical addresses
<kc8apf> azonenberg: no, but it's coming
<balrog> yeah Windows does have "virtualization based security"
<sorear> does nss actually store expanded keys anywhere?
<balrog> which uses the Hyper-V hypervisor
<azonenberg> i assume any aes library is going to have an expanded key when decryption is in progress
<lain> awygle: for transmission line impedance calculations you can just use Saturn PCB Toolkit, I've verified the results against HyperLynx field solver, it's almost always good, except in extreme circumstances
<azonenberg> and hey, even if you only stick ads in 10% of tls sessions where you happened to DMA right as the expanded key was handy
<azonenberg> its still a defeat
<sorear> anyway random changes to SRI are going to blow your cover unless you make the card field-updatable and watch webdev closely
<awygle> lain: that's what i use too but they don't do differential GCPW
<balrog> I don't think they run drivers in separate spaces though
<balrog> they rely on code signing way too much
<awygle> only SE
<whitequark> balrog: (bridgeos) is that all? damn
<balrog> though Microsoft has made it a royal pain to sign a kernel mode driver
<lain> awygle: it has a differential impedance calculator
<balrog> you need to be a business, and pay ~ $500 / year for a cert
<awygle> lain: it has a differential microstrip calculator
<balrog> and have a certain minimum amount of liability insurance
<awygle> unless it's updated recently
gnufan has joined ##openfpga
<lain> awygle: it definitely has diffpair calc as of several years ago
<awygle> lain: yes but only microstrip and stripline from what i'm seeing
<awygle> there's no ground pour on the top layer in any of their configurations
<awygle> lain: i am looking for this https://electronics.stackexchange.com/q/117214 (and i will try this atlc thing which i'd never heard of until i found this question)
<azonenberg> lain: i'm still waiting for something that will let me calculate ground plane cutouts under SMAs and coupling caps etc
<azonenberg> for free or even an affordable price
<azonenberg> and runs on linux
<lain> awygle: I'm confused, we're talking about pcie on 2L right?
<awygle> lain: yes
<lain> then you don't want copper to the sides anyway
<awygle> the traditional calculation is SS over G, which won't work, but i suspect that GSSG over G would
<lain> err
<lain> mmm
<lain> edgewise coupling is pretty poor, but maybe
<awygle> i have done single ended RF boards on 2L with this technique using normal coplanar waveguide (GSG over G) to get to 50 Ohms
<awygle> but i don't have access to a calculator for the differential form
<awygle> (well. normal grounded coplanar waveguide.)
<lain> ah
<awygle> i've also done SS over G on 2L by making the board 0.6mm thick, but that's not compatible with PCIe obviously
<awygle> (and was a royal PITA to work with)
<awygle> i also like coplanar waveguide techniques because you can match almost arbitrary pad shapes and spaces, but you almost never actually need that it just makes me feel better
<lain> hehe
<awygle> although on PCIe or other high speed serials you wouldn't need those ground plane cutouts azonenberg was talking about anymore lol
<lain> I need to study math more so I can start work on a field solver
<lain> I can do the math on paper, and I can code, but there's a pretty big gap between the two, like how to discretize things
<awygle> do everything in floating point! what could go wrong?
<lain> hehe
<sorear> discretizing space, not field values, is the interesting part…
<awygle> an advantage of that kind of work is that there's a plethora of examples to check against
<awygle> it'll be a long time before you get to the point that you might conceivably be more accurate than hyperlynx :P
<lain> that sounds like a challenge
<awygle> sorear: the interesting part is discretizing space in a way that allows for sweet, sweet parallelism
<lain> ^
<awygle> lain: i do not bite my thumb at you, sir, but i bite my thumb, sir
* awygle hopes somebody else studied that play in high school
<awygle> hey azonenberg, you wrote your own ILA like everybody else, right?
<awygle> do you have, or know of, an FPGA debugging core that lets you single-step the clock?
<azonenberg> awygle: i, wjat
<azonenberg> um what*
<azonenberg> so the problem with coplanar waveguides is that as soon as you need to fan them out to hit a connector or something
<azonenberg> bye-bye impedance match
<azonenberg> and yes i wrote my own ila
<azonenberg> i do not single step thoguh
<azonenberg> i do it as close to real time as i can
<awygle> azonenberg: that's the opposite of the problem with coplanar waveguide
<awygle> it's one of the major advantages. You can adjust the spacing and thickness by changing the ground separation distance
<azonenberg> oh wait
<azonenberg> i thought you meant edge coupled to the other trace, not to ground
<azonenberg> derp
<awygle> Yeah that's the complicated situation where idk if you come out ahead, hence wanting the solver
<awygle> I can't imagine it's worse than microstrip though
<awygle> And just to be clear, I don't want to single step the ILA clock, I want to (optionally) single step the system clock
<azonenberg> what i mean is, i dont know where i'd use that
<azonenberg> Since almost all of my stuff has multiple clock domains
<azonenberg> trying to gate them all would be a nightmare
<azonenberg> and a lot of it has interfaces like ethernet that you cant exactly stop
<awygle> sure. I think it would be helpful for state machines etc. Not all that often for sure
<azonenberg> eh, maaaaybe
<azonenberg> i usually just do one ILA capture on the stuff of interest then stop to think about it
<azonenberg> then change the rtl and repeat
<cr1901_modern> balrog: I don't know how to do it, but libwdi allows you to get around the signing problem. It puts the burden on the user to run a program to do the signing though.
<balrog> those are for usermode drivers I think
<cr1901_modern> Oh. Well, it's still possible to get your own custom kernel driver to other people without forcing them to run in Test Mode I think.
<cr1901_modern> I remember complaining about it once Microsoft forced signed drivers and someone offerred a solution (I'm not paying them)
<balrog> you don't have to pay MS, you have to have a business with a ton of liability insurance and pay a CA for an EV Code Signing cert
ZipCPU has quit [Ping timeout: 248 seconds]
m_w_ has joined ##openfpga
m_w has quit [Ping timeout: 240 seconds]
stefanct has quit [Ping timeout: 240 seconds]
<sorear> pcie is taking over *everything*
<awygle> which is sad because SD is a JEDEC standard and is free
stefanct has joined ##openfpga
<awygle> buf UFS isn't (or well, UFS is but MIPI M-PHY isn't) so it's functionally not
<azonenberg> What about SD UHS-II?
<sorear> MMC is JEDEC, the SD Card Asssociation is a separate body
<azonenberg> thats a high speed diff serial
<azonenberg> is that actually used?
<awygle> sorear: oh really? huh
<awygle> azonenberg: the UHS-II is 16 pins
<azonenberg> no it's one diffpair each way
<azonenberg> plus grounds
<awygle> oh but it's high speed serial
<awygle> weird
<azonenberg> its a second row of pins
<azonenberg> the cards support other modes too
<azonenberg> UHS-1, on the other hand, is iirc LVCMOS18 single ended signalling
<awygle> mhm i see now
<azonenberg> UHS-II is one diffpair plus grounds each way
<awygle> oh boo, sorear is right. 2500$/yr to build sd projects
<sorear> MIPI M-PHY is neither SD cards nor PCIe and I'm not sure how it fits in here
<awygle> sorear: it's the bottom layer of UFS
<sorear> I still don't see how that's relevant, if I'm reading the wikipedia page correctly UFS is a competitor to both SD and PCIe(M.2)
<azonenberg> presumably its a dual-mode card?
<sorear> awygle brought up UFS, and I don't know why
<awygle> i was just listing embedded memory standards and their relative openness
<awygle> as part of my lament about open SD becoming closed PCIe, which i now realize was erroneous
<awygle> leaving eMMC the only option you can implement without licensing, it seems
<azonenberg> yeah sd was always closed
stefanct has quit [Ping timeout: 256 seconds]
<cr1901_modern> awygle: You can implement an SD PHY without paying for the full spec; _florent_ did one.
<sorear> implement or sell?
<azonenberg> you can use the leaked 88e1111 datasheets too
<azonenberg> :p
<awygle> cr1901_modern: do you have a link?
<azonenberg> they publish a 'simplified specification'
<cr1901_modern> Why must someone _always_ point out the flaw in my logic? Can't I be right about something once T_T?
<sorear> PCI-SIG documents are about as easy to find online as IEEE documents
<azonenberg> that removes a lot of the fun details
<cr1901_modern> sorear: Probably only implement
mumptai has quit [Quit: Verlassend]
<awygle> found it
<awygle> i should play with some of these litex cores
<awygle> but i think i'd have to learn litex/migen to do it....
<azonenberg> awygle: i mean if you know where to look you can even get some foundry design kits without signing the NDAs :p
<azonenberg> i know the IBM... 65nm? had a bunch of stuff leak a few years ago
<azonenberg> or was it 32?
<azonenberg> it was an advanced node at the time
<azonenberg> Doesnt mean you wont get sued if you use it
stefanct has joined ##openfpga
stefanct has quit [Changing host]
stefanct has joined ##openfpga
m_w_ has quit [Ping timeout: 245 seconds]
<sorear> meanwhile I'd like to have *some basic idea* what a real PDK looks like even if it's 600nm
soylentyellow has quit [Ping timeout: 252 seconds]
GenTooMan has joined ##openfpga
lexano has quit [Remote host closed the connection]
ZipCPU has joined ##openfpga
soylentyellow has joined ##openfpga