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<
icenowy[m]>
jernej: are you working at H6 display?
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<
LongChair>
icenowy[m]: yeah i think he is :) seems he started to get some working :)
<
jernej>
icenowy[m]: yes, it's already mostly working
<
jernej>
yesterday I just figured out clock issues I have to fix
<
jernej>
and YUV CSC is not implemented yet
<
jernej>
but everything else should work (talking about mixer0 <-> tcon_tv0 <-> hdmi pipeline)
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<
icenowy[m]>
is there anything in tcon_top?
<
icenowy[m]>
or is it just a clock top?
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<
jernej>
icenowy[m]: tcon-top has additional tcon tv gates which have to be enabled prior first tcon usage
<
jernej>
and registers to set tcon <-> mixer relationship
<
jernej>
and to set HDMI source tcon, even if there is only one tcon tv
<
jernej>
I really don't know why they put such unit in H6
<
jernej>
IMO is unnecessary
<
jernej>
but it's there and we have to deal with it
<
jernej>
so to make short answer to your question: tcon-top has along gates additional unrelated settings
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<
icenowy[m]>
jernej: so it's equal on the one on R40?
<
icenowy[m]>
For R40 I'm thinking a proper way to model tcon-top
<
jernej>
beware, clocks are not fixed yet and SRAM C bit is set in U-Boot for now
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<
f11f12>
AXP221s: should respond at i2c address 0x68 (0x34), right?
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<
f11f12>
(it does now)
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