<bfree>
mmc works modular on sun7i for me, not on sun4i yet but that may be pebkac somewhere
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<TheSeven>
someone interested in a linux kernel driver for talking DMX on top of a generic serial port (that is capable of break detection and at least 250kbaud)?
<TheSeven>
it's implemented as a line discipline, so it can be run on top of basically any UART driver (including the 16550a-based one in sunxi :)
<gzamboni>
if i want ot use spi dev i have to set the PI10 11 12 and 13 to <3> to work and in the table it says its mux <2>
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<wens>
it is what the manual says
<gzamboni>
so manual is wrong :/
<oliv3r>
gzamboni: might be a typo; check the sources! a20 may have fixed that (PIO or manual
<gzamboni>
and apparently i wont be able to use NAND + SPI dev on cubieboard as they both use spi0 in a different mux
<gzamboni>
let me check
<wens>
oliv3r: still the same
<gzamboni>
humm, ok,, its right, its the default cubieboard.fex thats wrong
<oliv3r>
gzamboni: you can use SPI0 on Port I (if that's mapped)
<oliv3r>
but SPI0 on port-c + nand is a no go
<gzamboni>
its mux 2, at [spi0_para] in cubieboar.fex its set to 3
<wens>
you can't boot from SPI if nand is present anyway, unless you wipe the nand?
<gzamboni>
im booting from a nfs share
<gzamboni>
maybe thats why they didnt put the right mux, to make nand work
<gzamboni>
so no reason to expose those pins in the gpio unless you dont want nand :P
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<oliv3r>
wens: if ther's no boot signature, then no, you can't :p
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<oliv3r>
wens: but anyway, i wanted to see if i could get a system that boots via SPI-nor
<oliv3r>
gzamboni: that's an interesting dilema anyway
<oliv3r>
gzamboni: .fex is stored on nand
<oliv3r>
so to use spi0 as configured per .fex, you need to read it from nand :)
<gzamboni>
ok, mux 2 is the correct mux to make spi0 work in PI, but as cubieboard uses spi0 on nand they cant use the spi and nand in the same time. thats why the spi0_para pi dont have the right mux value
<oliv3r>
anyway, if the BROM fails to load a signature from NAND, it will configure SPI0 on PC and read the data from there :)
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<wens>
can't use spi0 with nand?
<wens>
i mean , together
<gzamboni>
oliv3r, first read at SPI0 should be "harware softcoded"
<oliv3r>
gzamboni: LOL what's that?
<oliv3r>
wens: not if you use SPI0 on Port C
<oliv3r>
wens: and the BROM only boots from Port C
<oliv3r>
which somewhat makes sense of course, as it's muxed with nand, and you want to boot either/or
<gzamboni>
software inside the Ax ic
<wens>
no chance of rewriting the BROM? :p
<oliv3r>
and that's fine, but I odn't have hardware that brings out spi0 :p
<oliv3r>
wens: well if you have a laz0r that changes bits, possibly :p
<oliv3r>
only a few bits need to be flipped really
<gzamboni>
whats laz0r ? :P
<gzamboni>
i have a fex using spi0 in spi0 to create an spidev and on nand, the spidev worked but i didnt test the nand, i supose it wont work, i will test once i will get back to that harware
<gzamboni>
well, thas confusing i meant (fex spi0) in spi
<gzamboni>
spi0
<gzamboni>
spi0 in pi9 - 13 , thats better
<n01>
Turl: ping
<gzamboni>
as you can have spi1 in pi also
<wens>
if the hardware had breakouts, you could wipe the nand, use spi0 in portC to boot, then switch to portI for spi0, and use nand for storage
<gzamboni>
how will you use spi0 in portC to boot?
<gzamboni>
ok, let me google SPI-NOR boot
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<gzamboni>
i'm so newbie, NOR flash
<oliv3r>
gzamboni: NOR flash connected via the SPI bus :p
<gzamboni>
doesnt it read already directly the NAND flash from spi0 ?
<oliv3r>
gzamboni: my plan was to have a small 512 kiB or maybe 1 MiB nor Flash, load u-boot into it
<oliv3r>
and then boot from sata :p
<oliv3r>
you could use the big nand module in the same fashion of course, but that's a bit silly
<oliv3r>
loading the kenrel + rootfs etc from sata should be much much faster
<wens>
gzamboni: nand isn't spi, they're just muxed on the same pins
<wens>
oliv3r: i use sd + sata atm :p
<oliv3r>
wens: of course that works too; but for example, for the LIME
<oliv3r>
it would be a cheap variant
<oliv3r>
once we have mtd; then using onboard flash is still usefull
<oliv3r>
but those are slow
<oliv3r>
also, with SPI, we'd have something quite likea bios
<oliv3r>
something you never have to update (or not often)
<wens>
anyway I can set a clock parent through DT or something?
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<gzamboni>
there are some spi nand on the market, didnt know it didnt use it, so it wont conflict with the PI spi0
<gzamboni>
in the fex it uses only the chip select mux of the spi0
<oliv3r>
spi nor or nand probably won't matter much to the spi bus driver
<wens>
gzamboni: the SoC has a custom nand flash controller
<oliv3r>
wens: i know what each line above and below does
<oliv3r>
wens: that signle line baffles me; it wants to load the address to 0x4831f
<oliv3r>
the above asm was setting up the DMA of the SPI
<oliv3r>
now when I look at our memory map; the entire 0x40000 block isn't defined; so what could possibly there?
<eagles0513875>
ill be back in a bit guys
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<wens>
oliv3r: no clue
<oliv3r>
wens: :(
<oliv3r>
mripard: :)
<oliv3r>
wens: see I don't know at all how DMA works
<oliv3r>
so not sure why this is done
<oliv3r>
it's not even in mapped memory (that we know off)
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<wens>
for DMA , you tell the controller source and destination address, burst length, and let it do its magic
<oliv3r>
so it works directly with RAM
<wens>
oliv3r: yeah
<oliv3r>
i also don't get why/how the BROM is enabeling DMA mode, since we don't have setup the ram controller at all
<oliv3r>
so this can't even be DMA related; as we don't have ram
<wens>
why don't you try reading from that address in the OS?
<oliv3r>
good point
<oliv3r>
wens: all zero
<oliv3r>
wens: if i write to it and read it back immediatly; nothing
<Turl>
oliv3r: what addr?
<mouchon2>
hi all, i am currently coding smart card driver for the a20 and have some questions. The first one is which class of driver do you think this kind of driver belong ?
<Turl>
oliv3r: that addr is after the srams right?
<Turl>
there's nothing there
<oliv3r>
Turl: yeah exactly
<oliv3r>
but it writes 0x8 there for some reason
<oliv3r>
that addressed isn't referenced anywhere else from the BROM
<mouchon2>
my second question is related to device clocking. Does using clk_get(NULL,"apb_scr"); and clk_get(NULL,"scr"); are enough to enable device clock ?
<oliv3r>
mouchon2: but what i remember from the manual; that sounds like the two clocks the SCR needs yeah
<Turl>
mouchon2: you also need to clk_prepare_enable(..) them
<oliv3r>
mouchon2: as for which device, i'm not sure if we do or do not have smartcard readers in the kernel currently, but initially i'd expect it to be a char device?
<mouchon2>
thanks for the information
<oliv3r>
mouchon2: i do know that various set-top boxes have built in smartcard readers, that dont' connect via serial or USB port; so there should be 'something' somewhere
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<mouchon2>
indeed i have only seen usb scr and char device make sense for me too
<oliv3r>
libv: but since i didn't have hardware and i stopped caring a little :p; it's far from complete or anything, i was just initially experimenting/dabbeling with it
<oliv3r>
Turl: the C part, i'm writing still, you interrupted me :p but I don't get the 0x483f bit
<libv>
oliv3r: right :)
<libv>
oliv3r: i'll give it a whirl
<Turl>
oliv3r: it's a literal
<Turl>
oliv3r: and it's written into the transmit spi0 register I think
<Turl>
so it's spi data or sth
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<oliv3r>
Turl: yeah it loads that number into r0; as an address, no?
<Turl>
ldr reg, =literal isn't it?
<oliv3r>
well look 5 lines about (2070)
<oliv3r>
oh wait, i think i know my thinking mistake
<oliv3r>
the 0x01c20000 is loaded as number into r1, and then used as offset for the store/ldr's
<Turl>
oliv3r: yeah, it loads the base addr as literal
<Turl>
then stores stuff in [literal + offset]
<oliv3r>
so what's the diff between =0x0 and #0x0
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<Turl>
oliv3r: = is the pseudoinstruction to load literals I think
<oliv3r>
wouldn't ldr r0, #0x04831f be the exact same?
<oliv3r>
obviously not, but i don't get it :p
<oliv3r>
less important now then you shows me the errors of my ways
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<oliv3r>
btw, it writes stuff into the SPI0_CTL register if i'm not mistaken
<oliv3r>
which makes perfect sense :)
<oliv3r>
mripard: nvm turl helped me greatly :)
<oliv3r>
libv: feck, when fuck is a little over powered :p
<nedko>
do you know whether someone succeeded with sunxi-nfc-mtd on an a20 and/or with building it against newer sunxi kernel (it doesnt build for me)
<Turl>
oliv3r: I think 0x8 is the tx one (or maybe I was just looking at the wrong place)
<Turl>
oliv3r: I don't see any ldr reg, #blah
<oliv3r>
Turl: pretty sure that offset 0x08 is SPI_CTL; makes sense too
<arete74_>
hi,
<oliv3r>
Turl: no it's mow # really, but I fail at asm (hence why i'm doing this)
<oliv3r>
Turl: but 4831f is setting up the SPI0 controller, setting mode, phase ctrl, polarisation etc; so it makes really sense
<arete74_>
i have an patch for 3.4 stage sunxi_w1 depend on W1_MASTER_GPIO
<oliv3r>
libv: nand ctrl maay even be upgraded; it now has a flag for 2 channel nand support
<Turl>
mnemoc: missing / on some config parameter?
<mnemoc>
Turl: likely :p
<mnemoc>
Turl: wanna fix it? it's just a cgi
<Turl>
I can try
<oliv3r>
bug should be somewhere in the config
<oliv3r>
libv: lol 'extremity_freq = 1.5 GHz
<oliv3r>
btu max fre is 1.2 GHz
<mnemoc>
oliv3r: I'll have the next 2 weeks "off" and I would like to resume the sunxi-3.10 hybrid thing, do you think you can do the pending backporting?
<Turl>
mnemoc: where's cgitrc?
<oliv3r>
libv: i think it be nice to have the a23 BROM in hno's repository, it's likly a new version
<mnemoc>
Turl: /etc/
<oliv3r>
mnemoc: the missing patches? I can try :)
<mnemoc>
Turl: and including a generated thing at /srgit/
<mnemoc>
Turl: and including a generated thing at /srv/git/
<oliv3r>
mnemoc: i ran turls' script to get an updated list of patches; only 10 new ones
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<mnemoc>
oliv3r: at least having everything from sunxi-next
<mnemoc>
oliv3r: cool
<oliv3r>
mnemoc: but you should atleast test the current tree and see if it still works ;)
<oliv3r>
(I don't have a long xmas holiday)
<arete74_>
ok send, is my first linux patch!
<mnemoc>
oliv3r: I will obviously
<oliv3r>
mnemoc: i'll then add the other patches and push that
<oliv3r>
libv: a31 had an axp221 i think; but i doubt the axp223 is much different
<mnemoc>
oliv3r: ok
<oliv3r>
how many PLL's does a10/A20 have? 6 right?
<oliv3r>
or was it 7? maybe 8?
<oliv3r>
A23 has 10, just like A31
<oliv3r>
A23 is A31 with mali
<oliv3r>
at it's 'core'
<oliv3r>
and it smells dual channel memory controller
<oliv3r>
so 1 GiB A23 tablets are possible
<mnemoc>
a quad A23 is supposed to be coming
<oliv3r>
i really wanna get an A23 with a gig :)
<oliv3r>
mnemoc: really?! where do you ahve that info from?
<oliv3r>
if that is true, then that's even more so obvious it's a a20/a31 hybrid
<Turl>
mnemoc: oliv3r should be fixed now, let me know if I broke sth else :P
<oliv3r>
anyway, this is all me speculating
<oliv3r>
Turl: maxima.linux-sunxi.org/postfixadmin is broken
<mnemoc>
hopefully they learned (like samsung) from their PVR experience and returned to mali for good
<Turl>
oliv3r: a23 is quad?
<mnemoc>
oliv3r: I disabled maxima
<oliv3r>
Turl: nah, dual core; but mnemoc just said there's a quad a23 comming?
<mnemoc>
Turl: no, the a23 successor
<oliv3r>
probably a60
<Turl>
oliv3r: I didn't touch postfix though
<mnemoc>
maybe even pin compatible with a23
<oliv3r>
Turl: i know but mnemoc was supposed to fix it but he broke it :p
<mnemoc>
oliv3r: disabled it, not break it
<oliv3r>
libv: the fex disables all uarts
<oliv3r>
libv: so after u-boot; you won't ever have a uart output
<oliv3r>
libv: even the debug uart port is disabled
<libv>
oliv3r: yeah, i was thinking of changing one of them to see if that would get me serial
<oliv3r>
libv: so it won't print much until you change the fex i'm affraid
<oliv3r>
libv: not sure if boot1 parses the fex file
<oliv3r>
libv: i don't think OEM's actually ever change boot0/1
<oliv3r>
so the only output could be from boot0/1
<oliv3r>
I want an A23 tablet now :)
<eagles0513875>
hey oliv3r question is there a really high demand for kit kat?
<eagles0513875>
with this laptop i probably could churn out various versions of it
<oliv3r>
eagles0513875: for us? not really; it would be awesome as we have no android rootfs at all of course
<eagles0513875>
oliv3r: what do you mean
<oliv3r>
eagles0513875: with not really i ment, 4.4 doesn't bring any memory savings to CM as that is allready memory savin
<eagles0513875>
ok
<oliv3r>
the whole '4.4 runs on 512 mb ram' thing was mostly intended for companies that are putting android 2.3 on devices
<eagles0513875>
what perks does one have building CM on such a board
<oliv3r>
with memory laden interfaces; that said; an up to date working CM tree for sunxi would be awesome
<eagles0513875>
oliv3r: i cm 11.2 on my tablet its great
<eagles0513875>
oliv3r: ok ill see what i can do with that :)
<oliv3r>
eagles0513875: i know atsampson has a tree somwehere where he started doing CM 10.2
* mnemoc
looks at 4.3-based galaxy nexus and his nexus one with .es SIM...
<Turl>
libv: your tablet has a full size sim slot? o.O
<libv>
Turl: no, it doesn"t
<oliv3r>
Turl: you mean micro surly
<oliv3r>
full sized == credit card size
<Turl>
oliv3r: microSD is what cubieboard has right?
<oliv3r>
Turl: SD vs sim now?
<eagles0513875>
oliv3r: thats not 4.4 though
<eagles0513875>
10.2 is 4.3 or 4.2
<oliv3r>
Turl: microSD is cubie, olimex has micro sd and normal SD
<eagles0513875>
4.4 is 11.2
<Turl>
oliv3r: fail, I said SIM
<Turl>
I meant sd
<eagles0513875>
hey Turl
<oliv3r>
eagles0513875: 10.2 is 4.2 even i think
<atsampson>
eagles0513875: there was enough difference with newer versions that I suspect you'd do better to start from scratch, from what I saw
<eagles0513875>
oliv3r: ya i dunno the numbering but i know its not kitkat
<oliv3r>
Turl: well the q88 has siblins that even have dual sim slots
<eagles0513875>
atsampson: ya i think i would start from scratch
<Turl>
oliv3r: o.O
<Turl>
hi eagles0513875
<eagles0513875>
atsampson: was even thinking starting from googles tree and make changes specific for sunxi
<eagles0513875>
oliv3r: it makes sense to have the repos seperate
<oliv3r>
isn't there a single repo command or something?
<Turl>
eagles0513875: read the instructions I linked, there's a tool that does that for you (repo)
<oliv3r>
check
<eagles0513875>
Turl: should i look at the developer resources on that page as you linked me the build guides for devices
<Turl>
eagles0513875: if I were you, first I'd get my env set up for building and build for some other preexisting device to make sure it's all good to go
<Turl>
and to get familiar with the build system and commands
<eagles0513875>
perfect can test it out on my nexus 7 which already has 11.2 nightly builds on it
<Turl>
oliv3r: :) do you have a spinor equipped board to test? :p
<eagles0513875>
blarg
<eagles0513875>
:(
<eagles0513875>
this is really getting annoying
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<libv>
Turl: so the linux image partition starts with "ANDROID!"
<libv>
it's been uploaded, just like the boot.scr that sits in nandb
<libv>
now i will try to read the bootinfo, if it survived at all after a full boot, that is
<Turl>
libv: that's an android bootimage, you should be able to unpack it and get a zImage and ramdisk
<libv>
aha
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<libv>
off i go then :)
<wingrime>
libv: you get a23 tablet?
<wingrime>
libv: can you please intoduce recent news...
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<Turl>
wingrime: read ML, there is news there
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<eagles0513875>
hey again oliv3r
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<eagles0513875>
oliv3r:
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<atiti>
hm, does anyone know if the A20 memory architecture is different from the A10?
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<oliv3r>
Turl: no i don't have SPI (yet) :p
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<bsdfox>
eagles0513875, ask a question instead of just typing his nick
<eagles0513875>
oliv3r: those mmc issues i was told on the mailing list they are nothing to worry about then what could potentially be causing the boot up on my cubieboard 2 not to complete
<bsdfox>
eagles0513875, have you pasted the serial console output yet?
<eagles0513875>
bsdfox: i dont have the device atm
<eagles0513875>
i posted it on the mailing list
<eagles0513875>
ill bring it with me next time
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<bsdfox>
eagles0513875, paste the entire output next time
<eagles0513875>
will do
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<andhe>
just getting started with cubietruck. I've got it up and running with sunxi-bsp. It looks like the submodules are using older versions of the u-boot-sunxi and linux-sunxi which does not yet include alot of A20 related fixes... any recommendations? Should I just update to master of u-boot-sunxi and linux-sunxi manually before building?
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<Night-Shade>
andhe: the linaro lubuntu image has fairly upto date u-boot in the bootfs
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<andhe>
Night-Shade: thanks, but I'd rather not use random binaries which I don't know how to reproduce.
<Night-Shade>
fair point, the git trees build and work for me
<Night-Shade>
I build from git for the same reason
<Night-Shade>
you can cross build on x86 or the cubietruck isn't to painful to just build locally on
<andhe>
did rm -rf build ; cd u-boot-sunxi ; git checkout sunxi ; cd .. ; cd linux-sunxi ; git checkout sunxi-3.4 ; cd .. ; make ..... lets see where I end up. :)
<Night-Shade>
I've got a cubietruck running upstream too from the work the fedora team are doing
<andhe>
already have my cross build environment set up as I've already built sunxi-bsp once.
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<Night-Shade>
thou 3.13 is much less functional for graphical type uses but it does support kvm, so heardware acceled VMs :)
<bsdfox>
A20 has accelerated virtualization extensions?