<rqou> awygle: afaik COM is a subset of the MSVC basic vtable ABI
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<balrog> rqou: are there any plans to improve rust interop with c++?
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<mithro> azonenberg: What do people use for the "PnR" for the GreenPak?
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<mithro> The GreenPak is a lot more interesting then I realized previously -- it is quite different to most architectures
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<mithro> Anyone know of any "bigger" chips in a similar category?
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<azonenberg> mithro: no
<azonenberg> mithro: so, i divide PLDs into a 2x2 matrix
<azonenberg> you have classical CPLDs (crossbar of PLAs)
<azonenberg> classical FPGAs (2D grid of LUTs)
<azonenberg> those are the two corners of the matrix
<azonenberg> Then greenpak occupies a third corner, a crossbar of LUTs
<azonenberg> To my knowledge, the fourth corner (2D grid of PLAs) has never been mass produced
<azonenberg> Xilinx has a patent on it from circa 2004 that I believe was to be the BladeRunner (CoolRunner-II successor) architecture
<azonenberg> It was to be 130-90nm and launched alongside spartan3a
<azonenberg> but it died before production and i dont know if it even taped out
<whitequark> BladeRunner?
<whitequark> they seriously called a chip that?
<azonenberg> i think it was the internal codename
<azonenberg> not a production name
<azonenberg> whitequark: "xbr" in the ISE install directory stands for, i'm 95% sure, "Xilinx BladeRunner"
<azonenberg> that's where the coolrunner-2 stuff lives
<azonenberg> so they probably were gonna put cr-iii there too
<whitequark> maybe "b" is for something else
<whitequark> "BloodRunner"?
<azonenberg> no
<azonenberg> gimme a sec to find the info
<azonenberg> AR #12591 for starters
<azonenberg> under keywords
<whitequark> nice
<azonenberg> i mirrored it in case the original disappears
<whitequark> 404
<azonenberg> oops
<azonenberg> 00
<azonenberg> not 000
<pie__> i can blink leds. now what.
<azonenberg> metal gate SiGe/SOI/copper interconnect CPLDs on the 150 down to 90nm nodes
<azonenberg> To launch in 2002+
<azonenberg> Slide 4, BladeRunner and StarFighter
<whitequark> my eyes
<azonenberg> interestingly enough CR-II is not on that list so i suspect one of those later became CR-II
<azonenberg> It's possible BladeRunner is CoolRunner and StarFighter was the axed "2D grid of PLAs" chip
<azonenberg> Slide 6 actually hints at that
<azonenberg> But BladeRunner-II and StarFighter-II never hit the market (150 nm)
<azonenberg> and one of the two 180nm devices got axed, the other became CR-II
<azonenberg> In slide 8 you can see they were planning a web based fitter and ide, maybe with server side fitting?
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<awygle> re: AVR Rust from yesterday
<awygle> In the case of AVR the main reason is that some LLVM codegen bugs prevent you from building core for AVR. These bugs are related to 128-bit integers and formatting floats.
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<balrog> awygle: oof...
<balrog> gcc has a bug (or rather lack of implementation) of long double that causes MAME not to build on ppc64 anymore
<rqou> ugh ppc long double
<balrog> since MAME has started using user-defined literals
<balrog> and those *must* be long double for float types
<rqou> if you link with musl, you can force things to use ieee long double rather than ibm long double
<rqou> but idk if that fixes your problem or not
<rqou> mithro: look what i've got here: https://github.com/rqou/tomu-rust-example
<rqou> also, the an0042 efm32 bootloader is a huge pain in the ***
<mithro> rqou: Please share on #tomu - I know that will excite xobs and a few other people
<mithro> rqou: Don't use that - use xobs' new one
<kc8apf> wow, the 90's are heavy in that slide deck
<kc8apf> batteries as bars in a graph is a bit over the top
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<cr1901> mithro: Tomu's avail for purchase now (as in: It'll ship soon after I pay for it)?
<balrog> cr1901: it says on the crowdsupply page: Orders placed now ship Jul 31, 2018.
<rqou> cr1901: i can mail you one
<cr1901> Ahhh
<rqou> alternately, maybe mithro can mail you one? :P
<cr1901> rqou: That's prob better if mithro mails me one (if he wants to)
<rqou> also ugh, the embedded-hal ecosystem is so totally f*cked up right now
<rqou> i think i'm actually not going to bother with it for now
<rqou> so many random bits are not supported and don't have good ways to extend them
<rqou> e.g. there's no way to use the HSE oscillator, only HSI
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<mithro> I'm not mailing cr1901 anything until he finishes stuff on the other things I've mailed him :-P
<rqou> wow, rekt
<mithro> awygle: What is interesting about that link?
<awygle> mithro: more new fpga folks, also they use the LUTs for routing, also Xilinx is a major investor (the last is not in this link)
<mithro> awygle: Where does it mention using LUTs for routing?
<mithro> Sounds pretty smart
<mithro> And potentially *super* powerful for certain applications
<awygle> yeah it's clever. very flexible, you're less likely to get choked up by lack of routing resources while still having tons of free LUTs
<mithro> It's disappointing they only do 800 Mbps LVDS data rate
<awygle> this first generation's I/O situation is somewhat unfortunate yes. or at least it doesn't map well to any of my use cases.
<mithro> awygle: Depends on price and availability too...
<mithro> If they released documentation of their bitstream format it would be interesting and surprising :-P
<azonenberg_work> awygle: hard wired LVDS, interesting
<azonenberg_work> i.e. dedicated vs switchable
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<azonenberg_work> lol thaaat would be nce
<azonenberg_work> fat chance though
<awygle> yeah lol
<awygle> still it's nice in the abstract to see new players
<awygle> even if this is only half a new player
<rqou> whee, my "favorite" thing ever is to forget to power on a peripheral on the stm32
<rqou> i guess this is why linux gained a clock tree framework
<azonenberg_work> Also these guys are SMALL
<azonenberg_work> 20-ball WLCSP option available for the smallest parts
<azonenberg_work> thats like ice40 package density
<azonenberg_work> if not smaller
<awygle> yeah but then the big ones get up to 484-ball BGAs
<azonenberg_work> they have a 3x3mm 49-ball 0.4mm pitch FBGA
<azonenberg_work> they go up to 676
<azonenberg_work> ... at 0 .6mm pitch
<azonenberg_work> That's 676 balls in less board area than a xilinx ft256
<awygle> oo i didn't check the pitch
<azonenberg_work> sounds fuuuuun to route
<awygle> RIP PCB costs tho
<azonenberg_work> i bet the transceivers are dedicated to pcie too
<azonenberg_work> no general purpose
<azonenberg_work> i.e. not usable for anything besides pcie
<awygle> yeah i expect so
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<rqou> azonenberg_work: where's my xc2c384/512? :P
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<azonenberg_work> rqou: Coming, eventually
<azonenberg_work> you wanted me to try getting data off them first
<azonenberg_work> i've been busy :p
<azonenberg_work> only reason i had time to do those chips is it was a research project for $dayjob
<rqou> but you just did that "unknown radio?"
<rqou> ah
<azonenberg_work> not client hardware hence why i can post it
<rqou> $dayjob actually pays you to do work in your own lab?
<rqou> seems a bit sketchy
<azonenberg_work> this was at the ioa lab
<rqou> oh ok
<azonenberg_work> davis did the decap, i did the imaging and analysis
<awygle> rqou: where's my ice40lp384/640? :p
<rqou> "Coming, eventually"
<azonenberg_work> Coming as soon as we get fusion power
<azonenberg_work> In 10-15 years
<azonenberg_work> :D
* awygle goes on a thirty-minute rant about reactor types and polywells
* awygle 's cats give him That Look again
<rqou> ugh, every time i try to use an adafruit/sparkfun product i find that they always manage to make them suck
<qu1j0t3> oh?
<rqou> they always do weird shit like cramming lipo charger chips everywhere
<qu1j0t3> what happened? i have not bought an adafruit board but i've been tempted a few times. always wondered what the catch was
<rqou> or using text rather than binary protocols
<rqou> and adafruit especially loves their shitty discrete level shifters
<azonenberg> lol
<azonenberg> eew
<azonenberg> can you say "slow rise times"?
<rqou> that's usually not a problem since they tend to put them on i2c
<rqou> but the circuit they tend to use _only_ works if the "external" side is higher than the "internal" side
<rqou> and they don't have any bypass jumpers or anything because that would be too easy
<azonenberg_work> Lol
<azonenberg_work> eeew
<rqou> hmm, some of the newer boards are better
<rqou> they expose enough signals that you can make their level shifter thingy "go away"
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<rqou> also adafruit especially likes to give everything a silly cute name so that it's even more confusing what they're talking about
<rqou> one of the worst ones i found in a quick search is the "Huzzah! Adafruit.io Internet of Things Feather ESP8266"
<rqou> brilliant /s
<rqou> it has an esp8266, and i have no idea what the need the rest of that name for
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<awygle> rqou: iirc "feather" is the form factor
<awygle> (the rest is SEO)
<rqou> yeah, still a silly name
* azonenberg hates SEO with a burning passion
<rqou> azonenberg: "These 10 IoT devices will make you join a botnet! Number 6 will amaze you!"
<cr1901> level shifter thingy? Also, is there a way to get 5v out from 3.3v in w/ fast rise times?
<rqou> solution: stop using 5V
<cr1901> Here's my solution to your solution: Bite me :).
<cr1901> If I'm using 5v I'm prob interfacing to something vintage, so rise times aren't an issue. But still it "would be nice" to see how fast it can actually go
<awygle> i mean, probably. do you care about power consumption?
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<awygle> fast NPN to ground, small resistor to 5V good enough?
<awygle> you could probably drive that into a high-impedance low-capacitance input to a better drive stage that was purely 5V, too
<awygle> actually you can just drive into a TTL input stage
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<kc8apf> large LED matrix panels still use 5V SPI up to ~20MHz
<balrog> How’s the txb0108?
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<awygle> huh, bidirectional _and_ push/pull? that's unusual
<kc8apf> Every time I try to use them, I get problems with some of the outputs latching
<kc8apf> awygle: txs0108e is even more unusual
<kc8apf> bi-direction, open-drain and push-pull
<awygle> what the what
<azonenberg> txb0108 is my favorite level shifter for general purpose use
<azonenberg> if i dont need high speed
<kc8apf> azonenberg: do you have a reference design for them? I'm clearly doing something wrong when I try to use them.
<azonenberg> kc8apf: no, i just went off the datasheet
<azonenberg> they seemed pretty idiotproof
<azonenberg> auto direction sensing and all
<awygle> i usually use SN74LV1T126's because i don't need bidir
<azonenberg> main thing is, the auto sensing might not play well with them
<kc8apf> WTF am I doing then? I seem to always have one side get stuck high even when the other side is being driven low
<azonenberg> with pullups/pulldowns*
<azonenberg> kc8apf: is the enable pin asserted?
<kc8apf> yeah
<azonenberg> and do you have any pullup/down resistors/
<azonenberg> ?
<rqou> hmm, i've also not had much success with these automagic level shifters
<azonenberg> datasheet says if you must have them, keep them over 50K
<kc8apf> no. This was an Artix7 on one side and LED matrix panel on the other
<azonenberg> and no open drain drivers
<azonenberg> weeird
<kc8apf> should be push-pull all around
<azonenberg> they worked first time every time i've used them
<kc8apf> may need to hold OE and release it after everything is up and running
<azonenberg> so idk
<azonenberg> it does direction sensing constantly
<azonenberg> not just at startup
<azonenberg> the lines can reverse direction at run time
<kc8apf> right
<kc8apf> I'm just trying to figure out what is going wrong
<awygle> if the artix is highZ while configuring that might mess it up, but it should fix itself if it does continuous sensing
<kc8apf> oh, capacitive loading is a big concern according the datasheet
<azonenberg> Yes
<azonenberg> is the led panel high cap?
<kc8apf> there was a fair amount of wire and trace in the test setup
<azonenberg> That might do it then
<azonenberg> in general i prefer manual direction control when i can
<azonenberg> But the txb series is nice when i need multiple signals in different directions
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