<lain> at this rate I'm just going to start calling them all "Bell"
<rqou> Standard Computer :P
<awygle> pointfree: The Semiconductor Company is a "sob sob only serious", not aspirational :p
<awygle> (at least the way i use it)
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<rqou> still waiting for Amazon to complete vertical+horizontal integration and just buy up all of agribusiness
<rqou> while either Apple or Google buys up all digital things
<sorear> ITYM "EC2 powered by Annapurna"
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<awygle> hm, is there any good "here, just take my memory" IPC in Linux? i.e. without copying through kernel space?
<rqou> mmap?
<awygle> well you can do shared memory i guess, what i'm really looking for is zero-copy unix sockets
<jn__> splice/vmsplice seems worth investigating
<rqou> vmsplice?
<jn__> >vmsplice - splice user pages into a pipe
<awygle> yeah it looks like you'd have to open a pipe, vmsplice your data into it, splice your data to the other side, then mmap it out again?
<rqou> yeah probably
<rqou> aargh Nvidia probably patched the tegra bootrom exploit
<rqou> i really really need to figure out what it is
<jn__> rqou: patched through an updated set of IPATCH fuse data?
<rqou> probably
<jn__> i hope this guy doesn't give up: https://twitter.com/G33KatWork/status/972099894419877891
<jn__> he said he's going to release his exploit
<rqou> goddamn im so behind
<jn__> (he used a chipwhisperer on one of the voltage rails to glitch the instruction that disables the bootrom)
<rqou> that's what I've been trying
<awygle> hmm, "cross memory attach" is almost exactly what i want except i have to get the PID somehow
<rqou> hey azonenberg how's your house going?
<rqou> still asbestos left?
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<awygle> it turns out none of those fancy vmsplice/splice tricks actually work under the hood :(
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<rqou> lol
<rqou> i kinda got that impression last time i looked at them
<awygle> i'll put down money that this works on BSD
<rqou> (which was for cs162 interestingly enough)
<rqou> ugh, rust's path module is really really opinionated in imho the wrong way
<rqou> it's a huge PITA to work with files with two extensions
<awygle> that is ~universally true in my experience
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<rqou> also debugging a build script is painful
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<awygle> i find it interesting that the new 58G transceivers are PAM-4
<awygle> can't help feeling like we're gonna end up with really fast inter-chip RF pretty soon. "New 6T 2048-QAM Transceivers!"
<rqou> how about silicon photonics?
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<awygle> I feel like that's a more fundamental breakthrough. Plus you need a light pipe in the pcb.
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<pie_> wow i totally guessed you can do this https://www.quora.com/How-do-you-use-both-Fermats-Little-Theorem-and-Chinese-Remainder-Theorem-to-find-3-302-mod-35 i need to learn the chinese remainder theorem one of these days heh
<pie_> ^ wrong chan
<qu1j0t3> never the wrong chan
<Bike> chinese remainder isn't too uintuitive i don't think
<rqou> it just defines a ring isomorphism between the ring of integers modulo N and the direct product of the rings of integers modulo n_i, how hard can that be? :P
<Bike> yeah man. simple
<pie_> yeah give me like...70 more pages i think?
<pie_> :P
<Bike> you can uniquely represent all numbers from 0 to 5 by describing whether they're even and whether they're divisible by three
<rqou> btw if this is for RSA, a) don't roll your own crypto b) use padding
<Bike> maybe i just want to reimplement bignums, huh. you ever think about that
<rqou> c) the CRT trick is also much more vulnerable to fault injection
<pie_> nah im just working at dummit&foote algebra a bit
<pie_> what? me? studying? pffff.......
<rqou> interestingly i have rolled my own crypto, but the threat model was completely different
* pie_ rolls a crypto
<rqou> I've rolled my own shamir secret sharing tool
* pie_ lights it up
<rqou> because last i looked i didn't see a good tiny one
<pie_> c === m^e (mod n) blaze it
<qu1j0t3> lol @ pie_ 's roach
<pie_> this is some good key material maaan
<qu1j0t3> gettin high on entropy
<pie_> 1) prove that squares of elements in Z/4Z ({0,1,2,3 modulo 4) are just 1 and 0
<rqou> easy
<rqou> just compute them
<rqou> proof complete
<pie_> 2) use the previous to prove that for any a, b integers: a^2 + b ^2 never leaves a remainder of 3 mod 4
<rqou> easy as well
<rqou> a^2 and b^2 individually can only be 0 or 1, so the sum of any combination can only be 0, 1, or 2
<rqou> did you want a deeper result? :P
<rqou> awygle: does this match your cs70 experience? :P
<pie_> so, im like, lets just factorize for lulz: (a+ib)(a-ib)=3 mod 4, you can only get 3 via 1*3 or 3*1 in this case, but then "how does babby compute ib mod 4"
<pie_> i like to overcomplicate everything
<rqou> um, that doesn't work
<rqou> complex numbers are a whole other beast
<pie_> im not sure it doesnt
<pie_> but yeah
<rqou> you can do it my "definitely not a deep result" way
<rqou> :P
<pie_> yeah i thought of the latter ...didnt notice the former yet until you mentioned it xD
<pie_> fml
<rqou> berkeley really trains you to both understand actual proofs as well as hacks like this :P
<pie_> yeah ok maybe i shouldnt be stuck in some backwater cesspool but whatever
<pie_> xD
<pie_> could be worse i guess
<pie_> also thats not really a hack
<awygle> I don't think I ever solved a cs70 problem by exhaustion
<awygle> Except maybe in the literal sense
<rqou> lool
<pie_> haha
<rqou> i definitely remember doing so at least once
<rqou> somewhere in the 70/170/other-proof-heavy-class series
<awygle> I don't think it was 70, I think it was ee120, but there was at least one very mathy class where I kept turning in solutions with gaping holes in them and getting full points
<pie_> a solution exists, we leave it as an exercise to the grader
<rqou> yeah, imho 120 isn't very good and needs some work
<awygle> Like "it would be great if this theorem was true, let's just assume it and turn it in"
<rqou> although i'm not really sure what they're going to do with it now that they killed 20
<rqou> awygle: which professor?
<rqou> was it ronf?
<awygle> 120 was the closest course I ever got to the "I've been in this class all semester but forgot and now it's the final" dream I've ever gotten
<awygle> rqou: babak
<pie_> i need to stop not doing math, theres so much neat stuff in here
<rqou> O_o
<rqou> i expected him to be much more strict
<awygle> I think it was the grad student
<rqou> either way, imho 120 needs work
<rqou> and it's really not clear where it fits now without 20
<awygle> I literally skipped 50% of the class, including homework, by just forgetting it existed. Consequently I suck at Fourier transforms (but am good at Laplace and Z)
<rqou> esp. given that there's ee123 and ee128
<awygle> rqou: I had ronf for controls, he almost killed us
<rqou> i mean, that's his research area :P
<awygle> I also "worked" in his lab for a while (just shot stuff with lasers)
<rqou> lol i did too
<awygle> After the midterm feedback forms he dropped the homework by 50% and allowed me to occasionally sleep on Thursday nights
<rqou> i mostly yak-shaved some embedded crap before i decided i didn't have enough time for it
<rqou> awygle i'm amazed we never ran into each other
<rqou> what year did you graduate again?
<awygle> rqou: we might have, I'm pretty generic looking lol
<awygle> 13
<rqou> hmm
<pie_> soon: awygle never existed and we just thought him into existence
<awygle> I've been dead the whole time
<awygle> Or alternatively, JUST AWYGLE
<pie_> something something we are the living dead
<pie_> :|
<awygle> Speaking of back to work >_<
<pie_> i dont want the math test tomorrow
<pie_> siiight
<pie_> *siiigh
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<rqou> wait awygle you're HKN?
<pie_> on the plus side i finally know ow to use the euclidean algorithm (about time), but i still dont have the intuition for how it works
<awygle> rqou: yup
<rqou> did you ever end up watching hentai with them? :P :P
<awygle> Still never used a wheat stone bridge
<awygle> ........ No
<pie_> lmao
<pie_> wat
<pie_> "no"
<awygle> That does not sound like a thing I would want to do lol
<pie_> hkn?
<awygle> eta kappa nu
<awygle> EE honor society
<pie_> oh
<pie_> wtf does that have to do with watching hentai xD
<awygle> Enormous waste of time but introduced me to my primary college girlfriend and current good friend so eh
<rqou> pie_: it's complicated
<rqou> tl;dr HKN is/was full of weebs
<pie_> aha lol
<qu1j0t3> pie_: See? you never need to worry about being off topic
<pie_> my best friend is a weeb. im a weeb poser
<awygle> lmao
<awygle> risky click of the day
<rqou> president at one point in time
<rqou> SFW-ish
<pie_> hahahaha
<rqou> alright, once you've both seen it i'm unsharing it
<awygle> After my time lol
<pie_> rqou, wouldnt blatantly link something without notice WOULD HE
<awygle> He absolutely would
<pie_> ssssh we have to make sure he can catch other people off guad
<pie_> guard
* awygle changes the topic to "beware of links from rqou"
<rqou> hey
<pie_> no bulli - rqou, 2018
<rqou> "mods are asleep, post cheese pizza" :P :P :P
<rqou> azonenberg? :P
<pie_> ಠDಠ
<rqou> lol what is that?
<pie_> its ಠ_ಠ but with :D
<awygle> spiders georg
<pie_> dont ask me how it works
<rqou> awygle: no TBP for you? only a wheatstone bridge and not a watch key? :P
<awygle> so tonight I am cursed with buggy ICs and poorly planned interfaces, but tomorrow I might get to walk again
<pie_> *so tonight again
<awygle> rqou: na no tbp. By the time they invited me I was soured on honor societies lol
<rqou> i did them both in the same semester. that was... "fun"...
<awygle> Sounds like a bad idea lol
<rqou> hey azonenberg are you still busy AF? :P
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* qu1j0t3 hears crickets
* qu1j0t3 sees a tumbleweed sweep past
* azonenberg was at the house doing construction
<azonenberg> so, yes
<azonenberg> i'm also 802.3 af
<rqou> how's the progress?
<azonenberg> (i need to make a t-shirt that says that)
<azonenberg> With some kind of graphic symbolizing PoE
<azonenberg> Framed out a wall in the new lab today
<azonenberg> installed power outlets on it
<azonenberg> Hung the new subpanel for the UPS, but no breakers in it yet so i couldnt hook anything up
<rqou> O_o your UPS has a whole subpanel?
<pie_> well its his badass man cave so
<azonenberg> rqou: my new UPS is going to be a 6 kVA and i may eventually upgrade to something bigger
<azonenberg> that's three 20A circuits loaded to capacity, if i spread it out a bit more like 4-5
<azonenberg> The panel i got has eight spaces so that should be plenty
<rqou> hmm, that does need its own breaker
<rqou> azonenberg: why no HVDC lines? :P
<rqou> then you no longer need DC->AC->DC
<pie_> is this loss
<azonenberg> i am planning on wiring my rack for 48V DC at some point
<azonenberg> but for now everything is 120
<rqou> no hack of ~200VDC?
<rqou> azonenberg: btw how do you feel about PoE?
<rqou> my current situation is "PoE is a huge pain because i only have one PoE capable switch"
<azonenberg> I have none
<azonenberg> just a passive injector
<azonenberg> it's not full 802.3af, just passive injection
<azonenberg> it works fine for my current IP cameras
<azonenberg> i would love to eventually have more equipment be PoE capable
<azonenberg> i would also love to have a laptop with a PoE host port, so i could e.g. run an ip cam off the laptop with no power brick
<rqou> how do you feel about the giant mess of usb pd?
<azonenberg> i consider usb deprecated
<azonenberg> i havent done a design with usb on it in... i cant even remember
<azonenberg> i stuck a usb port on a design as a quick and dirty 5V power source recently but that was it
<rqou> but cute smol connectors
<azonenberg> When your boards have big FPGAs on them, an rj45 doesnt add much to the size
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<azonenberg> that said, i would love a smaller ethernet connector
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<rqou> just use type-c :P
<azonenberg> i've considered several nonstandard options but havent had time to explore them in depth
<azonenberg> lain actually was looking at standardizing a gig-e alternate function for usb-c
<rqou> you mean 3+ different ways of doing it? :P
<azonenberg> well, for the time being size has never been a factor
<azonenberg> as i tend to not make small gizmos
<azonenberg> i make big iron :p
<rqou> azonenberg: oh, i just remembered: from the discussion earlier i was wondering whether you had a fancy decorative wheatstone bridge and/or watch key in addition to your fancy piece of paper? :P
* azonenberg was UPE
* qu1j0t3 snerks
<rqou> oh right, CS without any EE
<azonenberg> not in the engineering dept so no TBP bent for me
<azonenberg> or similar
<azonenberg> I have been thinking about joining IEEE for better journal access though
<rqou> you have to pay dues though
<azonenberg> yes but it seems worth it if you subscribe to a couple of journals
<azonenberg> this was a while ago though, i havent looked into it late;ly
<rqou> wait, doesn't IEEE also require you to be somewhat EE-affiliated?
<azonenberg> Pretty sure i do enough engineering-y work i would have little trouble meeting any such requirement
<azonenberg> with a PhD in CS and a bunch of EE classes, a thesis on FPGA SoC architecture, etc
<rqou> yeah
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<awygle> Lol upe
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* awygle judges those who are not of his arbitrary tribe
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<awygle> just got my limesdr mini. always nice when companies pick the same parts as me lol
<rqou> has limesdr cleaned up their act?
<awygle> oh they cheated though, they used the shell from the Wurth shield and the Harwin clips! i should have done that instead of the stupid two-part Wurth cage
<awygle> rqou: i don't really know what that means
<awygle> was their act dirty?
<rqou> maybe ask mIKEjONES about it?
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<awygle> ah
<awygle> well that's not enormously surprising
<awygle> also, this board is ... weird
<awygle> it looks like no part of the board pipeline communicated with any other part
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<cr1901_modern> (1:05:46 AM) azonenberg: Pretty sure i do enough engineering-y work i would have little trouble meeting any such requirements
<cr1901_modern> azonenberg, you literally do more EE stuff than most EEs I know.
<awygle> the people who kitted this board for me apparently returned me a box of empty ESD bags
<awygle> why did i design a board with LDOs that are literally smaller than an 0402 resistor
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<azonenberg> awygle: WLCSP?
<azonenberg> been there done that
<azonenberg> i tombstoned one but they're not bad to deal with if you have a microscope and good tweezers
<awygle> azonenberg: it came out fine. i just am baffled at my past self. the board had plenty of space
<azonenberg> oh
<azonenberg> yeah i only do such things when i'm tight on space
<azonenberg> same with 0201 and 01005 passives
<azonenberg> i'll do them when left with no choice
<azonenberg> but i better have a damn good reason
<awygle> knowing me, i probably was like "BUT THEN THIS LOOP WHICH IS IN NO WAY CRITICAL WILL HAVE TO BE 0.1MM LONGER!!"
<azonenberg> lol
<azonenberg> you're talking to a guy who length-matched traces on a greenpak characterization board soooo...
<awygle> or worse, *gasp* have a _via_
<azonenberg> high speed habits die hard?
<rqou> azonenberg: length matched and then triggered an oshpark fab glitch :P
<azonenberg> that was a speck of dust on one board
<azonenberg> didnt affect the other two
<rqou> pretty big speck :P
<awygle> i'm just a prima donna about boards
<azonenberg> i'm impressed i havent had that happen too much though
<azonenberg> i make a lot of boards through them
<awygle> (not sure if i'm using that idiom right)
<azonenberg> guess i was due for a screwup eventually
<azonenberg> glad it wasnt an inner layer
<awygle> yeah i'll take a screwup i can see any day
<azonenberg> i mean i can and have reworked design errors on inner layers
<azonenberg> but a fab screwup on an inner layer?
<azonenberg> thats nasty
<awygle> and hard to find
<azonenberg> yeah
<awygle> i forgot i bought 100 ferrite beads
<awygle> in no way did i need to do that
<rqou> ferrites are fun
* Xark links https://www.youtube.com/watch?v=5mpy_L-p398 (Ferrites wear boots...)
<awygle> diggy diggy hole... diggy diggy hole...
<rqou> oh btw azonenberg, awygle: did you know that (in some cases) if you wind an inductor around a bobbin, connect it to an LCR meter, and then slowly insert a magnetic core into the bobbin while the LCR meter is still connected, you can feel the magnetic core vibrate
<rqou> the stimulus signal from the LCR meter causes physical forces that you can actually feel
<awygle> no, but that doesn't surprise me
<rqou> also, inductors get really really toasty when pumping 3A through it :P
<awygle> these LDOs are 0.675mm on a side
<azonenberg> rqou: you know those things have power ratings right?
<azonenberg> also, magnetorestriction
<azonenberg> old TV noise etc
<awygle> power ratings shmower ratings
<rqou> ^
<rqou> especially since this was a custom hand-wound one
<rqou> and yes, we did measure the saturation flux density and we didn't hit it
<awygle> worst that will happen is it'll get hot and stop being a magnet :P
<awygle> (note: this is not the worst thing that can happen)
<rqou> there's no permanent magnet
<rqou> azonenberg: how do you like these inductors? :P https://photos.app.goo.gl/HSyF1pui3fKNzA7u2
<rqou> note that one of them has a very very precisely tuned gap adjusted using bits of paper :P
<rqou> and the other one doesn't have the core fixed together at all :P :P
<awygle> swag :P
<rqou> wait awygle are you familiar with inductor/magnetics design?
<rqou> why didn't you help me when i needed problem set help? :P
* awygle wiggles his hand back and forth vaguely
<awygle> not really
<awygle> i have done two magnetics projects, a coilgun and some magnetorquers
<awygle> both of those are just solinoids :P
<rqou> also, apparently i had the neatest inductors in the whole class because i'm the only one who bothered to wind them with the windings properly packed
<awygle> and i sketched a Helmholtz cage which is just a giant solenoid :P
<rqou> rather than "hurr durr, wrapped it around N times"
<awygle> the modern "settings just apply, you don't have to click an apply button" UI paradigm is at once logical and deeply discomfiting
<awygle> http://www.dtic.mil/dtic/tr/fulltext/u2/a557488.pdf this is approximately what i wanted to build
<awygle> in retrospect it is hilariously overkill for anything i actually ended up doing
<awygle> all right i'm going to bed
<awygle> everyone wish me luck at the doctor tomorrow
<rqou> good luck unbreaking your foot :P
<awygle> unbreak my foot, say i'm walking again, undo this hurt that i caused when i rode a moped and ate shit in the road, uncry these teaaaars
<rqou> i wonder what this guy would think about the necomimi cat ears? :P
<rqou> out of the loop: why is everyone hating on ESR more than usual recently? (i know he's a terrible person, the question is specifically about the "more than usual" part)
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<sorear> i'm guessing it's more a factor of s/hating on/hearing about/, he must have done something newsworthy
<azonenberg> awygle: i dislike that on anything potentially dangerous
<azonenberg> on my PSU remote control for example i force a commit operation to make anything take effect
<azonenberg> other than clicking the on/off button
<rqou> what about when twiddling physical dials?
<rqou> "nope, nope, nope, oh shit it's at 10A"
<rqou> *smoke pours out of DUT*
<azonenberg> rqou: this is one of the reasons i bought my new PSUs
<azonenberg> they have the ability to key in a voltage/current limit on the keypad
<rqou> i'm not the only one who did this by accident? :P
<azonenberg> rather than twiddling knobs
<azonenberg> and they also have, if memory serves me right (i havent used it yet)
<azonenberg> an option to specify a cap on I/V
<azonenberg> when in knob mode
<rqou> ah neat
<azonenberg> They also have an "electronic fuse" mode where overcurrent, instead of limiting, triggers a shutdown of the channel / the entire unit
<azonenberg> With an optional delay in which it limits, to handle inrush etc
<azonenberg> you can specify the delay arbitrarily
<rqou> wow, fancy PSU
<azonenberg> So you can say, turn on and limit current to 3A for the first 10 ms
<sorear> is that sort of thing generally fast enough to be useful?
<azonenberg> then shut down if it ever goes over 3A again
<rqou> you can borrow one of my inductors and see if you can make the PSU unhappy :P
<azonenberg> rqou: for $1200 a pop it better be fancy :p
<rqou> so a $2 inductor better not blow it up? :P
<azonenberg> sorear: it's saved several boards from frying so far
<azonenberg> due to various derps in design/assembly (only one of which was my fault)
<rqou> apparently some of the inductors in the power lab really will cause some fun sparks if you unexpectedly disconnect the power
<azonenberg> Not surprised
<azonenberg> rqou: and these are rohde & schwarz
<rqou> but pressing the PSU's on/off button should be fine
<azonenberg> a nice step up from my no-name amazon special psu from before :p
<azonenberg> They're also rack mount
<rqou> UCB's got a bunch of "those bog-standard triple output HP/Aglient things"
<azonenberg> Two of them mount side by side in 2U
<rqou> the +6/+-25V ones
<azonenberg> Color LCD, not touchscreen though
<rqou> you know, _those_ HP PSUs :P
<rqou> that they've made for how long now?
<azonenberg> These go up to 32V / 5A / 50W per channel
<rqou> yeah, that's a lot fancier
<azonenberg> ethernet and uart control
<azonenberg> i think gpib as an option, i dont think mine have it
<rqou> no gpib crowbars for you? :P
<azonenberg> my lab is 100% ethernet
<azonenberg> i wont buy test equipment without it
<azonenberg> and anything i build is going to have an ethernet interface
<rqou> but maybe some people _like_ getting out a crowbar every time they rearrange the cables :P
<azonenberg> in fact, some of my planned future test equipment will be headless with ethernet as the sole ui
<rqou> *IDN? :P
<azonenberg> my lecroy is scpi over a proprietary tcp-based framing protocol
<azonenberg> the PSUs are raw scpi over tcp
<azonenberg> they have some other protocol too i'm not using
<sorear> how does, uh, discovery work
<azonenberg> for my setup? It doesn't, you specify the hostname when you launch the client
<sorear> i assume you don't plug in the test equipment and then try to find it with nmap
<azonenberg> i dont know if there's a discovery protocol built in or not
<azonenberg> or you mean for my stuff that i'd build
<sorear> i mean how does the rest of the world learn the MAC/IP for the eq
<azonenberg> There'll be a cisco-style uart to specify ip config at startup if you want to force a static ip etc
<azonenberg> But the default behavior will be to SLAAC onto the local ipv6 subnet
<azonenberg> the mac will be printed on the front panel
<rqou> azonenberg: not a fruit computer network with mdns?
<azonenberg> so you can trivially calculate the ip from that
<azonenberg> rqou: thats one of the first things i uninstall on a new linux box
<rqou> am i weird that i installed avahi on purpose?
<azonenberg> :o
<azonenberg> i kill it with fire
<azonenberg> i have very limited patience for things that send out broadcasts on my networks for no good reason
<azonenberg> i like quiet networks for testing rthat dont have random packets going out on them (hence my last tweet on how to kill vivado hwserver discovery broadcasts)
<azonenberg> ESPECIALLY on a sandbox network that has nothing else hooked up to it
<azonenberg> when i run a ptp cable from one box to another i expect silence until i send something intentionally
<sorear> so you read off the MAC from the front panel, do the SLAAC math in your head to get the ipv6, add that to /etc/hosts, and then use a hostname for running clients?
<azonenberg> sorear: no, you add to DNS :p
<azonenberg> I'll probably implement a probe/discover protocol at some point though
<rqou> but muh privacy :P
<azonenberg> Spin up a client, send a broadcast out to the subnet
<sorear> public DNS or do you have a split horizon thing going on
<azonenberg> anything that replies gets interrogated
<rqou> azonenberg: that's called mdns :P
<azonenberg> Public DNS, although the internal stuff is firewalled off from outside
<azonenberg> rqou: no, it's called BIND :p
<azonenberg> and i only want to discover when launching a new client app
<azonenberg> not constantly in the background
<rqou> btw what happens if somebody decides to hijack one of those slaac addresses (which is afaict allowed)
<rqou> do you properly do NDP?
<azonenberg> rqou: as of now i just start using the address and hope nobody else is
<rqou> so you don't implement NDP
<sorear> so I could find your shiny new PSU with dig right now (not actually send packets to it, obviously)
<rqou> noncompliant :P
<azonenberg> I implement the ARP side of NDP
<azonenberg> i generally do not implement all of the horrible corners of the RFCs
<azonenberg> i implement the subset that is actually used
<azonenberg> then get my work done
<azonenberg> the features that i would love to have deprecated, like 10baseT/half duplex, i leave empty
<azonenberg> and pretend were never invented :p
<azonenberg> sorear: try it, psu-left.scada.bainbridge.antikernel.net
<azonenberg> it'll resolve to a rfc1918 address, have fun
<rqou> hey, brcm apparently gets a nontrivial amount of use out of 10half
<azonenberg> the entire *.scada.bainbridge.antikernel.net subnet, both ipv4 and ipv6,. is completely firewalled off both in and out
<azonenberg> not physically isolated right now but i'm thinking about it
<rqou> wait what
<rqou> that's got an ipv4 address only?
<azonenberg> yes, a lot of test equipment is not ipv6 capable
<rqou> oh derp
<rqou> this is your existing psu
<azonenberg> my >$5K lecroy isnt either
<azonenberg> all of the stuff i design from here on out will be single stack ipv6 only
<azonenberg> IMO the only reason to ever use ipv4 is talkign to legacy embedded devices, or being accessible to the ipv4 internet
<rqou> aw, no AXFR allowed on antikernel.net :P
<azonenberg> For a LAN-only embedded server, neither case applies
<rqou> oh wait
<azonenberg> if your client is so old that it doesnt support ipv6 i have no sympathy for you
<azonenberg> rqou: i think i may have left it open to some types of transfer, i keep meaning to do a more thorough audit and lock it down
<rqou> yeah, it's open
<azonenberg> But i'm probably gonna nuke that dns server and host dns in house at my new place
<rqou> you have to request the root antikernel.net domain
<azonenberg> and i really dont care if somebody has my zone file right now
<azonenberg> everything is either VMs/embedded gear behind firewalls, or VPSes of no real value
<rqou> ally-lappy.lan.bainbridge.antikernel.net
<rqou> too bad there's no ipv6 on this
<sorear> opsec :P
<azonenberg> Her old laptop never got a hostname
<rqou> or does your normal lan have inbound ipv6 firewalled?
<azonenberg> new machines of hers are named after artists
<azonenberg> Everything has inbound ipv4 and v6 blocked 100%
<azonenberg> other than the VMs
<rqou> ah
<azonenberg> And i do outbound firewalling on some stuff too
<rqou> my network has a separate vlan where inbound ipv6 is allowed
<azonenberg> As well as sandboxing the "normal lan" LAN off from the lab network where my stuff lives
<rqou> i originally wanted inbound ipv6 always allowed (you must firewall on the endpoint rather than use nat as a firewall)
<rqou> but then i decided this was too dangerous
<azonenberg> The DMZ occasionally has inbound traffic allowed, i'm actually going to split it into two DMZs down the road
<rqou> because the normal lan has e.g. shitty phones
<azonenberg> one will be the "services DMZ" that has public web, dns, etc
<azonenberg> The other will be the "clients DMZ" that has the VM that i'm ircing with, etc
<rqou> i don't bother with outbound firewalling because i've always felt that to be too much work
<azonenberg> I dont have fancy rulesets
<rqou> i might start doing it on the services vlan though
<azonenberg> more like, my el cheapo chinese ip cams should not ever phone home
<rqou> ah
<azonenberg> the scada subnet etc have 100% outbound blocked
<rqou> btw, i really hope you can't hack into my network's vlan1000
<azonenberg> and i'm very close to blocking outbound from the lab
<rqou> did you know that network gear inbound management security sucks? :P
<azonenberg> and only allowing outbound from the clients DMZ
<rqou> *inband
<azonenberg> This is why when i build my switch
<azonenberg> it will have a physically separate management interface
<rqou> i mean, mine can use a "cisco-style" console cable
<azonenberg> that goes to one of those octavo SiP's
<rqou> but that's a huge pain
<azonenberg> running my admin cli over ssh
<rqou> eh, i don't like octavo's sip very much
<rqou> the sip is nice, but the sitara soc is just really really meh
<azonenberg> got anything better to recommend for "linux in a bga with minimal work"?
<rqou> raspi? :P
<azonenberg> i literally just want openssh -> uart in a box with a bit of C++ to translate
<azonenberg> in a bga :p
<rqou> is raspi not PoP?
<azonenberg> i meant, ram and such pre-routed
<rqou> PoP doesn't count?
<azonenberg> no, pop requires assembly
<azonenberg> also its really fine pitch
<azonenberg> the octavo is >1mm iirc
<azonenberg> So it wont make me go HDI stackup
<rqou> i thought that some PoP packages were available with the ram preassembled?
<azonenberg> also, broadcom eew
<rqou> lol yeah
<azonenberg> anyway basically my plan is
<rqou> not that the ti chip is much better
<rqou> PVR eww
<azonenberg> yeah but i wont be using the gpu
<azonenberg> idk if you can get the octavo without it
<azonenberg> but basically openssh on this one physically separate interface
<rqou> i really really want to see an imx6 sip
<azonenberg> then an app to translate that to protobuf command packets over uart
<azonenberg> which are then executed by the fpga
<rqou> oh yeah, i just remembered the octavo is also an a8
<sorear> what ballpark range of mips and MB are we talking about here
<azonenberg> the packet datapath never touches the management network whatsoever
<azonenberg> sorear: honestly? 100 MHz cortex-a would probably be enough :p
<azonenberg> with 16 MB RAM or so?
<azonenberg> the octavo is overkill
<rqou> why not a microcontroller?
<azonenberg> idk how much openssh needs these days
<rqou> or hardware ssh implementation?
<rqou> :P
<azonenberg> rqou: because i want a trusted, vetted ssh implementation i dont have to write
<rqou> but you can formally verify it :P :P
<azonenberg> if i were to do that
<azonenberg> it would be over SSP21
<azonenberg> raw protobuf commands and a PC-based client
<rqou> wtf
<azonenberg> Which i may well support as a second api
<rqou> a scada protocol?
<rqou> aren't those all piles of shit?
<azonenberg> Nope :D
<azonenberg> This one was designed by some really smart guys and pentested by LLNL
<azonenberg> it's basically libsodium crypto bolted on top of minimal framing
<azonenberg> intended to be light enoguh to implement on a low resource embedded system
<rqou> then won't it be a big pile of overengineering instead?
<azonenberg> Nope
<rqou> i don't believe you :P
<azonenberg> the goal is basically TLS minus all the fluff that introduces bugs
<rqou> that's impossible in the scada field
<rqou> :P
<sorear> is there a good way to not have kernel pre-/sbin/init take ten minutes on a 100MHz machine?
<azonenberg> i have access to the prerelease spec, it's not even public yet last i checked
<azonenberg> I'm in talks with the guys about making an FPGA implementation but never had time to work on it
<azonenberg> and formally verifying
<azonenberg> So, if i was going to do it in hardware / a low end MCU
<azonenberg> that's what i'd do
<azonenberg> +
<sorear> doing packet and tcp segment reassembly in hardware sounds nasty
<azonenberg> sorear: i implemented a tcp offload engine in RTL before
<azonenberg> It was inefficient and stupid
<azonenberg> i have a much better idea of how to architect it
<azonenberg> it can be done quite well and fast
<rqou> there are some things i don't quite like, but this is actually _sane_
<rqou> amazing
<azonenberg> seriously, i plan to implement this on my future test equipment as an optional security-enhanced layer over the default cleartext protocol
<azonenberg> I'm that impressed with the architecture
<rqou> they _actually_ learned lessons like "please use AEAD ciphers"
<rqou> they don't have to repeat the TLS exercise all over again
<azonenberg> Yeah... aes-gcm ftw
<azonenberg> honestly, there is no reason to use anything else these days
<rqou> not djb all the way?
<rqou> chacha20?
<azonenberg> i like aes, what can i say
<azonenberg> The internal protocol for all my stuff will be (length, protobuf) over TCP for control plane
<rqou> also, they actually use curve25519, without RNG footguns
<azonenberg> yes, i would use 25519 for exchange
<azonenberg> then for bulk data plane, to avoid protobuf encoding overhead
<azonenberg> just raw adc samples or whatever over tcp
<rqou> the only things i see "missing" are session resumption (i guess they don't care?) and revocation
<rqou> the second of which apparently everybody except mozilla has given up on
<azonenberg> yeah neither is important to the scada use case
<sorear> resumption is a questionable optimization for http/1, and revocation doesn't work
<rqou> revocation _might_ be useful
<azonenberg> also cool that they support an auth-only mode (in fact thats the default now_)
<rqou> e.g. "kick this device off my network"
<azonenberg> rqou: conf t; int g0/42; shut
<azonenberg> :p
<azonenberg> That usually works well
<rqou> lol
<azonenberg> forget weird things at the transport layer
<sorear> must confess being a bit nervous of all the new deployments of 25519. about how many years do we have before a demostration of shor dlog on a 255-bit group?
<azonenberg> cut it off at the PHY and you're clean
<azonenberg> sorear: the way i see it is, anybody who has a quantum computer has bigger fish to fry than me
<rqou> i'm much happier with X25519 just because of it having fewer implementation footguns
<azonenberg> And i think long before anyone outside NSA gets to that level, we will have solid QC-resistant algorithms that are well studied, efficient, and reliable
<azonenberg> and if NSA really wants to decrypt my scope data, well, i say let them
<rqou> azonenberg: so you don't believe nist p256 is backdoored? :P
<azonenberg> rqou: i maintain an open mind
<azonenberg> 25519 seems more footgun-resistant so i prefer it
<rqou> still easier to backdoor the CSPRNG instead? :P :P
<rqou> / MD_Update
<rqou> er
<rqou> // MD_Update
<azonenberg> That's honestly the biggest thing holding me back from a hardware TLS/ssp21 stack
<rqou> too soon?
<rqou> :P
<azonenberg> a solid hardware RNG
<sorear> (efficient) i take it you're not the biggest fan of mceliece then :P
<azonenberg> i've thought about coupling an avalanche diode to the XADC on a 7-series part then making an entropy pool by constantly sha'ing adc readings with the pool
<azonenberg> then periodically re-seeding an aes-based prng from that
<azonenberg> but i'm not confident enough it would be footgun-free to trust it for anything serious
<rqou> how will you be sure you didn't mess it up?
<azonenberg> Hence why i didnt do it
<azonenberg> like, i could make a prototype
<sorear> i get the impression that a low-rate hwrng is a tiny amount of hardware and I'm surprised they aren't more common
<rqou> sorear: er, what happened to lattice-based cryptosystems?
<azonenberg> sorear: doing it on an analog asic process is fairly easy
<azonenberg> Doing it on FPGA, where everything is supposed to be deterministic
<azonenberg> is very hard
<rqou> i thought (at least a while ago) that was the prime candidate to be the post-quantum algos of choice?
<azonenberg> ring oscillator based PRNGs on FPGA, in my experience, tend to phase lock
<azonenberg> you get a feedback loop through resonances in the PDN
<sorear> ok what does PDN mean in this context
<sorear> fpgas don't use any logic family where pulldown networks make sense
<azonenberg> power distribution network
<azonenberg> when each ring osc switches you get a tiny dip in vccint
<rqou> O_o NTRU had its IP issues sorted out
<azonenberg> Which makes the next one switch slower
<azonenberg> etc
<azonenberg> you end up getting coupling and phase locking
<azonenberg> and they're not independent oscillators anymore
<azonenberg> bye-bye entropy
<sorear> rqou: lattice stuff is efficient and _somewhat_ well studied, not as well as mceliece
<rqou> alternative workaround: continue to use prime-field RSA/DH?
<rqou> just with larger primes
<sorear> i assume you've read the pqRSA paper :O
<sorear> :P
<sorear> is it actually possible to synthesize a ring oscillator?
<rqou> yes
<rqou> at least on gp4/ice40 with the foss tools :P
<rqou> i think you can do it with the proprietary tools too
<rqou> but you might have to manually instantiate LUTs
<rqou> hey azonenberg
<rqou> we should do a cryptocurrency
<rqou> centered around doing precomputation for doing discrete logs
<rqou> :P
<rqou> we'll call it NSACoin :P :P
<sorear> It's actually very easy to adapt the NFS into a proof of work
<azonenberg> lool
<sorear> your difficulty becomes the highest prime in the factor base, the proofs of work are relations
<rqou> we just need to promote this some more, get some people to churn out asics, and we'll be able to do discrete log on a 2048-bit group in no time :P
<azonenberg> p256coin? :p
<rqou> or that
<rqou> i don't know if DH or ECDH is more popular nowadays
<sorear> I was thinking of doing th 1024-bit DNSSEC root signing key that they're supposed to roll yearly but have put off for most of a decade
<azonenberg> that is a hilarious idea though
<azonenberg> manipulate the cryptocurrency folks into becoming your compute cloud
<azonenberg> by figuring out how to make a blockchain out of your work units
<sorear> (RSA-1024)
<azonenberg> BOINCcoin? :p
<rqou> er wait
<rqou> would p256coin work?
<rqou> the GNFS doesn't work on elliptic curves
<rqou> it obviously works on integers mod p
<sorear> i don't think so
<rqou> i guess we have to stick to NSAcoin for now :P
<sorear> it might be possible to adapt van oorschot-wiener to to the "distinguished points on a blockchain" use case, but I haven't worked the details yet
<rqou> sorear i'm curious what's your background?
* sorear wonders why Google and IBM are hyping quantum computers for basically everything except the tasks that they are theoretically known to have an advantage at
<rqou> you seem to know a lot of the math that i don't know
<rqou> also wtf it's late, sleep time
<sorear> i'm ~entirely self-taught on math stuff, my background is a chaotic mess of everything because it's whatever caught my fancy on any given day
<sorear> so not much help there
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<mithro> daveshah: morning
<daveshah> mithro: morning
<mithro> daveshah: replying right now
<mithro> daveshah: How are you finding getting around the code base?
<daveshah> mithro: not too bad, although I've only been at the edges so far
<daveshah> mithro: I've also got optional pinlocations working, but I want to see what kmurray has to say about the default <fc> setting
<mithro> daveshah: I'd send the pull request
<mithro> daveshah: btw your in #vtr-dev right?
<daveshah> mithro: yes
<daveshah> mithro: will do
<mithro> daveshah: kem_ is pretty responsive normally
<daveshah> mithro: actually before I send the PR, I will re-disable the debugging that was set in 92d6b57c1a (but keep the fixes in that commit)
<mithro> daveshah: Oh?
<daveshah> mithro: just a #define that I think should be commented out (it is in master)
<mithro> daveshah: Yeah - you shouldn't be sending that
<q3k> jn__: trust me, G33KatWork and myself as working as hard as we can on that exploit :P
<jn__> hi q3k, i didn't know you're in here :)
<q3k> I idle everywhere :P
<q3k> just takes a while to catch up on backlog
<q3k> anyway, the bootrom is quite a bit to reverse, actually
<q3k> doesn't help that it talks to half-documented registers and peripherals
<q3k> we're still at the stage of trying to understand what it does. but we've found some interesting undocumented functionality already.
<q3k> tbh G33KatWork does most of the work, I keep making up excuses that I need to work on my $dayjob :)
<jn__> 96kb is a lot, i believe that
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<awygle> azonenberg: I was changing Firefox settings, not anything capable of melting anything
<awygle> Also can you do DNS-SD in a SLAAC based system?
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<awygle> Looks like the answer to the above is "only kind of"
<mithro> q3k: What are you working on?
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<mithro> q3k: Oh! You are a fellow litex contributor! :-P
<q3k> mithro: G33KatWork and myself are working on being part of the Tegra Bootrom Exploit Club
<mithro> q3k: Ahh
<q3k> mithro: and yeah, I do contribute to litex from time to time :)
<q3k> hopefully more soon, as I'm planning on using it a log for my open bitstream for the Siglent Zynq scopes
<q3k> (again, another effort with G33KatWork )
<mithro> q3k: How's the Zynq / AXI stuff going?
<q3k> well, axilite2csr works
<q3k> i'm almost done with generating IP-XACT shims for automatic vivado core generation from LiteX
<q3k> next step is to have full AXI support, too
<q3k> and bridge that to wishbone or whatnot
<q3k> we'll see :)
<Prf_Jakob> q3k: Is the video core i Artix 7 "soft" and implemented in the FPGA?
<q3k> hm?
<q3k> you mean the waveform drawing on the scope?
<q3k> all signs points to yes in the stock bitstream, and that how we'll be implementing it ourselves probably, too
<mithro> q3k: Did we meet at CCC?
<q3k> but yeah, all of the high-speed stuff is implemented in the artix fabric
<q3k> mithro: maybe? :)
<q3k> mithro: i was haning out at the warsaw hackerspace assembly
<q3k> mithro: near the CTF teams, and a 128x128 LED display :P
<mithro> q3k: I was hanging out near failoverflow and open fpga tables quite a bit
<q3k> ah, no then
<q3k> i wasn't even on this channel back then
<mithro> q3k: BTW _florent_ was at CCC last year too
<q3k> i missed everyone then, yay ^^
<mithro> q3k: Ahh well
<mithro> more people I can get doing litex and FPGA stuff the better :-P
<Prf_Jakob> q3k: Probably not talking about the same thing, but thanks!
<Prf_Jakob> It sounded a bit like the GPU of the Zynq was in the fpga parts.
<Prf_Jakob> Tho looking at the block diagram it does look that.
<q3k> ah, you're talking about the zynq in general
<q3k> depends on the chip
<Prf_Jakob> Ah
<q3k> the 7010 and 7020 don't have any gpu/acceleration in hardware
<q3k> and that's what the scope uses
<Prf_Jakob> Ok
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<felix_> oh, nice, just saw that there is now axi lite support in litex
<pie__> whats that
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<mithro> q3k: Have you seen ZipCPU's wb2axi stuff?
<q3k> nope
<q3k> the formal verification part is interesting
<mithro> q3k: The most interesting thing about his work is the formal verification side
<mithro> q3k: snap :-P
<q3k> but yeah, I want it the other wise around
<q3k> I want to use litedram for the acquisition memory in the scope
<q3k> have a low-latency bus between that and the sampling logic
<q3k> and then be an axi slave so that you can pipe out samples slowly to the Zynq PS
<q3k> *the other way around
<G33KatWork> Prf_Jakob: the zynqs don't have any dedicated graphics acceleration or even output in hardware even the bigger ones. you need to implement that in the PL. starting with the zynqmp (totally different chip and architecture) they have displayport and a mali GPU in hardware
<q3k> right, I keep conflating the zynq&zynqmp
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<ZipCPU> mithro: Thanks for the compliment. I've tried doing the AXI to WB a couple of times now. My failures are currently in that same repo. Fascinating thing is ... I never knew that the AXI->WB was such a failure until I tried applying the formal properties to it.
<ZipCPU> q3k: I'll probably give another go at AXI->WB again. However, the last time I tried it I put way too much time into it with no results. It'll happen, I'm sure, It's just likely to take some time.
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