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<whitequark> azonenberg: http://www.shopwiznet.com/w5100
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<awygle> oh wow! glad she's ok
<azonenberg> I think everyone on the team would have lost money on that bet
<azonenberg> We were not expecting a 71yo to be not only alive but conscious and coherent and relatively uninjured
<azonenberg> after six days in the woods with no gea
<azonenberg> gear*
<azonenberg> Ranger with the park service spotted her from an observation helo, directed a bunch of my team members to meet up
<azonenberg> then coast guard did the pickup since the park ranger's helo didn't have a winch
<azonenberg> Apparently the coast guard helo got video of the rescue and will be releasing tomorrow
<azonenberg> Cant wait to see that, i watched them from the ridgeline while listening to radio traffic but wasn't down in the valley where they found her
<azonenberg> Did get to see the dog though, they brought him out by land
<rqou> and then the woman ends up with an $infinity bill and files for bankruptcy :P
<awygle> pretty sure that doesn't happen - my father always complains that it should :P
<awygle> that's awesome azonenberg, super glad to hear it. i'll try to remember to look for the video tomorrow
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<azonenberg> rqou: SAR and USCG do not charge for rescues
<azonenberg> Civilian medevac companies do, but we didn't use them
<azonenberg> Whatever hospital she was transferred to almost certainly does too
<azonenberg> :p
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<jhol> I started writing an architecture XML generator for the iCE40 last summer, but I ran into a few obstacles that I couldn't overcome
<pie_> something something politics https://twitter.com/TheRaDR/status/889205700873924610
<awygle> hi jhol, thanks for filing that issue
<jhol> awygle: yeah - no worries
<jhol> the main point is that this is a very positive and prompt response from them
<jhol> it means if we started hacking on VPR, our efforts would be welcomed
<jhol> and that they would help us with PAR if more FPGAs get RE'd
<balrog> jhol: almost sounds like someone needs to look at VTR-to-bitstream and see what's mergeable
<jhol> yeah I'm just taking a look
<jhol> " VTR-to-Bitstream is supplied as a patch for VTR version 7.0: "
<jhol> the repo doesn't have tags
<balrog> might have to look at commit logs
<jhol> yup
<jhol> have to guess
<balrog> or ate-match
<balrog> date-match*
<balrog> I'd file an issue: "tag releases"
<balrog> :P
<balrog> but this looks like it was originally imported from svn
<awygle> jhol: do you know how/if VPR handles creating bitstream outputs? i'd guess VTR-to-bitstream must have some way of doing that..
<jhol> it doesn't support that
<jhol> as you say VTR-to-bitstream is the project do do it
<jhol> I didn't know about it, but I assume it's easy to do if you already have metadata for the bitstream
<balrog> VTR-to-bitstream is a set of patches though
<awygle> i wonder why VTR-to-bitstream is a separate project
<balrog> awygle: it was done as an academic project and probably never merged in
<jhol> yeah
<balrog> jhol: it also seems very xilinx-specific
<jhol> indeed - I was looking inside to see if there is any information relevant to Clifford's Artix-7 RE project
<balrog> looks like they targeted the ML605 which is a Virtex-6
<balrog> and it does not appear that they used tags in their SVN
<balrog> so matching is gonna have to be done
<jhol> I found it
<balrog> which rev is it/
<jhol> 6b97c59a7cbe80f5d79c3e0c765280b02fecad14
<balrog> I see...
<balrog> now how much of that can be genericized
<jhol> sorry I screwed up
<jhol> 1-sec
<jhol> that's better
<jhol> vtr_flow/arch/xilinx/xc6vlx240tff1156.xml is a good VPR architecture XML example
<jhol> I can probably use it to advance my ice40 architecture
<jhol> much less noise now
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<awygle> oh i see, so vtr-to-bitstream uses torc for bitstream generation?
<jhol> can torc do that?
<balrog> "The Torc infrastructure can read, write, and manipulate EDIF and XDL netlists, as well as Xilinx bitstream packets (but not configuration frame internals)."
<balrog> seems to support <= Virtex6
<jhol> so does Torc have a RE'd bitstream of the Virtex 6?
<balrog> are those yanked from ISE?
<jhol> oh woops
<jhol> probably
<balrog> I'm not sure, just asking
<balrog> kinda interesting tha they're doing that though
<balrog> or are tehy
<balrog> they*
<balrog> "Torc also provides exhaustive wiring and logic information for all major Xilinx devices, derived from non-proprietary sources"
<jhol> sounds legit*
<balrog> I don't have an install of ISE or Vivado here to check
<awygle> it looks like they basically came up with a set of primitives (LUTs, FFs, i dunno - stuff), wrrote tiny programs expressing them, and compose the resulting bitstreams into larger bitstreams
<balrog> ohhhh, are they dumping info using xdl
<awygle> i gotta go try to rent an apartment, i look forward to coming back and being told how wrong that description was by somebody reading the whole thesis XD
<balrog> I think that's what they did
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<rqou> are you still working on your project to cheat at vidya?
<pie_> no this is a different one
<pie_> thats still on hold due to decompiler bug :/
<pie_> that noone is going to fix i think :(
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<pie_> rqou, this is the game reversing project if i mentioned that one
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