00:09 <pointfree> Get a devkit for an older eASIC for $2500 http://www.easic.com/easic-and-iar-systems-deliver-e926-development-kit-for-designing-low-cost-customized-arm926ejtm-embedded-systems/

00:22 <pointfree> "Design for Manufacturability in Via Programmable Gate Arrays" http://www.ece.cmu.edu/research/publications/2003/CMU-ECE-2003-018.pdf

00:39 <pointfree> There's also re-programmable vias http://www.eetimes.com/document.asp?doc_id=1171664 http://www.monolithic3d.com/uploads/6/0/5/5/6055488/d_c_sekar_iccad_2007.pdf http://www.monolithic3d.com/

00:40 <pointfree> "As we now know NuPGA is no longer pursuing FPGA technology but rather fully committed to farther develop its monolithic 3D IC technology breakthrough."

00:41 <pointfree> bummer

07:56 <azonenberg> Sooo i am sending 256 bytes to an FPGA over a FT232R

07:57 <azonenberg> and a bit over 200 actually get there

07:58 <azonenberg> Unsure at this point where they're being dropped

07:58 <azonenberg> Just what I need

10:52 <cr1901_modern> azonenberg: You sure you're using a genuine FTDI chip ;)?

13:00 <balrog> PSoC 6 has 12 UDBs... disappointing\

13:01 <balrog> ehh still better than the 4

13:02 <balrog> cyrozap, pointfree ^

13:07 <pointfree> balrog: You speculated that with the PSoC 7 we might get more https://www.reddit.com/r/PSoC/comments/5z71xg/cypress_unveils_psoc_6/dez4m08/

13:09 <pointfree> PSoC 6 seems rather IoT focused which is not what I need.

13:10 <pointfree> I'm not really a fan of replacing flexible logic with ever more hard-ip.

13:11 <balrog> the sort of hard IP they're adding is useful for the application though

13:11 <balrog> and is easier to power-gate

13:14 <pointfree> balrog: True. The UDB datapath is useful for dynamic configuration and ties in with the status and control registers. I'd like to get JIT logic synthesis working soon. I think this will effectively increase the area by not having dead, unused logic occupying configuration space at a given time.

15:03 <azonenberg> cr1901_modern: i decapped one from the same batch

15:03 <azonenberg> so yeah

15:28 <azonenberg> Hmm weeeird

15:28 <azonenberg> ok so i reproduced my issue on an oscilloscope

15:28 <azonenberg> i have a LA toggling a pin every time a new byte comes in the uart

15:28 <azonenberg> and sometimes the pin doesn't toggle, wtf

15:28 <rqou> azonenberg: poke poke

15:28 <rqou> see PM

15:29 <azonenberg> See reply :p

15:30 <azonenberg> Sooo yeah it seems like something in my firmware is dropping bits??

16:24 <azonenberg> aand it seems like my old UART core has a sync bug or something when you disable oversampling

16:25 <azonenberg> Will have to investigate when i get back but for now turning on oversampling makes it work

16:26 <azonenberg> Also, I now have the LA-over-UART correctly configuring and triggering

16:26 <azonenberg> just need to make it download the data when i'm done

16:26 <azonenberg> Buuut i have to leave for the airport in an hour to make it to defcon, so i probably won't be gtting that done until the end of the weekend :p

17:02 <rqou> defcon check in?

17:03 <azonenberg> One of our other guys is grabbing badges, i just have to meet him

19:26 <pie_> demoparty in a month and a half

19:26 <pie_> > insert panic <

19:26 <pie_> how is babby demod

19:34 <qu1j0t3> haha

19:49 <pie_> (this is basically how i came up with the whole shader assembly fuzzing idea)