<noblock>
I'm not sure if this is the right sequence.
<apritzel>
if you use FEL, please add an ATF build
<apritzel>
only that gives you the full glory anyway
<noblock>
The pine's ATF is OK?
<apritzel>
yes, the allwinner branch has some preliminary H5 support
<apritzel>
then add: "write 0x44000 bl31.bin reset64 0x44000" to the above FEL command line
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<noblock>
Now this is working properly. Thanks.
<apritzel>
(puh!)
<apritzel>
enjoy
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<noblock>
I will.
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<noblock>
apritzel: Here is a script (slackware like) to generate all the required H5/opipc2 u-boot files: http://pastebin.com/xTKyqHte - I hope it will ease the proces.
<apritzel>
ah, nice to meet the other Slackware user ;-)
<noblock>
I had very few issues while compiling a lot of packages with arm7vl as target; aarch64 is not so straightforward, e.g. emacs without any patch crashes...
<apritzel>
yeah, I spent month on this aarch64 port, tbh
<apritzel>
actually cross-compiling everything from x86-64
<apritzel>
by patching the Slackbuilds
<miasma>
does anyone use alpine linux with sunxi devices here?
<miasma>
it's also quite nice for conserving space :)
<apritzel>
miasma: don't you disturb this Slackware discussion here ;-)
* miasma
hides
<noblock>
I used a wrapper and qemu; A lot of packages are no 'cross' compatible.
<miasma>
qemu misc binfmt stuff and a chroot/container is a pretty nice way for cross-building arm stuff
<noblock>
Indeed.
<apritzel>
noblock: yeah, I focused on the basic ones, up to the point where the toolchain & friends run natively
<apritzel>
but yeah, I had to fix quite some packages on the way
<apritzel>
and I used QEMU binfmt in the beginning as well, but eventually could do without it
<apritzel>
after like 50 packages you know what to do when it fails ;-)
<igraltist>
its on the cubietruck, forgot to order
<ErwinH>
Without uart cable debugging is pointless. Use a known good image or kernel.
<igraltist>
can only try with usb to rs232 and catch later after usb is available output
<igraltist>
ah looks like my uboot config has an error.
<igraltist>
even when i use: make ARCH=arm CROSS_COMPILE=armv7a-hardfloat-linux-gnueabi- Orangepi_defconfig
<igraltist>
the Cubietruck A20 was choose
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<igraltist>
the uboot has set: CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
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<MoeIcenowy>
igraltist: Orange Pi PC is not Orange Pi
<MoeIcenowy>
Use orangepi_pc_defconfig and sun8i-h3-orangepi-pc.dtb
<MoeIcenowy>
"Orange Pi" is an A20 board
<MoeIcenowy>
"Orange Pi PC" is H3
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<igraltist>
MoeIcenowy: ok and i was wondering
<igraltist>
i was only search vor big beginning letter
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<tuxillo>
hi
<tuxillo>
not sure if this is something that can't be done but could there be a gdb interface for FEL?
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<NiteHawk>
tuxillo: "FEL" is BROM code implementing a set of bootstrapping functions. what would that interface provide, the ability to debug FEL itself?
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<tuxillo>
NiteHawk: but you can read/write from/to specific memory locations right?
<tuxillo>
from the device
<tuxillo>
NiteHawk: yeah, with readl/writel
<jski>
if I remove the CTS and RTS control from a uart in the script.bin does this mean the pin is free'ed up and I can use it for gpio?
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<NiteHawk>
tuxillo: I'm just struggling to see what your overall goal is. are you thinking of an arm program (debuggee) that would be debugged using FEL as a "transport layer"?
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<KotCzarny>
usb sniffer + protocol decoder?
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<tuxillo>
NiteHawk: exactly!
<tuxillo>
a baremetal program specifically
<tuxillo>
it just that when I saw you could read/write specific memory locations I thought it could be used for that
<tuxillo>
ofc I am not sure if that's even possible, hence I'm asking
<NiteHawk>
tuxillo: i don't think that's possible, or at least it would be very hard to achieve. it would probably involve extra "thunk" code to handle breakpoints and saving/restoring register values for the execution of the target code. you'd have to be extremely careful not to interfere / break the FEL handler itself (rendering the device unresponsive)
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<MoeIcenowy>
It seems that Orange Pi Zero suffers from the old "half-powered via UART" issue...
<KotCzarny>
most of them do
<KotCzarny>
those oranges
<MoeIcenowy>
I think I missed this for a long time ;-)
<MoeIcenowy>
the previous board I have that has this issue is Cubieboard 1
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<tuxillo>
NiteHawk: sure, just mentioning something that came to mind :)
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<ErwinH>
That peekpoke tool is fun, altering the cpufreq atm.
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<scelestic>
poke peek that brings back memories
<ErwinH>
Running at 24MHz iperf3 reaches 14Mbit/s
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<apritzel>
scelestic: ah, so at least one got it ;-)
<apritzel>
ErwinH: how does the system feel at 24MHz?
<ErwinH>
Just like the old days :)
<KotCzarny>
like i486
<ErwinH>
Actually, not even that bad. Commandprompt doesn't feel that laggish, running commands is slow.
<apritzel>
ErwinH: nice, would be good to see the power consumption, although one would need to clock down the other parts of the system as well
<miasma>
MoeIcenowy: would it help/still work if there was some resistors in series for the uart
<ErwinH>
And lower the CPU_VDDX
<apritzel>
miasma: some boards have a FET to prevent power insertion
<KotCzarny>
well, since he is not changing voltage, it should be the same as 408 mhz or something
<apritzel>
I should release a "486" edition of the firmware, with all clocks set to their minimum ...
<ErwinH>
Haha
<ErwinH>
For a lot of things a 486 edition is plenty :)
<apritzel>
or I call it "Raspi edition" :-D
<scelestic>
apritzel: ^^
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<ErwinH>
Hehe, using the i2c-tools I can also control the sy8106a :P
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<apritzel>
ErwinH: can you read sensible values?
<MoeIcenowy>
all to minimum... yes really 486
<MoeIcenowy>
the developer of Lichee Pi did it on A13, with 24Mhz CPU and 24Mhz DRAM (
<apritzel>
ErwinH: I had my own I2C code for the SY8106A on baremetal and could set voltages, but the readout was weirdly rotated
<MoeIcenowy>
according to him, it takes ~5min to boot a regulat Linux
<ErwinH>
I'll verify that.
<ErwinH>
Setting works fine, which I can verify using a voltage meter.
<apritzel>
ErwinH: yes, that's what I did as well
<ErwinH>
Running @96MHz which is working fine. Can even install packages using apt :)
<apritzel>
OK, thanks, so have to find the bug in my code
<MoeIcenowy>
ErwinH: did you measure the power of your board now?
<MoeIcenowy>
how low is it? ;-)
<ErwinH>
No, haven't got a powermeter connected. Sorry.
<apritzel>
MoeIcenowy: on your H3 SID research: what do you mean with "register access" vs. "direct read"?
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<MoeIcenowy>
apritzel: register access means using control register @ 0x01c14040 and value register @ 0x01c14060
<MoeIcenowy>
direct read means reading 0x01c14200
<ErwinH>
El cheapo meter says 0.07A
<ErwinH>
@ 5V
<apritzel>
MoeIcenowy: ah, OK, thanks
<MoeIcenowy>
not needed to care it on A64
<MoeIcenowy>
as I'm sure A64 have fixed this issue
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<NiteHawk>
MoeIcenowy, KotCzarny: I can confirm your findings for H3 / my opipc, currently tinkering around with (experimental) thunk code for "sunxi-fel -v sid"
<NiteHawk>
SID key (e-fuses) at 0x01C14200
<NiteHawk>
Register-based retrieval, base = 0x01C14000
<NiteHawk>
02c00081:54004620:50354520:1c34020e
<NiteHawk>
02004620:54354520:5034020e:1c000000
<NiteHawk>
the second invocation (after register-based access) then yields consistent values
<MoeIcenowy>
yes... according to BSP code
<MoeIcenowy>
the last byte of first word is used to indentify SoC
<MoeIcenowy>
see my second commit in my PR
<MoeIcenowy>
this works on fixed SID
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<NiteHawk>
the same code can be used on A64 and A20 too (verified with Banana Pi M1 and Pine64+) without negative impact - except that they would give the correct values with memory-based access anyway (i.e. aren't affected)
<KotCzarny>
i guess only h2+/h3/h3d chips are affected
<KotCzarny>
in general h3
<KotCzarny>
so you might even just check for h3 id and dont change for other cases
<NiteHawk>
yes, we could do that based on SoC ID (and flagging the chip in soc_info.c accordingly), like MoeIcenowy did in her PR
<MoeIcenowy>
what my PR lacks is only a thunk
<MoeIcenowy>
I do not know ARM assembly...
<NiteHawk>
I'm at it already ;)
<MoeIcenowy>
thx
<NiteHawk>
my experiements indicate that we might cut down on readl/writel operations of SID_PRCTL quite a bit - some of the bit masking the AW reference code does seems unnecessary
<KotCzarny>
watch out
<MoeIcenowy>
NiteHawk: in fact what I mostly doubt is A83T
<KotCzarny>
no docs, so watch out
<MoeIcenowy>
as A83T is sun8iw6 and H3 is sun8iw7
<KotCzarny>
maybe they have some corner cases
<MoeIcenowy>
and V3/V3s (sun8iw8)
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<NiteHawk>
maybe we should keep the soc-based approach for those (H3) we we definitely identified a problem, and provide an additional command ("sid-fix"?) so that users may enforce the new logic and thus are able to compare against the memory-based result
<KotCzarny>
just fix sunxi-fel sid for h3(and relatives)
<KotCzarny>
that's my opinion
<KotCzarny>
and there will be fix needed for uboot too
<KotCzarny>
but i dont know who is current maintainer
<MoeIcenowy>
NiteHawk is.
<MoeIcenowy>
fix for uboot have been sent by me and acked by mripard
<NiteHawk>
No, I'm maintaining sunxi-tools - U-Boot is a different beast
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<MoeIcenowy>
oh I misread the sentences
<MoeIcenowy>
I think Jegan Teki can now merge sunxi patches
<MoeIcenowy>
he merged my orange pi zero patch
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* MoeIcenowy
trying to implement mac address from dt for xradio
<mripard>
MoeIcenowy: Jagan and I are the maintainers
<MoeIcenowy>
mripard: thanks
<MoeIcenowy>
however now get_maintainers.pl returns "Unknown: Allwinner support" for you two
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<mripard>
hmmm, indeed
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<mripard>
we'll need to fix that
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<MoeIcenowy>
tkaiser: you may get interested in my some advances on opi0 and xradio
<MoeIcenowy>
for xradio, just check my github repo
<likewise>
Is there USB Ethernet support in U-Boot for A13 somewhere?
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<tkaiser>
willmore: Steven wrote me that USB on the NAS HAT thingie is multiplexed (no idea how that works) and that an USB hub should be on 'main Zero board'.
<KotCzarny>
multiplexed as in internal usb hub?
<KotCzarny>
or usb-over-gpio ?
<tkaiser>
willmore: Maybe just a misunderstanding since I was also mentioning different Zero boards and suggested releasing one with Gigabit Ethernet.
<tkaiser>
KotCzarny: Not the slightest idea. We'll see soon
<KotCzarny>
still, for such tiny board its nice
<tkaiser>
But somewhat limited if the NAS HAT can only be combined with Fast Ethernet or WiFi equipped boards.
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<KotCzarny>
still, faster than fRailPI (most likely)
<tkaiser>
Always faster than any RPi
<tkaiser>
You just need to spend additional 7.5 bucks for an RTL8153 Ethernet dongle in that case.
<tkaiser>
Ah, just found the numbers for this USB-to-Ethernet dongle (RTL8153). Some realworld tests involving both disk and network: with legacy kernel 15/25 MB/s (write/read), with mainline kernel (4.6 back then) 35 MB/s in both directions. Though everything USB 2.0 based and feeling somewhat crappy anyway :)
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<willmore>
tkaiser, any chance he could provide the schematic?
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<tkaiser>
willmore: will ask Steven. And checked the above USB-Ethernet numbers to realize that my first test went wrong. With legacy kernel such an Ethernet thingie is able to reach 25/30 MB/s (write/read).
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<willmore>
That's pretty good.
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<willmore>
It's not native GigE good, but it's better than 100BT
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<tkaiser>
willmore: But given that OPi PC 2 with RTL8211E exceeds 900 Mbits/sec in both directions another H5 board being compatible to that NAS HAT would be even more great. But it seems the Zero Plus 2 will be either limited to Fast Ethernet or has no Ethernet at all :(
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<tkaiser>
Hmm... by looking at OPi Zero dimensions and given that Zero Plus 2 comes with both eMMC and AP6212 an Ethernet jack seems almost impossible.
<jernej>
MoeIcenowy: What is your source for "H2+ doesn't support 4K HDMI output" on wiki? AFAIK there is no limitation present in the HDMI code.
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<willmore>
tkaiser, missing ethernet should be called a 'lite' board, at least following their seeming naming convention.
<muvlon>
tkaiser: wait, there's a zero plus 2 now?
<willmore>
jernej, The only H2+ board out there doesn't even have HDMI, so it clearly doesn't support 4K. ;)
<willmore>
muvlon, something guessed at from reading some DTS files in a repo.
<muvlon>
ah
<muvlon>
opi naming is confusing as hell anyway
<willmore>
yep
<willmore>
I'd like an Opi zero with an H5 instead of an H2+. Bump the ethernet to GigE and leave the I/O the same. Take away the wireless if you need to...
<willmore>
But, 1GB of memory instead of 512MB.
<jernej>
willmore: You already have OPi PC 2 ;)
<willmore>
jernej, good point.
<willmore>
But it needs to take the little NAS hat made for the 1x13 pin connector of the zero
<Pepe>
Wait for Opi PC 2 Plis
<Pepe>
Plus
<willmore>
Orange Pi Zero 2
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<muvlon>
for example, why is PC == no onboard flash and no wifi?
<jernej>
just take some dupont wires :)
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<willmore>
jernej, hmm, are there two extra USB ports on pins there?
<jernej>
oh, you are right
<muvlon>
for other SBC brands, the ones named "PC" are usually the ones with a larger footprint, more RAM etc.
<willmore>
There are, instead two full USB connectors.
<jernej>
that wouldn't fly
<willmore>
Could just skip the NAS hat and use two USB<>SATA adapters.
<willmore>
Not as nicely integrated and loses the mSATA connectivity...
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<muvlon>
also, the "OrangePi PC Plus" has half the RAM of the "OrangePi PC"
<muvlon>
what?
<willmore>
I am probably atypical, but I don't need TRS, IR, camera, or mics on my SBCs.
<muvlon>
oh wait no it's just split, half of it is on the bottom
<willmore>
Heck, I don't need HDMI most of the time.
<willmore>
Which is why the Zero appals to me.
<willmore>
Oh, don't need Wifi, either. But, still...
<muvlon>
willmore: not at all atypical, many people are running a NAS or some sort of file server on their SBC
<muvlon>
you don't need any of those for that
<willmore>
USB, ethernet, and some GPIO and I'm happy.
<muvlon>
sATA would be nice
<willmore>
If you add HDMI, then people start asking about mali, right, tkaiser?
<muvlon>
but many SoCs themselves don't offer that
<willmore>
Yeah, *native* SATA would be nice.
<muvlon>
if it's an integrated USB->sATA adapter then I'd rather use an external one
<muvlon>
and have more USB exposed
<willmore>
Agreed. Because they'll always pick a crappy one. :(
<willmore>
I do like the rpi 'B' form factor. Four USB and ethernet on one face.
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<muvlon>
yes
<muvlon>
but I like larger ones too, like the cubieboard 5
<willmore>
I am unfamiliar with the whole cubieboard family.
<muvlon>
they're nice but the latest one is still based on H8 so no ARMv8 yet :/
<willmore>
The Orange Pi boards seem better supported.
<muvlon>
yeah but there's a million different ones
<muvlon>
even their website can tell them apart anymore
<muvlon>
s/can/can't
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<tkaiser>
muvlon: Cubieboard 5 uses the most crappy USB to SATA bridge (GL830, slow as hell and also broken). Quite the opposite of the JMS578 used on the NAS HAT for Zeros
<muvlon>
ah, shame
<tkaiser>
Maybe this GL830 was part of Allwinner's reference design. The MeLE TV boxes with A31 for example also use this bridge internally.
<beeble>
it's the cheapest
<muvlon>
does allwinner even make SoCs with actual SATA?
<tkaiser>
muvlon: A20, A10, R40 have all native SATA. Though with some limitations (especially sequential write speeds)
<muvlon>
ah
<tkaiser>
beeble: Do you know prices of these chips? How much one gets charged when buying 1000 GL830 or JMS578?
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<beeble>
remember me tomorrow or so. don't have access to my parts database from home
<tkaiser>
beeble: Ok, try to remember to remember you ;)
<beeble>
but the JM was about double the price iirc
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<willmore>
So, they're caught in the 'have the feature and do a crap job of it or pay money and do it right, but risk people not wanting that feature and seeing the board as overpriced' trap.
<willmore>
Daughter cards.
<willmore>
That's the solution--hence the NAS hat.