<wens>
I'm guessing the 2 extra pins are for power
<mnemoc>
:o
<hramrach>
why no a42
<mnemoc>
hopefully they are reserving the a4x for an a10-ish quadcore
<mnemoc>
with sata and GbE
<hramrach>
gaby: you can probably render to memory buffer ;-)
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<hramrach>
or do we have any kind of video driver on mainline?
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<wens>
mnemoc: really?
<wens>
hramrach: no we don't
<mnemoc>
wens: I don't want to lose the hope
<gaby>
hramrach: I want hardware acceleration, software accel will not be enough for my goals
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<gaby>
but, (now that i have read correclty) If I can do memory buffers, Maybe I can hack something around that. So just the display is missing ?
<ssvb>
gaby: what kind of 3d applications do you want to run on it?
<gaby>
ssvb: for the moment, I need just to be able to use egl, some extensions, and to be able to draw textures
<gaby>
yep, that's it.
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<ssvb>
gaby: you are welcome to contribute to the mainline kernel development (that's a lot of fun!), or use the 3.4 kernel if you want the egl/gles to work right now
<gaby>
ssvb: ok :)
<ssvb>
gaby: sounds like you only want the framebuffer mali drivers for some single purpose application, and not the whole linux desktop
<gaby>
ssvb: In fact, I need to have kvm working (and a quite recent version of qemu) and egl/gles at the same time.
<gaby>
I don't need X11 to be working, I just need something to put textures, (shared by another application) on the screen
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<gaby>
The real question is, I guess : "Can I use a more recent kernel than 3.4 and keep egl/gles ?"
<rm>
what's the purpose of 'using a more recent kernel'?
<rm>
3.4 is a longterm series, it receives bugfixes and security fixes
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<rm>
can you define why you absolutely need a newer one, or is it just for the sake of it
<gaby>
rm: I need kvm to be working, I have not checked which version should be preferable for the moment.
<gaby>
and the question is still valid. maybe the answer is no, I will do with that :)
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<gaby>
same sort of question, anyone have tested the lima drivers ?
<gaby>
In fact I need at least a 3.9, because without that I will have no kvm.
<ssvb>
gaby: lima drivers use the mali kernel module
<gaby>
ok, I didn't know that. So not a solution
<ssvb>
why not?
<ssvb>
you need two things:
<ssvb>
1) some very simple framebuffer driver in the mainline kernel (maybe even a forward port of a messy sunxi disp driver will work)
<ssvb>
the mali kernel module may be not up to the mainline kernel quality standards and probably does not use the approved frameworks, but it is a proper free software
<gaby>
Oh, I misunderstood completly.
<gaby>
I don't really care about cleanness and code quality for the moment, I just need it to work. I will have to test that, but thanks a lot
<ssvb>
well, somebody needs to try this, but in theory it should be doable without spending too much efforts on it
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<ssvb>
gaby: are you sure that all the needed egl/gles extensions are really supported?
<gaby>
no, not yet
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<gaby>
I need to check a lot of things :) For the moment, I have a quite unstable poc on x86, with intel drivers. But for some reason, my company want to "test it on allwinner a20"
<wens>
we won't be happy without the datasheet/SDK
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<Gerwin_J>
Only for partners... like with a80
<Gerwin_J>
the get sdk for linux and android
<libv>
well, given that a23 has been out for 6 months...
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<libv>
and that no-one apart from wens has cared so far
<Gerwin_J>
last time i talk with Eva
<Gerwin_J>
she said to me: "we will try our best to make it open"
<rz2k>
last time they said that they thought that linux-sunxi is rhombus-tech.
<rz2k>
:p
<libv>
Gerwin_J: i still need to take further action on this, but she hasn't bothered to my email telling her about the GPL violations in the a23 sdk we got in december
<mnemoc>
libv: she will care after we start broadcasting (twitter, fb, g+, linkedin, ...) link to the hall of shame and gpl violations status wiki pages
<wens>
libv: is the kms driver supposed to cover the whole frontend/backend/lcd pipeline?
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<libv>
wens: yes
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<wens>
so there's no easy way to partition the blocks into different drivers
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<libv>
i have partitioned them internally
<libv>
why are you asking about this in this fashion?
<wens>
right, but you can dump frames from memory to the lcd controller directly, no?
<vbmithr>
Hi
<libv>
wens: nope, you can however throw them at the compositor (i keep on forgetting what allwinner calls back and what allwinner calls front end)
<libv>
wens: which is what i am doing atm, as i haven't been too bothered with the scaler/filter/format changer
<libv>
these engines are all tied together, there is probably a tiny bit of caching taking place between, but mostly, they depend on eachother directly, and pixels are fed through directly
<libv>
there is no RAM access in between
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<wens>
the diagrams in the datasheets have a DMA channel from memory to the LCD controllers, though I haven't been able to find the register value for that mux
<libv>
i haven't found or seen anything solid on that
<libv>
i too have seen that diagram
<wens>
in the A23 LCD controller, there is input for DMA RGBA888 and RGB565, so at least the newer one does
<wens>
(page 336 of the A23 manual)
<libv>
but nothing seems to indicate that this is actually happening
<libv>
that's probably the compositor
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<wens>
there's a separate input for the display engine
<libv>
what do you mean by display engine in this context?
<libv>
scaler, compositor, lcdc, encoder, those are all part of the display engine
<wens>
it just says DE0, matching the DE in the diagram
<libv>
wens: that stuff is driving the lcd directly
<theOzzieRat>
what is the right way to increase the number of irqs? I am trying to get the pca953x driver to work and there are not enough interrupts free. To test I hacked and added 128 to NR_IRQS and it then works.
<libv>
wens: lcds are very often 18 bit
<vbmithr>
With the mainstream kernel, how to know which GPIO correspond to which pin of a board ?
<wens>
vbmithr: mount debugfs and look at /sys/kernel/debug/pinctrl/1c20800.pinctrl/pins
<libv>
hrm, that was badly put
<wens>
vbmithr: the pin numbers are the same as the gpio numbers
<libv>
tcon0 is the block that sends the digital data directly to the panel, and it probably also does interpolation
<jemk>
libv: the defe (scaler/...) can write back to memory without debe (compositor), and it would be good to keep this possibility
<jemk>
libv: or did i understand you wrong above
<libv>
jemk: debe can iirc
<libv>
jemk: what do you mean with "keep"
<libv>
jemk: do you really think that the allwinner implemented this in the disp code?
<jemk>
current disp driver has scaler_execute that does this
<vbmithr>
wens: thanks, I'm trying that.
<libv>
i do not recall seeing that
<jemk>
i tested this in vdpau once, it worked but the additional memory access makes it slow
<wens>
libv: what I'm asking is can we skip defe/debe and have tcon0 output a frame directly from memory to the LCD panel, the diagram suggests that's possible
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<libv>
wens: not to my knowledge.
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<libv>
wens: lcdc depends on the compositor directly
<libv>
jemk: ah, you are right indeed
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<jemk>
libv: its the only way to convert the tiled yuv to something else in hardware
<libv>
while being able to read it back from memory, that is
<libv>
it could be that the mali manages this too
<libv>
but then, according to kusma, the mali drivers ignored some of the advanced features the phalanx boys had baked in
<vbmithr>
wens: mount: mount point /sys/kernel/debug does not exist
<vbmithr>
any idea about this ?
<wens>
did you enable CONFIG_DEBUG_FS in Kconfig?
<vbmithr>
wens: that was it, thanks! (was looking for DEBUGFS in Kconfig, could not find anything…)
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<wens>
vbmithr: np, i did that once :)
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<libv>
wens: so we have the dma channel descriptor structure from code, right?
<wens>
I believe we do
<wens>
though I haven't looked at it myself
<libv>
ok, so hrm... it does seem possible
<libv>
would probably make sense when doing dlna or something
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<libv>
setting up debe is not too hard though, most of the problems are with powering it up
<libv>
well "problems"
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<wens>
powering it?
<wens>
poking registers or external regulators?
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<libv>
poking registers
<libv>
everything else is really rather easy, especially if you just want a single fb covering the whole of the display
<libv>
but planes and cursors are implemented, in different formats as well
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<jemk>
wens: as far as i understand this, tcon can get its frame data from the "global" dma engine, dedicated dma chanel 0xe/0xf
<wens>
jemk: right, that's what I was refering to, however the A10/A20 manuals don't say how tcon should select this input over debe
<wens>
hence the confusion
<libv>
jemk: the question then becomes, is there a good use-case for this, and how hard is that to set up?
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<libv>
for getting a quick display under u-boot, you might just as well fire up debe and set up the basics
<libv>
as most of the logic will then still be monitor detection and setup
<wens>
I suppose the only use case would be a dumb output from media players (but color space conversion and stuff would need to be handled elsewhere)
<wens>
and for testing purposes
<jemk>
wens: its missing in the a20 manual, but source and a13 manual have it
<libv>
yeah, dlna sounds like the best use case
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<libv>
jemk: source for the dma engine, or disp code?
<ssvb>
jemk: have you tested the memory to memory defe scaler performance on a10?
<ssvb>
jemk: I wonder if it now works much faster with the defe host port arbitration tweak
<jemk>
ssvb: i never measured performance, only subjective feeling. but it shouldn't be too hard, maybe i'll try later
<jemk>
ssvb: i used it as tiled yuv to rgb converter and then used g2d to draw osd in first osd tests in vdpau, but it only worked up to 720p, then it got too slow
<ssvb>
jemk: it's still nice to have as a generic fallback solution, no matter the speed
<ssvb>
jemk: some frames may be skipped if it works too slow
<jemk>
ssvb: and a fallback for the fallback in case all scalers are already in use? ;)
<ssvb>
jemk: we still always have the CPU, sometimes dual- or quad-core :)
<ssvb>
wens: (without looking at the diagram) can we theoretically also output a frame to hdmi bypassing debe?
<robincook>
hi, anybody knows can I add I2C read/write function on A20 (sun7i)'s u-boot?
<robincook>
I mean, read/write I2C on A20's u-boot.
<Turl>
robincook: it should already support it, the PMU is connected via I2C and configured by u-boot
<libv>
ssvb: looks like that dma is only for audio
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<wens>
ssvb: hdmi takes video input from tcon
<libv>
wens: but tcon1
<libv>
not tcon0
<robincook>
Turl, thank you. I want read I2C bus 1 to check the battery remains power. I try to add the function in boot1 ( I already know boot1 has BOOT_TWI_Read/Write function to read I2C, but boot1's TWI function only support read/write from AXP20_ADDR).
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<Turl>
well, I don't know if all the buses are powered up, mabe just the first one where the axp is
<libv>
according to the a20 doc, tcon1 can also be selected for the dma engine
<libv>
tcon1 source select bits documentation seems to rule out the dma possibility, which seems contrary to the dma setup
<arete74>
/quit
<robincook>
Turl, yes, boot1's BOOT_TWI_xxx only support just one bus address. so, I have to modify the function to support multi bus address, or add read/write function in u-boot. so, here I come to find some suggestions.
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<libv>
perhaps the dma block is falsely marked for lcdc0/1 instead
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<robincook>
if the u-boot support A20's I2C read/write, I think it's a choice to add my function. Thank you Turl .
<robincook>
Turl, it seems A20's u-boot did not implemented i2c_read/write function which defined in include/i2c.h .
<robincook>
I got an error message during compiling: /home/robin/shasta/lichee/u-boot/board/allwinner/sun7i-evb/sun7i-evb.c:250: undefined reference to `i2c_read'
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<Turl>
robincook: lichee, sun7i-evb? sound like you are using allwinner's uboot from the sdk
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<robincook>
Turl, yes, it's from the allwinner's SDK.
<robincook>
and is that right? or, what else can I do?
<robincook>
ah, sorry I don't know that project. and the reason why I use SDK's u-boot is, it's the most easy way to boot the chip up.
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<lauri>
Hi guys, is it possible to lock down microSD boot?
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<TheSeven>
lauri: only if you force it to boot through FEL as far as I can tell
<lauri>
I mean is it possible to disable microSD boot and FEL in hardware?
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<TheSeven>
the only way to prevent microSD boot, as far as I know, is forcing FEL boot
<TheSeven>
so you can't get rid of both at the same time
<TheSeven>
and you can't prevent SD boot if you want to boot from NAND
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<TheSeven>
is it normal to get heaps of "sdc0 set ios: ..." messages during SD card detection?
<TheSeven>
I'd guess 100 of them or so
<TheSeven>
is that already a sign of card or host controller flakiness?
<TheSeven>
then, after a while (during heavy activity) I get heaps of "[mmc-err] update clock timeout, fatal error", after which the card is no longer accessible
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<TheSeven>
mnemoc: is it normal to get heaps of "sdc0 set ios: ..." messages during SD card detection? or is that already a sign of trouble? (the card locks up at a later point during heavy activity with this message: [mmc-err] update clock timeout, fatal error)
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