01:57 <pointfree> cyrozap: Now that I have manually labeled the registers and bits of HS, HVA_L, HVA_R, HVB_L, HVB_R and I've started labeling larger tiles, namely HC, PI, and DSI PI the register numbers are getting too big to fit in the ascii diagram.

01:58 <pointfree> It occurred to me that it would make more sense to have labeled them in hex to keep the offsets to two digits. Arrgh!

01:58 <pointfree> http://odroid.0xffffffff.in/~deploy/psoc-switching/switching-bits-and-regs.html

02:02 <pointfree> I suppose I should just generate it.

02:54 <openfpga-github> [yosys] azonenberg pushed 2 new commits to master: https://git.io/v9kKj

02:54 <openfpga-github> yosys/master b72a7e1 Clifford Wolf: Replace CRLF line endings with LF in de2i.qsf (quartus example)

02:54 <openfpga-github> yosys/master 2021dde Larry Doolittle: Squelch trailing whitespace