clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<shoggoth> kc8apf: I notice that the xc7a50tfgg484 part is the one that has had the most progress made and so I was searching for a board with that part. The Arty and the Basys-3 seem to have the smaller 35T part.
<awygle> shoggoth: I'm fairly sure the 35t is internally a 50t
<awygle> Just with the jtag id fused
<shoggoth> awygle: ahh... that old trick ;)
<kc8apf> Yes, that. Old Arty came with 50t. Now come with 35t
<shoggoth> kc8apf: oh really! interesting
<kc8apf> Config frames are the same
<kc8apf> Device ID is different
<shoggoth> Ok... so I guess I should ask my original question a different way....
<shoggoth> I know that the reversing of series-7 is still a work in progress, but which board is the best choice to work whith what Clifford and Mathias are producing?
<cr1901_modern> sorear: I need most of the 6502 addressing modes to keep it efficient space-wise
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<cr1901_modern> sorear: Actually I have an even more twisted idea... microcode engine using one of those old 4-bit lfsr-pc based micros
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<kc8apf> shoggoth: Clifford and Mathias are completely independent efforts. Clifford, mithro, digshadow, daveshah, and I are the main contributors to github.com/Symbiflow/prjxray. Fuzzers in that repo do not need a board at all. They do analysis of bitstreams on a host system only. If you want to use the examples of manually creating a bitstream (minitests/roi_harness, minitests/partial_reconfig_flow), either a basys3 or arty will
<kc8apf> work. We used both when developing those.
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<Sourcerer> Hi!
<Sourcerer> Is anyone easily able to convert VHDL to Verilog for consumption with yosys?
<Sourcerer> I could need https://opencores.org/project/nand_controller converted, but all the ways I tried failed
<tpb> Title: NAND Controller (ONFI compliant) :: Overview :: OpenCores (at opencores.org)
<kc8apf> Sourcerer: there have been attempts. I don't know of anything successful
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