clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<ZipCPU> Hello all! I just submitted a question on reddit.com/r/FPGA regarding why synthesis might not match simulation. Feel free to respond with your own experiences.
<ZipCPU> I'm hoping to collect the responses and put a post together on the topic ... but we'll see what responses I get.
<keesj> I think there is a reality gap
<keesj> and eletrons who do not obey our laws
<ZipCPU> I thought that was gremlins ? :D
<keesj> call the Ghostbusters
<keesj> in my little (and first realish) project.... 40% of the failure had... unkown causes
<keesj> and a few remain to be discovered
<ZipCPU> keesj: That's not allowed. All causes must be determined.
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