<wolfspra1l>
then I would say that's at least 3 months out
<andres-calderon>
350 USD will be a good price.
<kristianpaul>
remenber M1 is a VJ Station
<wolfspra1l>
andres-calderon: once it has a case it will be 499 USD
<wolfspra1l>
and once it's there, we will drive it down again, 399 USD, etc.
<wolfspra1l>
but that's a lot of hard work
<wolfspra1l>
step by step
<wolfspra1l>
we are not even done testing the rc2 run yet
<wolfspra1l>
then we need to go full-power on the jtag-serial daughterboard
<wolfspra1l>
then the case
<wolfspra1l>
that's a nice development board, but I really don't compare with such boards at all
<wolfspra1l>
we are working on a product, including software, tools, case, certification, etc.
<andres-calderon>
wolfspra1l, I think some if it will do. At least compared to  development boards the price is good.
<wolfspra1l>
yes, and I will try to drive the price down
<wolfspra1l>
I always feel technology is and must be inherently democratic, power to the people
<wolfspra1l>
so I'll squeeze out every USD, without compromising the freedom aspect of course
<wolfspra1l>
even if nobody cares, remember that those avnet boards are subsidized under Xilinx marketing budget
<wolfspra1l>
when the spartan-7 comes out, they stop selling this one. these are boards to spread their technology in the marketplace. nothing wrong with that, but the direction (and life expectancy) of such a board is very different from our product.
<wolfspra1l>
but yeah, if we can even beat them on price, that's cool!
<wolfspra1l>
:-)
<wolfspra1l>
but not my #1 focus
<andres-calderon>
wolfspra1l: avnet, digilent, huhorizons board are subsidized  by xilinx, ISSI, Linear, etc..
<wolfspra1l>
are you asking me or telling me?
<wolfspra1l>
I don't care. Even if Xilinx gives you 100 USD cash for every devboard from them, so what?
<wolfspra1l>
then get a lot of them :-)
<wolfspra1l>
I work on a product.
<andres-calderon>
just telling... the avnet, digilent, huhorizons boards are full of propaganda of the manufacturers of the chips.
<wolfspra1l>
of course
<wolfspra1l>
it's a marketing tool
<wolfspra1l>
so anyway
<wolfspra1l>
I am working on a great product.
<wolfspra1l>
long way :-)
<xiangfu>
kyak: Hi. I want  start create a new openwrt image release tomorrow.
<xiangfu>
kyak: just base on the last commit of openwrt-xburst[e9fe7d7], openwrt-package[760fbb1].
<xiangfu>
I will test the image first tomorrow. :)
<xiangfu>
kyak: need sleep, see you.
<wolfspra1l>
he must have been sleepy :-)
<kristianpaul>
oh moc
<kristianpaul>
lets compile :)
<kristianpaul>
good now vim automatically help me on indentation :)
<viric>
hello back
<viric>
time to learn the halt sequence on openwrt..
<viric>
(basically, sysvinit)
<kristianpaul>
good :)
<viric>
I don't have that solved...
<viric>
'halt -fp' powers down, but 'halt' does not power down.
<wpwrak_>
kristianpaul: (sync) hmm, what form of sync did you have in mind ?
<kristianpaul>
wpwrak_: simple as posible, i was thinking a clk and data  (4bit), mcu can read when clk go high
<kristianpaul>
there is also a reset signal from mcu in order to do initialization
<wpwrak_>
kristianpaul: if you shift into a parallel bits, your SIGE SYNC becomes the CPU data clock
<wpwrak_>
kristianpaul: now, do you plan to use DMA ? or poll by software ?
<kristianpaul>
yup :)
<kristianpaul>
dma dont know how
<kristianpaul>
pull by sofware for now
<kristianpaul>
gpio > ram > dump to disk
<wpwrak_>
then you could have a "data phase" signal. toggle it whenever you update the output, i.e., on each SYNC.
<wpwrak_>
for DMA, you would need a proper DMA request signal. you'd also want to go 8 bit, to avoid wasting half your memory/bandwidth, because DMA only has 8/16/32 bit size.
<kristianpaul>
8 bits easy, just other 4 wires grounded
<kristianpaul>
or you meant provide full 8 bit data per sample?
<wpwrak_>
the latter :)
<wpwrak_>
still easy: you either make the shifter 8 bits wide and divide incoming SYNC by two, or add a multiplexer
<kristianpaul>
ah yes
<kristianpaul>
actually i need 16bits but QIQIQIQI not QQIIQQIIQQIIQQII
<kristianpaul>
well that was the data format the guy from sdr-gps ask me for
<wpwrak_>
do you have enough I/Os for a 16 bit wide interface ?
<kristianpaul>
sure
<kristianpaul>
well in SIE
<kristianpaul>
but not in Ben if i think in long term
<wpwrak_>
for the  ben, you need something radically different anwyway
<kristianpaul>
reading SD espefication i founded GPS like a posible device for SDIO
<kristianpaul>
but clasical GPS with ASIC not for doing SDR of course
<wpwrak_>
but how would the 16 bits be organized ? if the input is  sI0 mI0 sQ0 mQ0 sI1 mI1 sQ1 mQ1 sI2 mI2 sQ2 mQ2 sI3 mI3 sQ3 mQ3  what would be the 16 bit output ?
<wpwrak_>
(sdio) you could just do a bunk data transfer for SDR
<wpwrak_>
but that's something to worry about in the distant future :)
<kristianpaul>
sure sure
<wpwrak_>
by then you'll also be more confident at making interfaces with the FPGA :)
<kristianpaul>
(16 bit output) sIx and mQx in theory are not needed
<kristianpaul>
hehe confidence yes i must improve
<wpwrak_>
(throw away half the data) really ?
<kristianpaul>
well..
<kristianpaul>
i saw a sofware that does it
<kristianpaul>
for other dongle
<kristianpaul>
but from 2 bit data , just 2 posible values from 4 are posible
<wpwrak_>
hmm. not 3 ?
<kristianpaul>
well if 0 is ignore ;)
<wpwrak_>
-1, 0, +1
<kristianpaul>
i need to ask more about 0
<kristianpaul>
not sure yet
<wpwrak_>
so you would send a -1 or +1 instead of a 0, and have a "i sent an offset" bit you'd use to modify future bits ?
<kristianpaul>
anway lets take first the sample and lookg for how many 0 there
<kristianpaul>
s/lookg/look
<wpwrak_>
my guess would be between 33 and 50% ;-) depends a bit on what the mysterious sign in the case of 0 really means
<kristianpaul>
( 0 really means) i still dont understand
<kristianpaul>
or my brain just focused on -1 and +1 when reading book theory
<kristianpaul>
i shoudl read again for sure later
<viric>
I can't find what openwrt does special at shutdown
<kristianpaul>
special?
<wpwrak_>
well, you could take a reference signal and see what happens if you eliminate all the 0s.
<kristianpaul>
wpwrak_: actually i need do some FFT on signal and i should get something interesting graph
<viric>
kristianpaul: I see from inittab that it calls simply all the 'K*' rc scripts
<viric>
and one of those scripts has to run the power down, I think.
<kristianpaul>
sure is no that job of trigerhappy?
<viric>
I don't know what powers off the nanonote
<kristianpaul>
KEY_POWERÂ Â Â Â Â Â 1Â Â Â Â Â Â /sbin/poweroff
<viric>
oh
<viric>
what is that?
<kristianpaul>
                            already check this^ ?
<viric>
and what calls poweroff in the shutdown sequence?
<viric>
I know the poweroff command of sysvinit
<kristianpaul>
/sbin/ poweroff source code deserver a look
<kristianpaul>
you may get surpriced
<kristianpaul>
sysvinit you're riht
<kristianpaul>
right*
<viric>
I have /sbin/poweroff
<viric>
but I expect the system to do a proper shutdown and then power off, when I type 'halt'
<viric>
and in my system it does not happne :)
<viric>
it properly shuts down, but it does not power off.
<wpwrak_>
viric: just sync; sync; /sbin/halt -fp and be happy ? :)
<kristianpaul>
yay :)
<wpwrak_>
all the long ritualized suicide a "regular" halt performs is kinda dubious to me anyway
<kristianpaul>
wpwrak_: are you in favor of massive suiciede? no layers no advice
<wpwrak_>
it's a battery powered device. it can die "uncleanly" any moment. if you tell me your systems NEEDS an elaborate shutdown process, i can show you a system that's inherently flawed ;-)
<viric>
wpwrak_: I know that is your way :)
<viric>
wpwrak_: it's nice if openssh kills properly the active ssh conections...
<viric>
wpwrak_: if wtmp gets properly written...
<viric>
wpwrak_: if the filesystems get 'umounted' (sync; sync; is not the same as umounting :)
<wpwrak_>
viric: think of "sync" as a non-blocking "umount" that always succeeds ;-)
<wpwrak_>
i.e., precisely what you want when in a hurry to shut down :)
<viric>
it may work in the context where you know that there are no processes writing to the filesystem at that time :)
<wpwrak_>
if you have on-going write activity, things don't look too good anyway ;-) and hey, isn't that what they sold us journaling for ? ;-)
<steve|m>
heh, indeed.. I tried my luck with the wadsp today, but didn't suceed.. "Txresinit deadline missed"
<steve|m>
tomorrow I'll receive the MiniProg1, then I have something to compare.. but your m8cutils might gain interest again, since 400.000 of those devices were given away for free with magazine "ComputerBild"
<wpwrak_>
wow. the disppearance of those old interfaces may prove to be a bit of a problem, though
<wpwrak_>
steve|m: did you connect it directly to a serial port on the PC or via a USB-to-serial dongle ? the latter would explain the problem
<steve|m>
I used the OpenMoko debug board (ft2232), and omitted the 1.5k resistors, since it has already 3.3V levels.. (which might be a problem as well)
<wpwrak_>
hmm, so you used it as a USB-to-serial dongle ? or did you run m8cprog on the Neo ?
<wpwrak_>
for resistors, i think you still need the pull-down (R1)
<wpwrak_>
voltage may be okay
<steve|m>
wpwrak_: yeah, I used it as a usb serial dongle..
<wpwrak_>
ah, that wouldn't work. it's too slow.
<wpwrak_>
the PSoCs have some fairly tight timing
<steve|m>
ah, okay.. that's why you're even using RT stuff (I wondered already..)
<wpwrak_>
what you could do is make m8cprog run on the Neo and control GPIOs directly
<wpwrak_>
(that one works on Neo+debug board and Ben)
<steve|m>
wpwrak_: mh, I have no neo.. but yeah.. I did something like that a few weeks ago with the seagate dockstar (used the GPIOs as logic analyzer), so I have some code lying around
<steve|m>
sampling speed was something like 40MHz, so this should be enough :)
<wpwrak_>
yeah. you'll run circles around the little chip :)
<steve|m>
but maybe they have the flash-protection enabled.. but they say on their homepage it is upgradable via usb, so it can only be the "external" programmer lock
<wpwrak_>
if you do a full erase, you also erase the protection
<wpwrak_>
some of these chips even let you read their content if "protection" is enabled ;-)
<steve|m>
oh, that's good to know.. so just like the AVR with chip erase
<steve|m>
wpwrak_: good to know!
<kristianpaul>
wpwrak_: (assign) yes i was wrong about real world asigment wich is done following some definitions in a ucf file in wichs in/out module name correspond
<kristianpaul>
actually i dont know why i said that :/
<wpwrak_>
confusion is a phenomenon that is know to occasionally affect people ;-)
<bartbes>
would running enlightenment on the ben be possible?
<viric>
I tried 'echo mem > /sys/power/state'
<viric>
while the screen had no light (due to the inactivity timeout)
<viric>
and when back (pressing keys) the screen does not light at all
<bartbes>
hmm, can you manually activate the backlight?
<viric>
How could I do it?
<bartbes>
since I forgot how to turn it off, I don't remember how to turn it on either
<bartbes>
but give me a sec while I power on my ben