sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<GitHub50> [artiq] sbourdeauducq commented on issue #862: It works without scrambling and it is not a blocker for 4.0 release. https://github.com/m-labs/artiq/issues/862#issuecomment-349156497
<FelixVi> cr1901_modern: Did you have a chance to test boot from flash?
<cr1901_modern> FelixVi: No, sorry. Check out https://github.com/timvideos/HDMI2USB-litex-firmware/blob/master/targets/mimasv2/base.py for an example that is known to work
<FelixVi> oh wow, that is quite different from misoc
<cr1901_modern> FelixVi: Well, I was intending to make my example simpler, but no time to prepare it b/c I'm multiplexing a number of life events. Badly.
<FelixVi> cr1901_modern: I'll look around there
<FelixVi> cr1901_modern: My feeling is that litex might work while misoc is broken
<FelixVi> That would explain why you were saying it works all along - and I think litex probably works
<cr1901_modern> FelixVi: Litex isn't that different from misoc in that respect (well anymore)
<cr1901_modern> So I would _not_ go as far as to say misoc is broken while litex works
<FelixVi> cr1901_modern: Let me test that out first
<FelixVi> I'll probably get to play with it a some more tomorrow
<FelixVi> cr1901_modern: The DDR issue I had with one of the platforms was due to a faulty board btw
<cr1901_modern> The Saturn?
<cr1901_modern> And that's good :D... for some metric of good
<FelixVi> cr1901_modern: Yeah, it was a lot easier with another board - turned out one of the address pin was shot on the board I have at home
<cr1901_modern> So you should be able to make a PR for migen/misoc then for that board
<cr1901_modern> It's a good starter board for lv45
<cr1901_modern> which is a medium-size FPGA within hobbyist reach
<FelixVi> Yeah, I think so - still haven't tested things out
<mithro> FelixVi: heyo
<FelixVi> It's hard to find LX75 boards, but that's the biggest webpack does anyways
<FelixVi> mithro: hey - sorry I was ignorant ;) should have tried litex from the beginning... I know you told me so
<cr1901_modern> mithro: Why do you think misoc/litex sufficiently diverge?
<mithro> FelixVi: My eventual goal is to get less divergence between misoc/litex
<cr1901_modern> litex afaict is mostly a superset of misoc w/ different paths
<FelixVi> cr1901_modern: I don't know for sure - but if litex recently worked on S6 it appears to be different
<cr1901_modern> err pkg hierarchy*
<FelixVi> I can boot from BRAM and execute code from BRAM
<FelixVi> but just no luck with flash
<FelixVi> so I'll look if that's where litex and misoc might have differences
<cr1901_modern> mithro: Also, something I forgot to mention. Still working on TinyFPGA (and balancing life poorly). See DM
<mithro> FelixVi: we don't actually execute stuff from flash most of the time -- the BIOS copies the stuff from flash into DDR and then we execute from there
<FelixVi> mithro: Yeah, but I couldn't get a bios prompt from flash
<mithro> FelixVi: We just run the BIOS from BRAM on everything apart from the MimasV2
<FelixVi> maybe I am confused, but I think you should be able to put bios and executable code into flash and then execute from DDR
<FelixVi> mithro: Oh, that is good to know - I made a bios version that is much smaller to preserve BRAM
<FelixVi> but I figured ideally everything would live in flash
<FelixVi> So you typically put the bios into BRAM and executables into flash memory?
<cr1901_modern> FelixVi: You don't want that unless you absolutely have to
<cr1901_modern> And if you absolutely have to, you _really_ need an icache, otherwise your core is going to be unacceptably slow most likely
<cr1901_modern> (like 1/32th speed. "You'll never keep the pipeline filled" slow)
<mithro> FelixVi: What board are you working on? The AC701 should have *plenty* of resources
<FelixVi> I'm on a XC6SLX45, so it should be fine
<FelixVi> so, bios in bram and you load code into ddr is the preferred way?
<FelixVi> I'll try it that way
<FelixVi> mithro: are the timvideos repositories the stable ones and mithro is for dev?
<mithro> FelixVi: pretty muxh
<FelixVi> mithro: Cool, so I'll play with the stable ones
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<rjo1> sb0, mntng: are you using the fmc-lvds-32ch-dio for novogorny/zotino?
<rjo1> whitequark: congrats to the 5000th artiq commit.
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<rjo1> whitequark: what are the next steps on ethernet?
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<rjo> ashafir: hello
<rjo> ashafir: you should put your conda installation into /srv/scratch/ashafir
<rjo> that has plenty of space and the backup machiner doesn't get bogged down by it.
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<rjo> whitequark: ping
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<rohitksingh> sb0: ping!
<GitHub173> [artiq] jordens opened issue #863: deprecate old manual trees https://github.com/m-labs/artiq/issues/863
<GitHub0> [artiq] jordens commented on issue #863: /cc @a-shafir https://github.com/m-labs/artiq/issues/863#issuecomment-349300472
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<rohitksingh> Hi guys! Does artiq use "rust-core-or1k" from here -> https://anaconda.org/m-labs/repo?type=conda&label=main to compile rust code to or1k executable?
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<rohitksingh> Any directions with getting rust to compile for or1k target would be so much helpful. I can't seem to figure out myself how to do that.
<sb0> rohitksingh, have you tried following the instructions in the artiq manual?
<rohitksingh> sb0: Hi! Do you mean this one https://m-labs.hk/artiq/manual-master/developing.html ?
<rohitksingh> I've set up artiq
<rohitksingh> and tried with a simple build "python -m artiq.gateware.targets.kc705_dds -H nist_clock"
<rohitksingh> hmm...that last command seems to have failed
<rohitksingh> let me try to get this sorted out myself
<rjo> rohitksingh: what was the issue?
<rohitksingh> rjo: Hi! I wanted to know how to generate or1kx executable from rust code. Any pointers would be very helpful!
<rjo> rohitksingh: i am looking into it.
<rohitksingh> rjo: Thanks! :) I'm also trying to get some way with this
<rjo> rohitksingh: for now do: conda install -c m-labs/label/dev misoc
<rjo> ashafir: ^^
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<rohitksingh> rjo: Thanks! This one has fixed/bypassed the compile error in `artiq/firmware/runtime/ethmac.rs` for now...I'll proceed with current setup. Thank you! :)
<GitHub189> [artiq] jordens opened issue #864: artiq-dev -> misoc dependency resolution issue https://github.com/m-labs/artiq/issues/864
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<GitHub45> [artiq] gkasprow commented on issue #854: @sbourdeauducq @jbqubit I found!... https://github.com/m-labs/artiq/issues/854#issuecomment-349395188
<GitHub84> [artiq] gkasprow commented on issue #854: Funny thing, I wrote little piece of code that dumps PHY registers... https://github.com/m-labs/artiq/issues/854#issuecomment-349424401
<GitHub187> [artiq] gkasprow commented on issue #854: With another media converter I get reasonable data on Rx lines and observe them with chipscope https://github.com/m-labs/artiq/issues/854#issuecomment-349424593
<FelixVi> cr1901_modern: Do you have a minute?
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<cr1901_modern> FelixVi: Considering I just woke up, no. I don't have a minute right now
<cr1901_modern> My sleep schedule is _so_ off lately
<FelixVi> cr1901_modern: Sorry to hear that. I hope things get better soon
<GitHub53> [artiq] gkasprow commented on issue #854: There could be yet another issue which is dependent on particular chip. The datasheet says:... https://github.com/m-labs/artiq/issues/854#issuecomment-349448407
<cr1901_modern> FelixVi: Tyvm for the concern :). Me too lol
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