sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0> rjo, it works when using your script
<sb0> rjo, the error I mentioned is when using the supplied digilent-hs1 script + transport jtag + adapter_khz
<sb0> rjo, does the "pld init" command work? it says init must be used before it, even though i did...
<rjo> could you paste what you did somewhere?
<rjo> did you do "pld init" before "jtag newtap ..." and "pld device ..."?
<sb0> let me try pld init again...
<rjo> i can't find pld init anywhere in the docs
<rjo> your script is pretty short. looks like autodetecting irlen etc failed. no idea what would need to be done to make that work.
<sb0> it works with the following script:
<sb0> source [find interface/ftdi/digilent-hs1.cfg]
<sb0> source [find cpld/xilinx-xc7.cfg]
<sb0> source [find cpld/jtagspi.cfg]
<sb0> adapter_khz 25000
<sb0> and now with that script that works
<rjo> yes. there are a bunch of things in xilinx-xc7.cfg that do the right thing.
<sb0> I think pld init is supposed to trigger a reconfiguration of the device, i.e. reboot with the bitstream from flash
<rjo> to me, jtag never looked like something where you could do a lot of autodetection.
<rjo> xc7_program does that.
<sb0> http://paste.debian.net/349463/ < that what it prints when you use the help command after running the working init script
<sb0> ah, yes, "xc7_program xc7.tap" worked. thanks!
<sb0> there is also no reset bug anymore (i was loading the bitstream through jtag to reboot the board before, which is broken with xc3sprog...)
<sb0> good
<rjo> yep. its pretty nice. the biggest time consumption is writing the runtime to flash
<rjo> i don't think pld init does anything useful. at least from looking at the code.
<sb0> you can netboot the runtime ...
<sb0> with tftp
<rjo> yes.
<sb0> flterm loading also works, but is slow as well
<rjo> can one actually expect that the bios will not need reflashing "most of the time"?
<sb0> I guess...
<rjo> for reasonably intrusive work on the gateware where the relevant csrs and irqs don't move around...
<sb0> or the BIOS can be embedded, which is not a problem on the monster-board that has a lot of block RAM
<sb0> build with --integrated-rom-size
<rjo> good god is this network bad again. i don't see how irc can work so well when http and ssh are constantly crapping out. what do you do if the ping RTT to your DNS server down the hallway is 50 ms? you go home.
<rjo> yep. that and netboot would probably be the way to go for CI hardware testing then.
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<rjo> damn even things like level 3 are actually based here...
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<bb-m-labs> build #41 of artiq is complete: Failure [failed lit_test] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/41
<sb0> whitequark, ^
<whitequark> ah I recall that
<GitHub134> [artiq] sbourdeauducq pushed 2 new commits to master: http://git.io/v0FgE
<GitHub134> artiq/master 40e10ca Sebastien Bourdeauducq: examples/blink_forever: revert incorrectly committed changes
<GitHub134> artiq/master f431add Sebastien Bourdeauducq: runtime/analyzer: fix zero data corner case, handle cache
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<GitHub138> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/v0Fwc
<GitHub138> artiq/master 59a3ea4 Sebastien Bourdeauducq: gateware/rtio/analyzer: fix bus write
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<whitequark> hm, that was tricker than I expected
<whitequark> fixed
<GitHub135> [artiq] whitequark pushed 1 new commit to master: http://git.io/v0FS8
<GitHub135> artiq/master 3fbee27 whitequark: analyses.domination: consider unreachable blocks dominated by any other....
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<bb-m-labs> build #42 of artiq is complete: Success [build successful] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/42
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<whitequark> sb0: how do you enable logging in comm_generic?
<whitequark> logger.setLevel(logging.DEBUG) doesn't work
<sb0> logging.setLevel?
<sb0> not logger
<sb0> er, no, it's basicConfig
<sb0> or use -v -v in the tool you're using
<whitequark> it's unit test, not a tool
<whitequark> should it be possible to get a return value from an initially invoked kernel?
<sb0> yes
<sb0> cool, the analyzer core is working
<sb0> the only bug i see so far is the exception rtio_counter is borked (shifted by 20-something bits) for some reason...
<whitequark> analyzer?
<whitequark> logic?
<sb0> rtio activity dumper, yes
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<GitHub101> [artiq] whitequark pushed 2 new commits to master: http://git.io/v0bq6
<GitHub101> artiq/master f4b19fe whitequark: compiler.types: make TValue hashable.
<GitHub101> artiq/master 52102a1 whitequark: Fix handling of default values for RPC arguments (fixes #190).
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<GitHub78> [artiq] sbourdeauducq pushed 2 new commits to master: http://git.io/v0bGI
<GitHub78> artiq/master 10d4bfb Sebastien Bourdeauducq: frontend/coretool: basic analyzer dump
<GitHub78> artiq/master 0832c71 Sebastien Bourdeauducq: coredevice/comm_tcp: support retrieving analyzer data
<sb0> oh, i found the bug. it was silly.
<GitHub59> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/v0bZI
<GitHub59> artiq/master 64ad388 Sebastien Bourdeauducq: gateware/rtio/analyzer: fix exception message layout
<sb0> whitequark, so you could use artiq_coretool.py analyzer-dump to see what your kernels are doing now =]
<sb0> the python part is just a quick hack right now, will have to think about how to format a nice VCD
<whitequark> cool
<whitequark> i'll try it once i get there
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<sb0> the device records all the time to a SDRAM ringbuffer, and analyzer-dump reads out that buffer and clears it
<sb0> rjo, how large should the buffer be?
<sb0> whitequark, are you using the fact that artiq.gateware doesn't depend on anything else in artiq?
<sb0> I need to put the shared constants for the analyzer somewhere
<sb0> options are duplicate them (there aren't too many), put them in artiq.gateware, or put them in artiq.coredevice
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<whitequark> .gateware, sure
<GitHub38> [artiq] whitequark pushed 1 new commit to master: http://git.io/v0Nvm
<GitHub38> artiq/master 2759310 whitequark: transforms.iodelay_estimator: reject control flow in 'with parallel:' (fixes #195).
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<GitHub193> [artiq] whitequark pushed 1 new commit to master: http://git.io/v0NUF
<GitHub193> artiq/master 0755aa3 whitequark: transforms.iodelay_estimator: allow goto in zero-iodelay while statements.
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<GitHub92> [misoc] whitequark pushed 1 new commit to master: http://git.io/v0AGE
<GitHub92> misoc/master a625469 whitequark: libcompiler_rt: include __powidf2.
<GitHub89> [artiq] whitequark pushed 4 new commits to master: http://git.io/v0AGF
<GitHub89> artiq/master 7b3ace2 whitequark: transforms.inferencer: fix unsupported decorator diagnostic when embedding....
<GitHub89> artiq/master baa986a whitequark: compiler.prelude: add @portable as an alias for @kernel.
<GitHub89> artiq/master 0395efd whitequark: compiler: give environment types in LLVM IR readable names.
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<bb-m-labs> build #45 of artiq is complete: Exception [exception anaconda_upload] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/45
<bb-m-labs> build #46 of artiq is complete: Exception [exception anaconda_upload] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/46
<whitequark> what the fuck is the problem with it again?
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<whitequark> oh, that's actually my fault.
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<bb-m-labs> build #47 of artiq is complete: Failure [failed lit_test] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/47
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<rjo> sb0: one entry at 256 bit? 100k entries would likely be fine and fit pipistrello.
<bb-m-labs> build #15 of artiq-pipistrello-nist_qc1 is complete: Failure [failed] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-pipistrello-nist_qc1/builds/15
<bb-m-labs> build #18 of artiq-kc705-nist_qc2 is complete: Failure [failed] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc2/builds/18
<bb-m-labs> build #19 of artiq-kc705-nist_qc1 is complete: Failure [failed] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc1/builds/19
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<rjo> sb0: but if at all possible this should be a ringbuffer that always spans the last 100k event and is also not cleared between experiments. it would basically be always full. whether or not reading it out actually clears it does not matter much to me.
<rjo> and if reading the 100k events takes 10 s thats fine as well.
<bb-m-labs> build #19 of artiq-kc705-nist_qc2 is complete: Success [build successful] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq-kc705-nist_qc2/builds/19
<rjo> anybody: how would a "correct" spi slave do its deglitching/synchronization?
<rjo> actually clocking it with the spi clk and then CDCing the data seems problematic for several reasons.
<rjo> a few MultiRegs (under the assumption that spi_clk < sys_clk/2) seems correct and easy.
<rjo> ah. no. MultiRegs and and some kind of majority vote.
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<GitHub60> [conda-recipes] whitequark pushed 1 new commit to master: https://github.com/m-labs/conda-recipes/commit/c4dc32f6e8df6204fc7429de8ae8bc25427a4812
<GitHub60> conda-recipes/master c4dc32f whitequark: llvmlite-artiq: bump.
<GitHub137> [conda-recipes] whitequark merged master into travis-64: https://github.com/m-labs/conda-recipes/compare/dfd0e4c14c87...c4dc32f6e8df
<GitHub131> [conda-recipes] whitequark merged master into travis-32: https://github.com/m-labs/conda-recipes/compare/dfd0e4c14c87...c4dc32f6e8df
<GitHub150> [artiq] whitequark pushed 1 new commit to master: http://git.io/v0pE0
<GitHub150> artiq/master 4fb1de3 whitequark: Initial invocation of a @kernel function can now return a value (fixes #197).
<bb-m-labs> build #48 of artiq is complete: Failure [failed lit_test] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/48
<GitHub33> [artiq] whitequark pushed 2 new commits to master: http://git.io/v0pQr
<GitHub33> artiq/master 4fcd6ab whitequark: Commit missing parts of 0395efd4.
<GitHub33> artiq/master afee03b whitequark: Commit missing parts of 4fb1de33.
<bb-m-labs> build #49 of artiq is complete: Success [build successful] Build details are at http://m-labs-buildserver.lan/buildbot/builders/artiq/builds/49
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