<lkcl>
prices and availability are fluctuating wildly.
<lkcl>
only if you have a contract direct with a manufacturer (for which you'll need a MOQ of for example > 10k possibly even higher) can you get guaranteed pricing and guaranteed availability.
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<wens>
focus_: SATA performance is a known issue, but there isn't any documentation for this
<wens>
focus_: so unless Allwinner comes in to fix it, this is what we have
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<macifom>
hi, Shedbuilt GNU/Linux dev here, currently testing out upstream kernel 4.17-rc1 on Orange Pi One
<macifom>
HDMI, KMS/DRM is working great but my EMAC has disappeared
<macifom>
anyone else having ethernet issues with 4.17-rc1 on H3 devices?
<macifom>
the EMAC works fine in 4.16.1 with the same config
<macifom>
nothing about EMAC / DWMAC in dmesg
<wens>
there's an issue with the patch that enabled HDMI, which inadvertenly disabled EMAC
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<macifom>
wens: thanks, I looked at the diff enabling HDMI in the dts and completely missed that
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<sunshavi>
macifom: no problems for me with opi + 2e, everything is working fine
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<wens>
it's only that one board
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<sunshavi>
wens: ok. thanks
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<f15h>
Hi - I am looking for the WIP Patches mentioned on the "Linux Mainlining Effort" Wikipage - especially the patches for the CSI drivers - can somebody help me to locate this files?
<wens>
f15h: isn't there a link after the entry?
<f15h>
hmm, i am not familiar with the kernel development - there is a link after the entry pointing to a descriptive email about the patch - but then I am stuck
<f15h>
thanks - patchwork.kernel.org gets me closer
<KotCzarny>
or that. yeah definitely that
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<hlauer>
wens: Hi, just discovered that on a20 PLL2 tuning made i2s stop working somewhere after 4.5.21. tried to disable the feature in pll_audio_base_clk
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<hlauer>
but that hangs audio playing over i2s when switching frequencies. Any ideas ?
<hlauer>
s/4.5.21/4.9.21/
<wens>
but it worked with a previous kernel?
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<hlauer>
yes, definitely up to 4.9.21. Then the sunx-i2s code changed, so the out of kernel tas5713 driver did not work any more.
<hlauer>
I have verified already that in this kernel PLL2_TUN ist the default - 0.
<wens>
during 4.9.21 ~ latest 4.9.x stable, nothing related to a20 that is sound or clk related changed
<wens>
you probably need to do a bisect yourself
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<paulliu>
wens: hi. I'm currently trying to moving psci code from u-boot to optee. But still failed to load linux kernel. Any suggestions? I've tried to turn on the earlyprintk and debug_ll. However, I just got "Uncompressing Linux... done, booting the kernel."
<wens>
hlauer: not to mention that pll2 tuning isn't even backported to 4.9
<paulliu>
wens: Currently I'm letting the seconadry cores in wfe(). And booting Primary CPU to normal world to load Linux.
<paulliu>
wens: Those secondary cores runs the code ported from U-boot already. And TZPC seems to be in good value.
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<wens>
did you correctly set the parameters for earlycon=????
<wens>
just having "earlycon" in the cmdline probably won't work
<paulliu>
wens: earlycon=uart,mmio32,0x01c28000
<wens>
hmm
<paulliu>
wens: I'm not sure if this one works. Someone said on google seems work. So I just use it.
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<paulliu>
wens: The decompressor sends out the message. So I think at least the decompressor works.
<wens>
that should work
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<wens>
well if it gets passed the decompressor but not the actual boot, then it's probably something to do with caches or the MMU
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<wens>
that's beyond my knowledge level
<paulliu>
wens: ok. Let me invest a bit. I'll try to jump to the kernel earlier inside the optee to see when it fails the kernel. Maybe.
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<focus>
lckl: thanks for that note
<focus>
DRAM is an issue because 2D manufacturing is running out of steam according to Moore's law
<focus>
There is 3D stacked NAND flash - but its not efficient - and doesn't work with DRAM
<focus>
I just work with high priced DRAM because my immediate needs are small quantities
<focus>
if I go kickstarter or crowd supply I hope to get more than 10K orders and so secure supplies that way
<focus>
Hynix is still producing the DRAMs from their web site H5TQ4G83AFR
<wens>
I would imagine some fabs moving to DDR4 would have an impact on DDR3 availability
<focus>
is DD4 backward compatible with DDR3 ?
<focus>
(i imagine not - but ask anyway!)
<focus>
wens: thanks for that note
<focus>
(earlier about sata)
<miasma>
focus: well, if you haven't switched to ddr4 yet, the manufacturing isn't running out of steam yet for you..
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<focus>
miasma: I wasn't sure if R40 will support DDR4. It looks like a design and learn process to switch that eats into time. Quick way out for now is to pay the higher price to get something going and then document the trials to switch to DDR4
<wens>
IIRC only the H6 does
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<focus>
Wens: hmmm... yes it supports DD4 - but I need sata for server based design of board
<focus>
H6 has PCIe - wonder if that supports a way of implementing SATA
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<hlauer>
wens: yes. For testing, hardcoding the PLL2_CFG in ccu_nm_set_rate to the 4.9.21 values is easiest ? Thanks a lot so far.
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<focus>
Hmm... just reading up DD4 - still around 30MHz max speed if DRAM is paging
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<blu-boards>
good morning everyone!
<blu-boards>
I wanted to see if I could clear up a couple of items. I have been in this chat before to get information as I am bringing several PCB's to market using Allwinner SoC's.
<blu-boards>
Additionally I did not see any other SoC in the list that has PCIe, but the list is not exhaustive. Is there another one that contains PCIe?
<pmpp>
if the date of addition is fresh , i bet info is accurate that's wiki are for
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<blu-boards>
the page says it was updated as of 4/12/2018 but I don't know what contents were updated
<blu-boards>
not sure when that note was posted either or if a work around has been found
<blu-boards>
that's why I'm here :)
<blu-boards>
also the last time I was in here some of the updated info had not made it into the wiki yet
<ElBarto>
blu-boards: H6 is the only Allwinner SoC with PCIe yes
<blu-boards>
thanks Elbarto
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<blu-boards>
any idea if a work around has been made to get it working?
<ElBarto>
blu-boards: I haven't quickly followed but PCIe in mainline linux will not be added as a lot of hacks are needed (or something like that)
<pmpp>
28/04/2018 Update H6 specifics
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<blu-boards>
@elbarto ok. the wiki states: Allwinner H6 has a quirky PCIe controller that doesn't map the PCIe address space properly to CPU, and accessing the PCIe config space, IO space or memory space will need to be wrapped. As Linux doesn't wrap PCIe memory space access, it's not possible to do a proper PCIe controller driver for H6. The BSP kernel modifies the driver to wrap the access, so it's
<blu-boards>
also not generic, and only devices with modified driver will work.
<blu-boards>
does that mean that specific drivers for devices would have to be modified to work and not the drivers for linux itself?
<blu-boards>
@pmpp thats the date when the H6 were last updated in the wiki?
<pmpp>
yep
<blu-boards>
ok thanks
<ElBarto>
I haven't looked at all at PCIe (even H6) so I don't know about the issue
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<blu-boards>
the last time I was asking about the H3 and H5, not the H6. I am hestitant to do anything with that CPU because the Allwinner site says that it is new and it doesn't look like much works with it yet (software wise).
<blu-boards>
And if PCIe will not work, then I will probably skip that SoC
<blu-boards>
the other SoC I was interested in is the R40
<blu-boards>
it looks to be in a similar situation as the H6 - not much software support
<blu-boards>
is there another processor like the R40 that does have better support? I know Allwinner likes to rename processors for some reason...
<blu-boards>
@elbarto ok thanks
<ElBarto>
R40 is an updated A20 iirc
<blu-boards>
would anyone in sunxi know more info about the H6 and PCIe?
<blu-boards>
yeah I believe that is what I learned the last time
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<blu-boards>
checking the A20...
<blu-boards>
hmmm the A20 is only a dual core and does not have SATA
<blu-boards>
@aneox hmmm you're right, the wiki does list it. Is it the same one as the R40?
<blu-boards>
2.6 SATA I believe is on the R40
<blu-boards>
so it looks like icenowy is most knowledgable about PCIe...
<blu-boards>
per icenowy "I have thought to use EL2 to workaround H6 PCIe"
<blu-boards>
what's EL2?
<blu-boards>
also per icenowy "I have thought a way to hack it -- use EL2 MMU to wrap the PCIe part; however implementing such a hack is beyond my knowledge level"
<Ixnus>
wait, blu-boards: what you need PCIe for ?
<blu-boards>
@beeble thanks checking the link...
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<blu-boards>
@ixnus mostly for SATA implementations. I have seen where people have stated to use USB3 for SATA, but I am using that for something else.
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<blu-boards>
@ixnus do you have any knowledge about the H6 PCIe?
<blu-boards>
I also wanted to make more NIC's using PCIe in one design...
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<beeble>
you may want to use other socs
<jernej>
f11f12: R40 HDMI PHY is the same as in A64, H3, H5 and probably others
<jernej>
f11f12: I'll add support for it after I merge H6 driver, since it has some commonalities
<jernej>
I mean display pipeline has some commonalities, like TCON TOP