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<wens>
icenowy[m]: no. the point is to not use syscon...
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<icenowy[m]>
wens: then how to keep the dt compatibility
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<wens>
icenowy[m]: aren't you going to add a sram-controller compatible anyway?
<wens>
that one will bind to a driver, and said driver will be backed by an actual device, which will export a regmap
<wens>
you still have the syscon phandle, so you can parse the syscon phandle and get the device, and request a regmap from it
<wens>
just like with the r40
<wens>
syscon is a completely different API that handles regmaps on its own, registering them in a list. any requests using syscon look through that list
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<icenowy[m]>
wens: so in the code we try twice as different phandle class?
<icenowy[m]>
The problem is that A64 DTs with syscon phandle is already in released kernel
<wens>
yeah, try of_parse_phandle + of_find_device_by_node + dev_get_regmap first, and if it doesn't work, fall back to syscon_regmap_lookup_by_phandle
<icenowy[m]>
and maybe set different regmap field with different query?
<icenowy[m]>
(I remember mripard sais that use regmap name to hide the internal offset
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<wens>
I said that, but yeah
<wens>
can you send me your a64 device tree patch?
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<wens>
I can integrated the needed changes into my r40 dwmac series
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<florolf>
is there a reason for the CONFIG_MMC_SUNXI_SLOT/CONFIG_MMC_SUNXI_EXTRA_SLOT-split with the former being hardcoded to 0?
<florolf>
the R16 board i'm looking at has its main uart routed through the mmc0 pins and uses mmc2 for its storage. however, because uboot will always initialize mmc0, this messes up the gpio config for the uart
<florolf>
i mean.. am i using this incorrectly or has the need for such a setup never arisen before?
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