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<enriq>
why the choice was verilog as source instead of the far superior vhdl :)
* enriq
is a passionate newbie
<qu1j0t3>
try both
<qu1j0t3>
decide
<coino>
enriq, superior in what
<enriq>
I tried verilog, then chisel (I'm a scala programmer) and with VHDL I finally found what I was expecting
<enriq>
i.e. a specification of a digital circuit and not a "program" that translates into hardware in some magic way
<enriq>
but I'm newbie and not part of the religious war :)
<enriq>
it might well be the case that I understood the thing at the same time I arrived to vhdl, and that if I had made the inverse path... who knows
<X-Scale>
"a specification of a digital circuit and not a "program" that translates into hardware in some magic way" <-- in reality both approaches have shown to be useful for different scenarios
<coino>
I would think the program would be more high ;evel
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<rqou>
enriq: have you _actually_ read the vhdl spec?
<rqou>
it's not as good as you think, and it's extremely complex
<rqou>
but also, despite being complex, every feature is slightly gimped
<rqou>
there are a lot of parts of the spec that i would describe as "hmm, what should we do here? we don't know, so pick a dumb default"
<rqou>
imho one of the biggest complexities/missing features is the fact that vhdl has type-level integers but doesn't have any type inference at all
<rqou>
so now you need an expression evaluator in the type system, but it's still unnecessarily verbose when you need to describe something
<rqou>
also, depending on the interpretation of the spec, expression evaluation might need to be infinite-precision
<rqou>
(poke oeuf)
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<oeuf>
rqou: yup very much indeed
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<rqou>
but the ada wording is not the same as the vhdl wording
<oeuf>
rqou: but universal_real makes a lot of sense tbh
<oeuf>
(it's the same in Ada, you need arbitrary-precision arithmetic at compile time)
<rqou>
i'm not positive, but i believe that is is possible to maliciously interpret the spec such that this isn't needed
<oeuf>
that seems evil :-p
<rqou>
sure, but arbitrary-precision floats is hard :P
<oeuf>
yes, but so is the grammar; also we were discussing just that in #kspacademia (espernet), you could go there for numerics questions I guess :-p
<oeuf>
(we were literally talking about arbitrary-precision arithmetic in Ada :-p)
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<rqou>
i'd like to see Rust hijacked into an HDL
<rqou>
not sure how i would go about doing that though
<rqou>
and before that, we need to really fix mixed-language simulation
<rqou>
azonenberg pointed out to me that VPI isn't designed for mixed-language simulation, we just hijacked it that way
<sn00n>
piu piu piu
<enriq>
no rqou of course I did not read the spec :)
<enriq>
so far in my short experience I'm succeding at specifying my adc controller in vhdl, it can be simulated, and it is better than a paper with gates and flip flops. My next step is to punk burn cpld :)
<enriq>
as soon as you tell me how to burn the 64
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<rqou>
in class today we had a very explicit discussion about "the cost of doing business"
<rqou>
I guess"business types" deserve their reputation
<balrog>
rqou: hm...?
<rqou>
aka bribes
<balrog>
oh lol
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<rqou>
on the FCPA: "It's rarely enforced. Every five years or so some company gets a fine just to remind people that this law still exists. After all, enforcing it makes American businesses much less competitive globally."
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<digshadow>
pointfree: is psoc stuff in any state to do a mtvre talk next month
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<balrog>
digshadow: pointfree has the routing matrix mapped out. needs a bunch of testing done though
<balrog>
psoc is weird though, since it's configured by bitbanging memory mapped registers
<balrog>
from the ARM
<balrog>
digshadow: btw dmitry did some rather neat PSoC work
<balrog>
ahh I see you already know
<balrog>
:p
<digshadow>
balrog: yeah he gave a talk on it at previous mtvre
<digshadow>
was an excellent talk
<balrog>
oh nice
<balrog>
wish I could join, but... wrong coast :P
<balrog>
kinda funny, our infosec meetups are the same day of the month :p
<digshadow>
second wed?
<balrog>
yep
<digshadow>
we should video chat
<balrog>
we barely have enough people for a general infosec meetup though
<balrog>
much less an RE one
<digshadow>
we are actually running out of space at our current venue
<balrog>
wow
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