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<openfpga-github> [yosys] azonenberg pushed 11 new commits to master: https://git.io/v5fXE
<openfpga-github> yosys/master 92e4b5a Clifford Wolf: Add writeback mode to "sim" command
<openfpga-github> yosys/master 7b4f3f8 Clifford Wolf: Improve "sim" command
<openfpga-github> yosys/master 75046aa Clifford Wolf: Add "sim" command skeleton
<openfpga-github> [yosys] azonenberg deleted gpak-counters at e6eaf48: https://git.io/v5fXy
<rqou> what
<rqou> azonenberg are you back already?
<azonenberg> rqou: home for a day resupplying
<azonenberg> back out at 0700 tomorrow
<azonenberg> i see clifford merged my PR with the counter fixes, but not the extraction stuff
<rqou> yeah
<azonenberg> i still have to make PRs for the TFF etc extraction
<rqou> anyways, didn't want to have to pack a week and a half worth of rations? :P
<azonenberg> but i don't want to overload him too much
<azonenberg> oh, i could do it no problem - but my parents and brothers don't want to eat MREs and freeze dried stuff
<azonenberg> They want fresh stuff
<rqou> oh yeah, we still need to bikeshed about whether TFFs should be added to the yosys core
<azonenberg> we have a massive cooler that fills the back of a minivan
<rqou> (bikeshed with clifford)
<azonenberg> a huge amount of dry food, etc
<azonenberg> and i think short term, have TFFs be like shregs
<rqou> well, we already have that
<azonenberg> magic cells that can be extracted but only are used as intermediates before techmapping or further high level synth passes
<rqou> you can run recover_tff in a synthesis pass too :P
<azonenberg> Yes, keep it like that for the short term when he merges our initial PR
<rqou> before running abc -sop
<azonenberg> Yes, i intend to do that in the coolrunner synthesis flow
<azonenberg> Since it seems like an efficient way to do counters
<rqou> oooh offtopic but another thing i just remembered
<rqou> yosys can't infer coolrunner-ii latches
<azonenberg> why?
<rqou> er, can't infer latches with set and reset
<azonenberg> other than bad handling of latches in general
<azonenberg> :p
<rqou> because the priority is different
<azonenberg> ah yeah
<azonenberg> well simultaneous s/r is rare enough that we can just rwquire primitive instantiation for that
<azonenberg> require*
<rqou> i mean, the naive way "works" but is less efficient
<openfpga-github> [openfpga] rqou opened issue #110: TODO: What should we do about inferring Coolrunner-II latches? https://git.io/v5f18
<rqou> also offtopic: the gsoc person sent clifford a monster PR for icestorm and clifford wasn't too happy :P
<azonenberg> lol
<rqou> i also wasn't happy because he managed to use err.h again
<rqou> at least he's fixing error handling which is nice
<openfpga-github> [openfpga] azonenberg opened issue #111: Add sim model for GP_SPI https://git.io/v5f1K
<openfpga-github> [openfpga] azonenberg opened issue #112: Add sim support for GP_EDGEDET in cells_sim_ams https://git.io/v5f1P
<openfpga-github> [openfpga] azonenberg opened issue #113: Add sim support for GP_*OSC output dividers https://git.io/v5f11
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<pie_> lol what is even version control
<pie_> i mean i kinda just assumed monster pr meant really big commit
<rqou> nah, it's just github's specific workflow
<plaes> well, one can cherry-pick specific patches, do interactive rebasing etc.. with git
<rqou> right, and i do that
<rqou> but that tends to interact poorly with the github web ui
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<azonenberg> yeah i do that all command line
<azonenberg> in fact that's basically what i'm doing to generate all of these PRs i'm sending clifford
<azonenberg> make a feature branch ex post facto, then cherry-pick commits into it
<azonenberg> then send a PR for that branch
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<openfpga-github> [openfpga] rqou opened issue #114: TFF extraction https://git.io/v5Jdm
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