<rqou> hmm azonenberg apparently the 512 has much wider muxes in the ZIA
<rqou> hmm, maybe not "much" wider
<rqou> but the bits are arranged differently
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<openfpga-github> [openfpga] rqou pushed 6 new commits to master: https://git.io/vHys6
<openfpga-github> openfpga/master 7fbd6bb Robert Ou: xc2bit: Implement enough of 512-MC to write ZIA+PLA to jed
<openfpga-github> openfpga/master 565faca Robert Ou: xc2bit: Add 512-MC ZIA mux encoding
<openfpga-github> openfpga/master 3eb4d3c Robert Ou: xc2bit: Add deliberately-incorrect ZIA data for 512-MC
<rqou> woot, all the things are finished!
<rqou> now just a mountain of testing needed
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<azonenberg> rqou: I have images up to the 256
<azonenberg> i bought "384" on ebay that turned out to be counterfeit
<azonenberg> decapped it anyway, sent photos to the seller, got a full refund lol
<azonenberg> it was some TI part, never IDed it
<azonenberg> the 384 and 512 were pricey enough i never actually got them decapped
<azonenberg> i figure nobody in their right mind would use them
<azonenberg> even the 256 is on the upper end of what makes sense to use
<rqou> yeah, well technically the 284/512 still exist, so...
<rqou> anyways, i now need to work on writing a giant pile of tests for xc2bit, since I technically implemented "everything"
<rqou> haven't started on the proposed "crbit" file format in physical fuse ordering yet
<rqou> the biggest unknowns is whether all of the device families have the same encoding for the macrocell bits
<azonenberg> oooh physical bitstream file
<azonenberg> we need this
<azonenberg> that woudl be so much more convenient than the jed files + converter
<azonenberg> Also, when you convert
<azonenberg> i highly recommend using a structural converter
<azonenberg> dont hard code a table like they do
<azonenberg> algorithmically generate the permutation based on the physical die structure
<azonenberg> then hard code the global config bits since there seems to be no rhyme or reason to those
<azonenberg> it'll be more readable, smaller, and probably execute faster
<azonenberg> at least, for the 32a my algorithmic permutation generator runs faster than reading the file from disk and parsing it lol
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<rqou> azonenberg: you really need to deprocess some 256/384/512 parts
<rqou> hmm another observation
<rqou> look at the reddish artifacts in the middle of the PLAs in the siliconpr0n images for the 32/64/128
<rqou> the 32 and 64 have these artifacts in the same overall shape ("kinda like two triangles")
<rqou> but the 128 looks completely different
<rqou> anyways, sleep time for me
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<azonenberg> the 128+ are 5 metal layers
<azonenberg> smaller are 4
<azonenberg> they add one more layer for horizontal links between the multiple zia columns
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<rqou> azonenberg: after drawing a whole bunch of diagrams, I think every .map file is mirrored horizontally
<rqou> this also fits when you look at where physically the TDI/TDO pins are
<rqou> nothing is flipped vertically though afaik
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<rqou> instead the pin numbering just gets weird
<rqou> for the larger parts, the "wrapping around" of the jtag register seems to be in an S shape, not a U shape
<rqou> er, actually hmm maybe i'm confusing myself now
<rqou> the 32a and 64a macrocell bits are in different orders
<qu1j0t3> fwiw Mouser has seven Gen 4 GreenPak kits in stock. I assume there won't be any more lol http://ca.mouser.com/ProductDetail/Silego-Technology/SLG4DVK4
<egg|nomz|egg> rqou: catstream is on fyi
<egg|nomz|egg> wait why am I still nomz on this network
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<rqou> i'm already watching catstream
<rqou> i just went to get lunch really quickly
<jn__> is that scanlime's livestream?
<egg|egg> yes
<egg|egg> I mostly watch it for the cat (/me cannot really much into eleggtronics), therefore I call it a catstream :-p
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<azonenberg> egg|egg: lol
<rqou> azonenberg: i think i understand how .map files and the physical die are related
<rqou> but it's tricky to explain right now over irc
<azonenberg> oh?
<rqou> (i'd be much easier to explain in meatspace actually)
<azonenberg> With coolrunner2 i think its just the jtag register runs from TDI left to TDO right
<azonenberg> and then bits go up
<azonenberg> Which matches the physical die structure
<rqou> not for the larger parts 128 and above
<azonenberg> Sorry i meant
<azonenberg> with the 32a
<rqou> oh yeah
* qu1j0t3 asks if anyone can link to catstream
* qu1j0t3 thanks
<rqou> one thing i'm impressed by is just how patient scanlime is even when doing "quick hacks"
<pie_> what is scanlime
<rqou> basically someone who does interesting hacks
<egg|egg> and has a cat
<jn__> and damn, i shouldn't watch that stream in 144p
<egg|egg> on the former, I wonder what will change between the prototype cat and the production cat :-p
<pie_> oh
<pie_> vool
<pie_> cool
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<qu1j0t3> I must say the cat is a very very nice feature
<qu1j0t3> i'd say ship the beta, cat-wise
<pie_> heck, just ship beta and release a "bugfix" update
<azonenberg> bug fix on the cat?
<azonenberg> $ vet /bin/cat
<azonenberg> 3 tick(s) removed