scrts has quit [Ping timeout: 258 seconds]
scrts has joined ##openfpga
eduardo_ has joined ##openfpga
eduardo__ has quit [Ping timeout: 260 seconds]
digshadow has quit [Quit: Leaving.]
digshadow has joined ##openfpga
<whitequark> manderbrot: yeah I did download an older xcode
<whitequark> but I have 8mbps down and it's a 5GB download
<whitequark> and my VM crashed halfway the first time I did it
promach has joined ##openfpga
m_w has joined ##openfpga
_whitelogger has joined ##openfpga
m_w has quit [Ping timeout: 260 seconds]
m_w has joined ##openfpga
DocScrutinizer05 has quit [Disconnected by services]
DocScrutinizer05 has joined ##openfpga
m_w has quit [Ping timeout: 256 seconds]
m_w has joined ##openfpga
<rqou> hrm, I seem to have improved our internet flakiness by removing the CATV coupler
<rqou> but the channel that had lower power to start with still does
m_w has quit [Ping timeout: 256 seconds]
m_w has joined ##openfpga
m_w has quit [Quit: leaving]
_whitelogger has joined ##openfpga
Hootch has joined ##openfpga
scrts has quit [Ping timeout: 264 seconds]
scrts has joined ##openfpga
fpgacraft2 has quit [Quit: ZNC 1.7.x-git-709-1bb0199 - http://znc.in]
fpgacraft2 has joined ##openfpga
<rqou> azonenberg: do you have an arris/motorola cable modem? what signal levels do you get?
<azonenberg> rqou: back
<azonenberg> i have a cisco
<azonenberg> dont remember the levels, you'd have to ping me tomorrow as i'm about to go to bed
<azonenberg> they were absolutely absysmal with the uncrimped connector
<azonenberg> probably AC coupling through the parasitic cap between the floating endpoints :p
<rqou> yeah somehow i'm now the one to have problems :P
<rqou> i'm getting around -7 to -6 dbmV after i decided to just remove the CATV splitter
<rqou> around -11 dbmV with the splitter
<rqou> somehow the 615MHz channel is way worse than any of the other channels
scrts has quit [Ping timeout: 268 seconds]
scrts has joined ##openfpga
massi has joined ##openfpga
scrts has quit [Ping timeout: 240 seconds]
scrts has joined ##openfpga
scrts has quit [Ping timeout: 260 seconds]
digshadow has quit [Quit: Leaving.]
digshadow has joined ##openfpga
Bike has quit [Quit: leaving]
scrts has joined ##openfpga
qu1j0t3 has quit [Ping timeout: 240 seconds]
scrts has quit [Ping timeout: 246 seconds]
scrts has joined ##openfpga
qu1j0t3 has joined ##openfpga
scrts has quit [Ping timeout: 260 seconds]
scrts has joined ##openfpga
kuldeep has quit [Read error: Connection reset by peer]
kuldeep has joined ##openfpga
scrts has quit [Ping timeout: 256 seconds]
scrts has joined ##openfpga
scrts has quit [Ping timeout: 240 seconds]
scrts has joined ##openfpga
martling has quit [Ping timeout: 245 seconds]
scrts has quit [Ping timeout: 260 seconds]
martling has joined ##openfpga
kuldeep has quit [Remote host closed the connection]
kuldeep has joined ##openfpga
pie_ has joined ##openfpga
pie_ has quit [Changing host]
pie_ has joined ##openfpga
kuldeep has quit [Read error: Connection reset by peer]
kuldeep has joined ##openfpga
promach has quit [Ping timeout: 258 seconds]
kuldeep has quit [Read error: Connection reset by peer]
kuldeep has joined ##openfpga
promach has joined ##openfpga
Hootch has quit [Quit: Leaving]
<whitequark> azonenberg: might want to be careful... if you ever get sent on a gig in paris and get booked in novotel again https://twitter.com/eolyn/status/838308737278492674
<nats`> it's not in paris :p
<nats`> it's in poitier :p
<nats`> but fun one
fengling has quit [Ping timeout: 252 seconds]
<whitequark> щр
<whitequark> *oh
<whitequark> yeah thats a bit off
fengling has joined ##openfpga
Hootch has joined ##openfpga
kuldeep has quit [Remote host closed the connection]
digshadow has quit [Quit: Leaving.]
kuldeep has joined ##openfpga
kuldeep_ has joined ##openfpga
kuldeep_ has quit [Remote host closed the connection]
kuldeep has quit [Ping timeout: 240 seconds]
Bike has joined ##openfpga
<azonenberg> whitequark: lolol
digshadow has joined ##openfpga
scrts has joined ##openfpga
massi has quit [Remote host closed the connection]
digshadow has quit [Quit: Leaving.]
digshadow has joined ##openfpga
digshadow has quit [Client Quit]
<azonenberg> cyrozap: did you see the psoc4 supervisor rom got dumped?
<azonenberg> pointfree: ^
<balrog> azonenberg: where?
cyrozap-web has joined ##openfpga
pie_ has quit [Ping timeout: 268 seconds]
pie_ has joined ##openfpga
<cyrozap-web> azonenberg: Yeah, I saw that. I tried replicating his results, but realized that it was going to turn into "one of those projects" that ends up occupying my whole weekend, preventing me from getting anything useful done. :P
<azonenberg> lol
<azonenberg> also interesting that the flash controller is basically all software defined
<azonenberg> and has per-chip factory calibration data
<azonenberg> i wonder if the SONOS flash they're using is more complex to use than normal flash?
<cyrozap-web> I mean, I kind of assumed that already considering the TRM says you need to call SROM code to do flashing.
<azonenberg> cyrozap-web: yeah but i mean, a hardware flash controller isnt that complicated
<azonenberg> right?
<cyrozap-web> Do you mean, "isn't that complicated for azonenberg" or "isn't that complicated in general"?
<azonenberg> also oooh he broke the code protection?
<azonenberg> that is something i may want to try reproducing for $work
<cyrozap-web> Because dealing with raw flash is a total pain
<cyrozap-web> Yeah, he can manipulate SFLASH, so code protection is trivially removable.
<cyrozap-web> You don't even need to recalculate the checksum.
<azonenberg> Can this be done on a locked chip without you having jtag access though?
<azonenberg> i.e. can you unprotect a locked chip running somebody else's code?
<cyrozap-web> Yes, if I understand your question correctly.
<azonenberg> Innnteresting
<azonenberg> i may have to try this on a psoc i have sitting around
<azonenberg> then save this in my library of non-invasive device unprotection sploits
<cyrozap-web> Well, I mean you need to get code to execute on the device somehow, so it either needs to already exist in flash or you need to have SWD access (no JTAG on the PSoC 4).
<cyrozap-web> Also, I haven't actually tried this--I've only seen the code in the zip file he has posted.
<azonenberg> Thats what i meant
<azonenberg> if swd is locked
<azonenberg> it doesnt provide a way in
<cyrozap-web> Also, a lot of stuff seems to be missing from the code available.
<cyrozap-web> You may be able to re-enable SWD by putting the device into Test Mode (this happens in the "PSoC acquire" sequence in the KitProg programmer), so I'm not sure how permanent the "disable SWD access" setting is.
<balrog> akacastor may also be interesting in that
<balrog> interested*
<cyrozap-web> Also, fun fact, Cypress makes a specialized PSoC 4 capacitive touchscreen controller.
<cyrozap-web> It's used on one of the recent touchscreen Kindle devices (can't remember which one at the moment, saw it in a teardown on iFixit).
<pointfree> In the PSoC Architecture TRM, Cypress says breaking the flash protection would be ..."dishonest"
<pointfree> lol
<balrog> pointfree: LOL
<azonenberg> pointfree: microchip says the same
pie_ has quit [Ping timeout: 240 seconds]
<cr1901_modern> TRMs should always be followed to the letter, because they are never wrong and carefully crafted
kuldeep has joined ##openfpga
mtp_ has joined ##openfpga
mtp has quit [Ping timeout: 258 seconds]
mtp_ is now known as mtp
mtp has quit [Changing host]
mtp has joined ##openfpga
pie_ has joined ##openfpga
Hootch has quit [Quit: Leaving]
<nats`> plop
<nats`> board for clock generation soon at home azonenberg
<azonenberg> nats`: :D
<nats`> :)
<azonenberg> i want to try and make a sampling front end board for my Zybo
<azonenberg> as a pmod, lol
<azonenberg> i think if i do it right i can keep all of the critical clocking stuff on the peripheral board and not have super high speed signals over the bus
<nats`> I'm working on my sampler too :)
<nats`> but just for fun
kuldeep has quit [Ping timeout: 240 seconds]
<nats`> for the fpga measure I have my tektronix :)
digshadow has joined ##openfpga
kuldeep has joined ##openfpga
pie_ has quit [Changing host]
pie_ has joined ##openfpga
kuldeep has quit [Read error: Connection reset by peer]
<nats`> time to sleep now :)
<pie_> nats`, it does if you have a scope like that :P
<nats`> ?
<nats`> it's just a crappy rigol :p
<pie_> keep the psychiatrist away
<pie_> oh well its better than anything i have xD
<pie_> anyway
<azonenberg> lol
<pie_> couldnt figure out why i couldnt make a simple LC circuit work a couple days ago, turns out my parasitic resistance was too high
<nats`> :)
<pie_> so i guess knowing what youre doing also helps
<azonenberg> Sooo i think i am going to make a PRBS tester pmod for my zybo
<azonenberg> (it'll probably be a dual pmod since i dont think i can fit all the signals i need on one)
<pie_> i mean i could tell from my scopemeter that it was "obviously" overdamped but i wasnt sure
<azonenberg> nats`: my plan is to push out a PRBS at up to 3 Gbps
<azonenberg> and sample at 20 GSa/s
<azonenberg> equivalent time, actual sampling rate will be maybe 500M
<rqou> what is the most effective way for me to start archiving stuff?
<azonenberg> rqou: how much data? is it already down?
<nats`> azonenberg yep you told me that I'm doing the same thing but an other way :)
<rqou> not down yet supposedly
<nats`> oky time to sleep seriously :D
<azonenberg> rqou: wget -R? :p
<azonenberg> And a biiiig hdd?
<azonenberg> more seriously, have archive.org crawl it
<rqou> I don't have a very biiiig HDD, and just doing that doesn't actually make it accessible to other people
<azonenberg> nats`: do you think 20G is going to be fast enough to get good eyes for gigabit-ish data?
<nats`> yep
<azonenberg> i have my eyes on a Hittite comparator that has 10 GHz b/w
<azonenberg> its $40 but hey
<azonenberg> has integrated latch
<nats`> yep but I plan to avoid the comparator trick :)
<nats`> but it's really a conceptual idea
<nats`> :D
<rqou> I wonder if my credentials will still let me access stuff after they take it down?
<azonenberg> Yeah i'm trying to do this on the cheap at the cost of longer acquisition times
<nats`> the main advantage of your technic is to avoid analog part of the circuit
<nats`> (or at least reduce it)
<nats`> I want to design my front end for fun :)
<pie_> rqou, wtf :( call archiveteam
<pie_> oh i think i read something about this a while back
<rqou> sure, except I'm not going to hand archiveteam login credentials
<pie_> i know im just sayin
<pie_> they can still get it
<cr1901_modern> I definitely misinterpreted archiveteam as "Hacking Team" lmao. That would be bad
<pie_> probably (hopefully) already did because this isnt new
<pie_> cr1901_modern, lol
<pie_> The university will continue to offer massive open online courses on edX and said it plans to create new public content that is accessible to listeners or viewers with disabilities.
<pie_> thats a plus
<azonenberg> nats`: yeah
<pie_> though i dont see why they need to remove itin the interregnum
<azonenberg> my goal is to get something that functions, is as cheap as possible, and will give me a good eye "eventually"
<nats`> if my S&H works it'll be cheaper than yours :D
<rqou> yeah I don't get it either
<nats`> anyway it'll be a good way to learn stuff
<pie_> rqou, not legally, but comon sensely speaking
<cr1901_modern> eventually? Why would a good eye occur "eventually" (transients die out?)?
<nats`> I hope to assemble my clocking board by end of the week
<pie_> well idk legally either :P
<nats`> with si5338
<rqou> for accessibility in actual classes they hire someone to do captions
<cr1901_modern> I would've figured if you had a bad eye, it was gonna *stay* a bad eye
<pie_> actually its retarded either way
<pie_> not being accessible is still better than not being public
<pie_> probably some shitty politics in the background or idk
<rqou> that's definitely part of it
<rqou> e.g. "why won't the State of California f*cking give us more funding?"
<pie_> hm i guess a way to look at it would be that outcry after the removal would get the m more funding?
<pie_> so its actually a gambit by the uni :O
<rqou> ah people are already on it
<rqou> I don't know exactly what the politics is about
<pie_> i havent the faintest clue
<pie_> a dude says it was the unions
<rqou> in general (not referring to this new policy) half of the university politics seems to be about funding and half seems to be about social justice
<pie_> (without any details)
<rqou> still better than azonenberg's school? :P
<pie_> rqou, why what about his skool
<rqou> azonenberg, time to relay your stories about the RPI chancellor again :P
<pie_> uh oh
<azonenberg> oops
<azonenberg> i meant
<azonenberg> But thats paywalled
<azonenberg> there's some good quotes in the first article though
<azonenberg> " Only she is authorized to set the temperature in conference rooms.
<azonenberg> If a meeting is called for 8 a.m., Ms. Jackson may not arrive until 9:30 a.m. Everyone waits."
<azonenberg> If food is served in a meeting, vice presidents often clear her plate.
<azonenberg> Cabinet members all rise when she enters the room.
<pie_> ok enough random links from me
<pie_> jesus christ lol thats good paty
<pie_> pay
<azonenberg> They call me every few months asking me for donations
<azonenberg> My response, each time is
<azonenberg> "Is Shirley Ann Jackson still president?"
<azonenberg> "Yeah, thought so. Call me back when she's gone."
<cr1901_modern> She doesn't seem very nice...
<azonenberg> cr1901_modern: That's an understatement :p
<pie_> making people stand up when the boss enters the room is one thing
<rqou> in general though I'm really unhappy with how the State of California apparently doesn't realize that the University of California system is actually a great investment
<rqou> and pensions aren't :P
<qu1j0t3> azonenberg: that's a great tactic
<qu1j0t3> azonenberg: or, at least, it's definitely a satisfying on
<qu1j0t3> e
<rqou> California recently voted even moar money to K-12 schools but not for the university systems
<rqou> gotta give those career administrators the pensions they deserve /s
* rqou did not have a great K-12 experience
kuldeep has joined ##openfpga