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<rqou>
finally, after half a day, i have network connectivity "mostly" back up how it was before
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<pie_>
wow so doing almost anything in ISE makes it crash...fk me
<pie_>
cant even make a new project
<pie_>
"platform studio" anyway
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<pie_>
so apparenlty file selection dialogs are something it doesnt like...
* pie_
tries compatibility mode
<pie_>
how can this be broken
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<rqou>
ise works for me as long as you're actually using the correct version of ubuntu (e.g. in a container)
<qu1j0t3>
pie_: That's bad :/ but rqou 's advice is good
<qu1j0t3>
pie_: if you dig into the crash it may be a shared library version problem
<qu1j0t3>
pie_: i actually had this issue with Altera Quartus, but thankfully just a single library
<qu1j0t3>
pie_: either just go straight to a container with the right linux release, or try and get the crash diagnostic. You can perhaps see something if you start it from the console.
<pie_>
lol im on windows 8 :/
<qu1j0t3>
BWHAHAHAHHAHAH
<qu1j0t3>
okay time for me to retire obv
<qu1j0t3>
pie_: Sux.2.b.u
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<cyrozap>
pie_: ISE worked fine on Windows 8 for me a few years ago, not sure why it won't work for you now. I guess you can always try the tried-and-true way of fixing Windows issues: Reformat, reinstall :P
<cr1901_modern>
That's the same way to fix Ubuntu issues, tbf
<cyrozap>
Well, yeah, if you don't know how your OS works, that's all you can really do.
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<cr1901_modern>
I need a USB interface that can xfer at least 1MB/sec... so UART is out of the question. Are there anything besides FT2232Hs that can do the job. A microcontroller is fine, but HID isn't fast enough.
<rqou>
the "azonenberg way?" FPGA transceiver --> USB 3.0
<rqou>
:P
<rqou>
or a different "even more azonenberg way?" FPGA transceiver --> sgmii-to-copper phy --> usb-ethernet adapter :P
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<azonenberg>
rqou: usb 3.0 isnt my way
<cr1901_modern>
Ethernet is a no
<azonenberg>
thats the marshallh way
<azonenberg>
cr1901_modern: FT232H :p
<cr1901_modern>
azonenberg: You know damn well that I implied that in my question :)
<azonenberg>
Other than that, stop using usb
<rqou>
why not ethernet though?
<cr1901_modern>
Please turn off your -pedantic
<cr1901_modern>
B/c it's not easy to attach directly to a computer/on the go
<azonenberg>
um, an rj45 is just as easy to plug in as a usb
<rqou>
you can get an asix usb-ethernet chipset and connect it to the fpga
<azonenberg>
lolol
<azonenberg>
thats the worst of both worlds
<rqou>
ime asix is "reliable enough" :P
<rqou>
works as a toy, can transfer at least one gigabyte, costs around $20 delivered from amazon :P
<cr1901_modern>
*grumbles* maybe I'll do Ethernet. But don't I need a crossover cable to directly attach a non-router to a laptop Ethernet port?
<rqou>
not for gigabit
<azonenberg>
Any modern PHY should do auto crossover
<cr1901_modern>
How do I even know when I need a crossover cable?
<cr1901_modern>
ahhh
<azonenberg>
it's mandatory for gigabit, and the majority of recent 10/100 PHYs support it too
<cr1901_modern>
I'll prob just use one of those microchip 10 PHYs...
<rqou>
_copper_ PHYs :P
<rqou>
fiber PHYs can't auto-cross :P
<azonenberg>
i dont consider a SFP a PHY
<azonenberg>
and hey, there might be some weirdo with beamsplitters and solenoids... :p
<cr1901_modern>
SFP?
<rqou>
BiDi SFPs?
<azonenberg>
cr1901_modern: I'm a fan of the Micrel (now Microchip) KSZ9031 for gigabit
<azonenberg>
I have no personal experience with the KSZ8xx series (10/100)
<azonenberg>
but i suspect they're good
<azonenberg>
i've seen them in client hardware @ $WORK
<rqou>
not a fan of stealing an illegal copy of the marvell alaska datasheet? :P
<cr1901_modern>
How much FPGA logic do I need to "get something working"?
<azonenberg>
rqou: its not just that
<azonenberg>
it's more, i don't want to give a company like marvell my business
<azonenberg>
oh, and trying to get my hands on the silicon is damn near impossible
<azonenberg>
so datasheet or not, i cant use it :p
<azonenberg>
cr1901_modern: Define "something"
<rqou>
somehow xilinx seems to really like the marvell alaska on their devkits
<azonenberg>
rqou: yes bc their engineer knows it
<azonenberg>
:p
<azonenberg>
us mere mortals dont
<rqou>
a leaked datasheet is pretty easy to find :P
<azonenberg>
rqou: yes sure
<azonenberg>
but its again, silicon availability plus the moral side
<azonenberg>
a company with that kind of policy is not one that wants my business
<azonenberg>
so i wont give it to them
<rqou>
sure, i agree with that
<azonenberg>
cr1901_modern: let me count...
<cr1901_modern>
azonenberg: From my design side I want to send data in a queue to a host one shot
<cr1901_modern>
How big would the state machine be to do this?
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<azonenberg>
So at the minimum side of things
<azonenberg>
if you limit yourself to say 100mbit and dont do any fancy configuration
<cr1901_modern>
that's fine.
<azonenberg>
(100/full only and blindly assume you got that)
<rqou>
afaik if you don't care about reliability you can just repeatedly spit out "sync, ethernet frame header, payload, fcs, ifg"
<azonenberg>
you basically assert TX_EN
<azonenberg>
drive a 25 MHz clock to TXC
<azonenberg>
And 4 bits at a time, push your message out TXD
<cr1901_modern>
4 bits at a time? (Haven't checked the datasheet)
<azonenberg>
Where the message consists of 55 55 55 55 55 55 55 D5, dest MAC, source MAC, ethertype, payload, CRC32
<azonenberg>
source MAC can be prety much anything nobody else on your LAN is using
<azonenberg>
dest MAC can be broadcast on a point to point link
<cr1901_modern>
the 55's are for clock sync, right?
<azonenberg>
you can either set ethertype to a random value and capture with libpcap, or manually bake an IP and UDP header and just use sockets
<azonenberg>
Yes
<azonenberg>
They're redundant since 10mbit but are kept for compatibility
<azonenberg>
i.e. 100mbit and up already have clock sync in the line code
<azonenberg>
but 10mbit didnt send idles between frames
<azonenberg>
so you had to re-sync the PLL for each packet
<rqou>
careful about "random" ethertypes
<cr1901_modern>
ahhh
<rqou>
make sure it doesn't look like 802.1q or something like that :P
<azonenberg>
Random meaning "unused"
<rqou>
unused should work fine
<azonenberg>
Honestly, a static IP header on a hard coded subnet, plus a udp header, is so easy to just dump out of a rom
<azonenberg>
there's no reason to not do that
<azonenberg>
you can omit the udp checksum for ipv4
<azonenberg>
the ip header checksum can be hard coded if your messages are the same size, or trivially recalculated if your length changes
<rqou>
yeah, that would be significantly less annoying to receive as well
<azonenberg>
Exactly
<azonenberg>
no messing w libpcap
<cr1901_modern>
And use socket raw to read it on the host?
<azonenberg>
if you did UDP?
<azonenberg>
you'd just do normal UDP and recvfrom the board's hard coded ip address
<azonenberg>
on say 192.168.69.0/24
<rqou>
i did the libpcap way when i was at broadcom
<azonenberg>
(you'd obviously have to set your NIC to something in that subnet as well)
<cr1901_modern>
oh... I thought payload was just the "raw data"
<rqou>
libpcap breaks when you accidentally flood your machine at line rate :P
<azonenberg>
cr1901_modern: It depends on how you want to do it
<azonenberg>
you can transport packets with nothing but the layer 2 header and checksum
<azonenberg>
But its more annoying to receive on a PC
<azonenberg>
if you put IP and UDP headers on, you can just do sockets
<azonenberg>
So basically, choose which end you want more work on :p
<azonenberg>
i think making headers is way less work than setting up libpcap
<cr1901_modern>
Software end is better
<cr1901_modern>
ahhh
<azonenberg>
you can literally hard-code the entire packet
<azonenberg>
then poke the IP and UDP length fields depending on your payload size
<azonenberg>
calculate checksums
<azonenberg>
and spam it out the port
<rqou>
be careful your fpga doesn't blow up when the pc starts sending you dhcp and router solicitations :P
<azonenberg>
rqou: its easy enough to ignore all that
<cr1901_modern>
shouldn't the PHY take care of that :/
<cr1901_modern>
ahhh guess not
<azonenberg>
cr1901_modern: the PHY is a PHY, not a MAC
<azonenberg>
If you want a bit less math, you could use an ENC424J600
<azonenberg>
Which is a 10/100 PHY, MAC, and some buffer sram
<cr1901_modern>
I'm fairly bad with CRC32, tbh
<azonenberg>
i think it might calculate crcs for you
<azonenberg>
dont remember
<azonenberg>
but its pretty easy
<azonenberg>
gimme a sec
<rqou>
iirc driving a rtl8139-series ethernet controller isn't that hard either
<rqou>
the pci ones, not the pcie ones
<azonenberg>
lol eew not pci
<azonenberg>
with a fpga just do a raw phy
<cr1901_modern>
tbh, ENC424J600 is easier. The other one gives me more control
<azonenberg>
only key difference is the data bus is 4 bits wide instead of 8 and you clock it slower
<azonenberg>
you can delete all of my logic for activating the in-band status if you don't need a link light (or you could just poll the MDIO interface)
<azonenberg>
i tried to do gig/10/100 but never fully implemented 10/100
<azonenberg>
single speed is a bit simpler since there's only one data width to worry about (gig is 8 bits wide)
<cr1901_modern>
I don't need gig for my purposes. Just want something faster than a UART (and I'd rather not give FTDI my money since I feel gross when I do)
<azonenberg>
Yeah
<azonenberg>
well in that case you could basically do what i did but simpler (not doing tri-speed or multi PHY support)
<rqou>
but what do you do when you need really complicated led blinking logic? :P
<rqou>
azonenberg: how do you feel about the fact that a Certain Enterprise Ethernet Switch Vendor has a small uC embedded in the chip just for blinking leds? :P
<azonenberg>
rqou: o_O
<rqou>
i think they got tired of customers asking "but i want the pattern to be like <blah blah>" :P
<azonenberg>
lolol
<cr1901_modern>
Blinking LEDs is srs bsns
<rqou>
offtopic: "the ffmpeg mp3 prober is of bad quality [...] It even detects ELF binaries as mp3"
<rqou>
just... how?
<davidc___>
rqou: raw mp3 is notoriously hard to detect
<davidc___>
rqou: er, don't they all?
<davidc___>
rqou: (re tiny MCU in the switch chip)
<azonenberg>
davidc___: does mp3 not have a header?
<rqou>
an internal mcu is probably pretty common, but one just for the LEDs seems a little bit frivolous
<davidc___>
azonenberg: its just a linear chunk of frames
<cr1901_modern>
what else is a PIC10 going to do?
<davidc___>
azonenberg: try dd'ing out a random subset of an MP3 file. most will play it just fine with a glitch at the start
<azonenberg>
davidc___: interesting
<azonenberg>
how about ID3 stuff?
<azonenberg>
is that at the end or what
<azonenberg>
i thought that was some kind of chunk-based header
<davidc___>
azonenberg: depends on whether you're doing id3v1 or id3v2
<davidc___>
which share only the name in common
<davidc___>
Also, its a completely optional "header"
<davidc___>
that was added to the file format on an ad-hoc basis
<azonenberg>
lol
<davidc___>
since good players simply skip things that don't look like proper MP3 frames
<azonenberg>
i thought it was an optional chunk in a mandatory framing format
<rqou>
this seems to be part of the "audio/video people are bad at engineering" thing :P
<rqou>
or at least bad at digital stuff
<rqou>
the analog stuff i've seen is quite impressive
<davidc___>
azonenberg: nope, it was created ad-hoc; not even a standards body
<davidc___>
azonenberg: try creating an mp3 out of 4kB of /dev/urandom, followed by actual MP3 content, followed by another 4kB of urandom
<davidc___>
azonenberg: then name it whatever.mp3 and try and play it
<azonenberg>
lolol
<davidc___>
most will handle it just fine
<davidc___>
because some MP3 files out there are actually that bad
<rqou>
so is mp3 just made out of "packets?"
<davidc___>
azonenberg: hell, random, mp3data, random, mp3data, random plays just fine as well
<davidc___>
rqou: frames, but yes
<rqou>
hmm, i guess it is kinda reasonable
<rqou>
iirc ffmpeg can also play other formats that are supposed to have encapsulation that actually have damaged encapsulation?
<rqou>
e.g. iirc you can stream raw h.264 frames into vlc and it can play
<davidc___>
Anyhow, it definitely could be better (IE, require finding $X consecutive frames)
<rqou>
i'm starting to understand how "media decode" is one of the best sources of RCE bugs :P
<rqou>
along with "font rendering"
<rqou>
and "GPU drivers" :P
<davidc___>
rqou: all 3 involve binary parsing!
<mtp>
hey whitequark
<mtp>
(or anyone who happens to have their script for adding a transparent pixel to pngs so twitter doesn't cornhole them)
<rqou>
ask @eevee?
<whitequark>
um I wrote it for eevee
<rqou>
oh really?
<whitequark>
not sure if they use that specific one though
<rqou>
small world
<whitequark>
but I did write one ksnapshot patch for eevee
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<lain>
nats`: I hear there's some rioting going on in france, you ok? :P
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<nats`>
lain media are making a fuss about few strike :p
<nats`>
I lvoe how media talk about riot as soon as they can :D
<nats`>
maybe it'll turn into riot if government continue to play dumbass but for now it's nothing worrying :)
<lain>
lol
<pie__>
<cyrozap> pie_: ISE worked fine on Windows 8 for me a few years ago, not sure why it won't work for you now. I guess you can always try the tried-and-true way of fixing Windows issues: Reformat, reinstall :P
<pie__>
honesty i shouldve done that like a year ago
<nats`>
nop
<nats`>
you have to patch dll
<nats`>
it's "well documented on forum"
<lain>
ISE has bugs on win8+
<lain>
ah yes, what nats` said
<lain>
there's some dlls that need patched
<pie__>
o....h?
<pie__>
1) that sucks testicles
<pie__>
2) thanks ill loookinto it
<pie__>
wow there is like 10 copies of libportability.dll
<nats`>
yepa nd since it's the portability dll you need to replace it because it's not portable :D
<pie__>
well i didthat but i still get xpsgui crashes when i try to open "explore xps tutorials"
<nats`>
TBH if you plan to use ISE intensively put it on a linux box
<nats`>
I mainly work on windows but I use ISE on linux
<nats`>
xilinx stopped support years ago (shamelessly)
<lain>
pie__: you may also need check if you have a libeay32.dll in your system32, and if so, delete it (or rather, rename it to something like libeay32.dll.BAD)
<lain>
some software will install that openssl dll in the system32 folder and it messes up all kinds of stuff, because different versions are not binary compatible
<lain>
dll hell :P
<nats`>
long story short, use ISE on linux if you need advanced tool
<nats`>
on windows I have ISE/IMPACT/PLANAHEAD working
<nats`>
nothing more
<nats`>
maybe coregen
<pie__>
:I
<pie__>
thnks
<pie__>
well i dont see a libeay
<pie__>
even though they stopped supportthat still seems dumb
<pie__>
though its nt like ive done cross windows coding
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<pie__>
ok the solution was the same nsh trick
<pie__>
nosh
<pie__>
but the forums werent lucid enough to tellyou to do it for everything
<lain>
yeah
<lain>
NOSH == No SmartHeap
<lain>
SmartHeap is weird shit
<pie__>
is that some heap implementaiton?
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<lain>
yeah, a dumb one
<qu1j0t3>
DESPITE THE NAME
<lain>
qu1j0t3 gets it
<qu1j0t3>
and i haven't even had breakfast yet!
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<pie__>
whats "speed grade" in new project menu when selecting an fpga model?
<pie__>
mine has -5 and -4 listed
<pie__>
(im guessing this is binning based on max clock?)
<lain>
basically yeah
<lain>
the speed grade is written on the chip, it's part of the part number
<nats`>
it mainly change IO and some features
<nats`>
IIRC you use the starterkit
<nats`>
in ise there is a devboard definition for that in the project menu
<nats`>
will be faster :)
<pie__>
oh... xD
<azonenberg>
pie__: yeah thats speed binning, with xilinx FPGAs higher is faster - just look at the number printed on your chip
<azonenberg>
it should be something like xc3s50a-SPEEDpkg123
<azonenberg>
note that this is the opposite with xilinx CPLDs
<azonenberg>
with xilinx CPLDs, the speed grade is the propagation delay, in ns, of one function block (so lower is better)
<azonenberg>
with xilinx FPGAs the speed is an arbitrary number, higher is better
<azonenberg>
most recent parts are 1, 2, 3
<azonenberg>
for some weird reason spartan3 are 4 and 5 only
<qu1j0t3>
"this one goes to 11"
<azonenberg>
lol
* qu1j0t3
wonders why they didn't make 10 the fastest number
<azonenberg>
honestly, i think they started with 1/2/3 as arbitrary speed grades
<azonenberg>
then they tried to make spartan3a speed grades stack with some older chip
<azonenberg>
then realized this would quickly turn into an arms race and have huge numbers
<azonenberg>
so they reverted to 1/2/3 as arbitrary numbers that have no meaning outside that generation
<nats`>
and in new generation they mainly change transceiver speed but not much about internal logic
<nats`>
pretty sure you could run an artix -1 gtp at same speed than a -2
<lain>
hm?
<lain>
-2 is faster gtp
<lain>
or do you mean you could "overclock" it :P
<azonenberg>
yeah internal speed changes significantly too
<azonenberg>
bram fmax
<azonenberg>
lut propagation delays
<lain>
-2 goes to 6.6 I think, wheres -1 only goes to... I want to say 3.something?
<lain>
-1 isn't enough to do 5Gbps usb3, I know that much
<lain>
for artix7
<lain>
for that we needed -2
<nats`>
same for my HDMI2
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<azonenberg>
yeah and also package matters
<azonenberg>
with kintex at least, i dont think artix
<nats`>
azonenberg I wasn't strike by the difference about LUT delay
<azonenberg>
FFG vs FBG packages in the same speed grade
<nats`>
same for artix but in a lower measure
<nats`>
like 250MHz IIRC
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<azonenberg>
luts dont matter with package
<nats`>
I'm saying with speed grade
<azonenberg>
but transceivers are limited by the lower cost package (i guess worse impedance control or something)
<azonenberg>
nats`: block ram is significant... 388, 460, 509 MHz Fmax (in write-first mode)
<azonenberg>
in artix7 -1/2/3
<nats`>
ah didn't notice that
<nats`>
but for LUT ?
<azonenberg>
LUT propagation delays are 130, 110, 100 ps
<nats`>
oky can change few things on really limit case
<pie__>
nats`, yeahi was looking for that, apparently idkhow to get to that enu
<pie__>
menu
<pie__>
im inth eplatform studio
<pie__>
and when i try to make a new blank project i only get a singe step dialog
<nats`>
platform studio
<nats`>
what are you doing there
<pie__>
well i figured thats the main thing where i do things
<pie__>
i dont know my way around the 20 programs this thng has :/
<nats`>
you want to start a fpga design ?
<nats`>
like logic in the fpga ?
<pie__>
yeah?
<pie__>
i mean what else is there
<nats`>
start "project navigator"
<nats`>
either 32 or 64 bit
<nats`>
there are things for microblase sdk etc
<pie__>
thanks ill give it a look
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<lain>
balrog: well, azonenberg is attempting to replace schematics for pcbs with pcbhdl also
<pie__>
btw i mean obviously im not very experiencd but it seems to me most place and route tools expect you to place and then it will route? or are both automated? (Asi would expect)
<pie__>
*as i
<lain>
pie__: for fpga? P&R is fully automated, but you have the choice to place things specifically, like if the placer is putting related things really far apart and hurting your timing
<pie__>
forpcb
<lain>
oh for pcb you do it all by hand
<lain>
never trust an autorouter
<lain>
never.
<pie__>
wow
<pie__>
why
<pie__>
that sounds really really dumb
<cr1901_modern>
B/c unrestrained place and route is tough (TM)
<lain>
^
<lain>
it's only solvable by brute force and the search space is too large for finding global maxima in a reasonable amount of time
<pie__>
makes sense i guessbuti would naively assume that coding inheuristics or semi-user-guided would still cover the search space faster?
<lain>
autorouters can be good at highly-constrained problems, like autorouting a specific bus with specific spacing constraints etc, but often inputting all the parameters takes about as long as hand-routing :P
<pie__>
ok, illleaveitat that for now then
<pie__>
sorry for the terrible typing, my space and m keys are rather screwy
<lain>
there are semi-auto or "follow me" routers which you just start the trace and generally guide it across the board, and it will obey the spacing rules and "follow" your cursor for example
<lain>
that helps a lot
<nats`>
huummm you know that a lot of what you said is false
<nats`>
I know few board fully autorouted
<lain>
and you can do things like bus routing where you do that, but with lots of lines at once
<nats`>
but the team behind spent 24 month making the constraint rules
<lain>
nats`: how does that contradict what I said? :P
<nats`>
<lain> never trust an autorouter
<nats`>
:D
<lain>
yes, and I then clarified that they're only good when highly constrained
<lain>
which takes longer than hand routing in most cases :P
<nats`>
in fact the real problem is the time spent solving constraint by hand
<nats`>
yep
<lain>
most autorouters are garbage anyway though, except the $$$$ ones
<nats`>
yes there is one really interesting and cheap but people dont like results :D
<nats`>
look at Topor
<lain>
haha
<lain>
yes
<lain>
topor is neat
<nats`>
I never understood why people hate topor :)
<nats`>
I can't remember how we define differential clock in UCF file