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<rqou> blargh, sleep cycle so f*cked
<pie_> rqou, feel the bleh flow through you young padawan
<rqou> alright, i think today i'm going to prune some ff tabs and then look at my vhdl parser again
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<rqou> blargh i really need to write more comments
<rqou> i am really bad at that
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<pie_> when something is nontrivial leave just enough to understand next time
<rqou> also sublime text's vhdl syntax highlighter is shit
<qu1j0t3> and if in doubt write more rather than less.
* qu1j0t3 does a lot of maintenance work on inscrutable systems and comments are usually neglected
<lain> and remember that what is trivial now isn't in a year, even if you're the one looking at it a year later :P
<qu1j0t3> lain: Yeessssssss
<lain> humans are, by default, pretty awful at judging how well they will understand something N time units in the future
<qu1j0t3> lain: I write them as much for myself as the next person to pick up the code
<lain> qu1j0t3: same
<rqou> the last time i looked at this code was right before 33c3 and i already forgot a whole bunch of stuff
<lain> when working on large systems there's another aspect as well... even if you're just summarizing some trivial code, that summary can be really handy because in a large system I often don't care to read the entire function, trivial as it may be, just to see what it does
<qu1j0t3> yeah. memory fades so quickly. i have to baby myself through things every time. comments make that easier.
<lain> I just want a quick comment saying what it is, what it does, what the side-effects are, etc.
<qu1j0t3> lain: *nods vigorously*
<qu1j0t3> lain: that's exactly what i am lacking in the thing i'm working on.
<rqou> i should really fix "Error syntax error, unexpected $undefined on line 1"
<rqou> this happens every time the lexer doesn't like your input :P
<qu1j0t3> lain: also, the assumption that "somebody will document this before they hand it over... won't they?" is always wrong
<lain> qu1j0t3: lool yes, so much yes.
<rqou> the problem with "lexer doesn't like your input" is that it includes nonobvious issues like "a__b"
<qu1j0t3> lain: in this case, i got a big marketing/ecommerce site dropped on me when an outsourcing relationship went sour, so there was zero, zilch, nothing. Just an out of date backup and a panicked client.
<rqou> which is a lexing error afaik
<rqou> according to the spec
<qu1j0t3> (and the code was awful)
<lain> qu1j0t3: wooo
<qu1j0t3> so that was my New year! :)
* qu1j0t3 shuts off complain mode and goes to wash dishes
<lain> hehe
<rqou> question: how do i insert comments in something like this? "[A-Za-z\xC0-\xD6\xD8-\xF6\xF8-\xFF](_?[A-Za-z\xC0-\xD6\xD8-\xF6\xF8-\xFF0-9])*"
<qu1j0t3> lain: Do you have a twitter? I follow a couple of people here, wouldn't mind following you. You can pm if you like
<rqou> qu1j0t3: i'm @rqou_ on twitter
<lain> qu1j0t3: I rarely tweet, but here you go: https://twitter.com/lainpants
<qu1j0t3> rqou: will do!
<qu1j0t3> lain: thanks!
<qu1j0t3> rqou: I like your feed already
<rqou> about protests? :P
<qu1j0t3> yeah, but i think i'll like all of it
<qu1j0t3> oh man, how could i forget to follow @DanLuu
<lain> <3 danluu
<rqou> oh the "files are hard" guy
<lain> his blog is simply the best
<cr1901_modern> Tbh, I find most of his blog posts about the current state of things depressing (understandably so), so I really don't read it much
<lain> I really love his anecdotes on various deep technical topics
<lain> https://danluu.com/hn-comments/ <- this post is fantastic imo
<rqou> man i swear whoever wrote the sublime vhdl syntax highlighter never even read the spec
<lain> lol
<lain> notepad++'s seems ok, though it doesn't play well with dark themes at all
<rqou> try putting |12UB"X1"| (without the ||s) in it
<rqou> this should highlight as a single literal
<lain> but most of my vhdl is in visual studio, using v3s (non-free, though maybe there's a free .edu version?)
<rqou> sublime's highlighter only highlights the |B"X1"| part
<lain> rqou: isn't that a 2008 thing? it's plausible sublime's highlighter is for 2002
<rqou> i have no idea
<lain> 2008 is depressingly underutilized
<rqou> it's section 15.8 of the 2008 spec
<lain> muffin button
<lain> yus
<lain> I've been updating the hdl# codegen and my own vhdl codebase to 2008 and that sounded very familiar
<rqou> wait
<rqou> the vhdl spec explicitly allows for mojibake-inducing "features"
<rqou> "NOTE 2—Comments may contain characters that, according to 15.2, are non-printing characters. Implementations may interpret the characters of a comment as members of ISO/IEC 8859-1:1998, or of any other character set; for example, an implementation may interpret multiple consecutive characters within a comment as single characters of a multi-byte character set."
<rqou> best character encoding: latin1-utf8 hybrid, with utf8 only in comments
<rqou> now your encode/decode logic needs a parser
<rqou> :P
<cr1901_modern> encode/decode logic?
<rqou> the thing that python calls a "codec" that converts to/from bytes and the internal representation (usually codepoints)
<cr1901_modern> Why would it need a parser for "utf only in comments"? I'm running at 10% capacity btw.
<rqou> because the rest of vhdl is explicitly latin1
<rqou> including for case folding
<cr1901_modern> I don't see how that means your encoder/decoder needs a parser, but rather "your VHDL parser needs an encoder/decoder to swap between charsets on the fly"
<rqou> sure, you can phrase it that way
<rqou> except it's not just "your vhdl parser"
<qu1j0t3> rqou: I note particularly his 'how brokenness becomes normalised' post
<rqou> it also includes things like "your text editor"
<cr1901_modern> Ahhh, I see now
<azonenberg> rqou: one of many things i dislike about vhdl
<azonenberg> :p
<azonenberg> do you know what verilog does? i havent checked the LRM
<cr1901_modern> I dislike vhdl b/c it's unfamiliar to me. And unfamiliar things are bad.
<rqou> iirc it allows any unspecified 8-bit extension to ascii
<azonenberg> I wrote a bit of vhdl a while ago
<azonenberg> never liked it
<azonenberg> went back to verilog :p
<rqou> verilog is also case sensitive
<rqou> so it doesn't need to do case folding
<cr1901_modern> I prefer to read verilog rather than write it
<cr1901_modern> and have something else generate it for me
<azonenberg> lol
<cr1901_modern> FSMs are a PITA in verilog. As is combinational always and forgetting to assign a default if no match
<azonenberg> FSMs are quite easy, idk what you're talking about
<azonenberg> re combinatorial always, that i agree could be handled better
<azonenberg> easy solution is a lint rule that enforces a default
<azonenberg> Once i write a linter :p
* cr1901_modern doesn't know how to describe it, but FSMs are properly split into a combinational part that update a signal when a state transition is satisfied, which the sequential part then uses on the next clock to actually change state
<azonenberg> You can do this in verilog
<azonenberg> But i prefer to write it in one sequential block
<azonenberg> its more concise and readable
<azonenberg> The only time i use the 2-part form is when I need to use intermediate combinatorial values
<azonenberg> a lot
<azonenberg> which is rare
<cr1901_modern> I don't actually know why the 2-part form is preferred in some contexts. Clifford suggested using it on a Stack Overflow answer (citation needed). Migen does it.
<azonenberg> i think some old style guide :p
<cr1901_modern> I learned to do it your way :P
<azonenberg> Yeah i prefer it that way
<cr1901_modern> But, the 2-part way is annoying, so I'
<cr1901_modern> d rather some code generator do it for me :)
<azonenberg> my solution: write them 1-part style and dont use 3rd party Ip :p
<cr1901_modern> *what* third party IP ;)?
<cr1901_modern> (that
<cr1901_modern> 's open source)
<azonenberg> opensores? :p
<cr1901_modern> *This FIFO is free software. It comes without warranty if it eats your dog*
<cr1901_modern> fusesoc seems to be a nifty way to unite a bunch of FOSS IP, btw. It'd be a shame if it didn't work on non-free operating sys- oh wait
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<rqou> i swear the majority of the effort of a vhdl parser is understanding how the heck names/expressions interact
<rqou> the ebnf seemed very "ehh fukkit"
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<cyrozap> cr1901_modern: Sounds like you need to get a better operating system ;)
* cyrozap was making joke pls no flame war :(
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<lain> rqou: if you treat the document as utf8 it should work out though, re: mojibake-induction
<rqou> um, the non-comment parts of vhdl are latin1
<rqou> including case folding
<lain> case folding can be implemented separately, it's not relevant for decoding the document
<rqou> but the non-comment part can also be invalid utf8
<rqou> you can't just parse as utf8
<lain> but hm, is latin1 not compatible with utf8?
<lain> ehhh
<rqou> no it isn't
<rqou> it's compatible in the sense that latin1 bytes 0x00-0xFF map to unicode codepoints U+0000-U+00FF
<rqou> but you can't just read the bytes directly
<lain> hm
<rqou> e.g. 0x80 isn't a valid lead byte
<lain> azonenberg: don't count that against vhdl, lest ye be prepared to accept that verilog simply doesn't define this stuff at all :P
<rqou> yeah from my reading of verilog this is all undefined
<lain> verilog's design meme is "leave it up to implementation, surely they will do the Right Thing™"
<lain> :P
<azonenberg> lain: my rule with all languages, including but not limited to HDLs
<azonenberg> is to write a strict subset of them
<azonenberg> that is well defined and less bug-prone than the full language
<lain> with vhdl, the language is less bug-prone than verilog on the whole :P
<lain> /by design/
<lain> </langwars>
<rqou> vhdl also has fun features like 0xd7 and 0xf7 not being allowed in identifiers
<rqou> but the rest of 0xc0-0xff are
<lain> I have to wonder why vhdl did this :P
<rqou> because in latin1 those two bytes are the multiplication and division symbols
<rqou> which aren't upper case or lower case letters
<lain> ah
<rqou> unlike the rest of 0xc0-0xff
<rqou> which are accented letters of various kinds
<rqou> 0xA0-0xBF aren't allowed either
<rqou> btw this is alll allowed in 2008 extended identifiers if you want
<lain> yeah
<rqou> the only thing forbidden in extended identifiers is C0/C1 control codes in the 0x00-0x1f and 0x80-0x9F range
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<lain> iirc all utf8 can be used in extended identifiers without issue
<rqou> iirc yeah
<lain> unrelated/off-topic, this is some quality enemy rendering code: https://dumptruck.lain.land/gits-pop.mp4
<rqou> wait
<rqou> shit
<rqou> no it's not all allowed
<lain> cite?
<rqou> 0x80-0x9F are used in utf-8 but banned in extended ids
<lain> hrm
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<rqou> only "graphic characters" are allowed in extended ids
<lain> graphic_character ::= basic_graphic_character | lower_case_letter | other_special_character
<lain> hmm
<lain> this is goofy
<rqou> arrgh i hate the name/expression part of vhdl
<rqou> it's basically impossible to make sure you did it right
<fpgacraft2> <laincat> I wish hdl didn't suck
<rqou> how the heck did clifford write his verilog parser and make sure it actually worked?
<fpgacraft2> <laincat> "best effort" ? :D
<rqou> i swear half of these features in the spec are never frikkin used
<azonenberg> Lol
<azonenberg> rqou: so i forget if i mentioned
<azonenberg> but i think 800 Mbps with the io performance i want is physically impossible
<azonenberg> at least with current semi technology
<azonenberg> you can get slower and 12V tolerance, or faster input only, etc
<azonenberg> but not faster io with 12V tolerance
<azonenberg> What are your thoughts on a starshipraider module with 500 Mbps symmetric I/O per channel?
<azonenberg> (slightly slower output at low voltages, but full 500 for input at all speeds)
<rqou> hmm my original plan was actually 500mbps to match the intronix logicport with its cheating io
<rqou> i think you were the one that wanted 800
<azonenberg> Ah ok
<azonenberg> yeah that was the FPGA Fmax
<azonenberg> for that io spec
<azonenberg> but my io buffer will be the limiting factor
<azonenberg> I'm gonna do a blog post tonight announcing the project and reporting test status to date
<rqou> one thing that i thought about briefly and realized was hard and then put aside was how to control slew rates on output drivers
<rqou> idk if that is necessary or not
<azonenberg> So my protection circuit will include a ~50 ohm series resistor to limit fault current
<azonenberg> Which will double as a series terminator
<azonenberg> That should prevent excessive ringing, i'm actually worried about over-terminating and slowing the rise time
<fpgacraft2> <laincat> sub-1Gbps you don't generally need any fancy stuff like pre-emphasis, if that's what you mean
<rqou> i don't know how much rise time actually matters on output when haxoring things
<azonenberg> Unlikely to matter at all, as long as its fast enough to meet setup/hold constraints
<azonenberg> The only issue would be if the slew rate was so slow you couldn't stabilize the signal before the next data point arrived
<azonenberg> this will be my most fpga-heavy project yet i think
<azonenberg> right now i'm looking at 3 greenpaks * 4 io modules
<azonenberg> plus an artix
* azonenberg heads off to the garage to do more measurements
* rqou is currently manually converting the vhdl grammar to a .dot file to help me understand wtf is going on
<rqou> girlfriends using hairdryers are bad for circuit breakers :P
<rqou> thanks housemates
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<azonenberg_work> ohai
<rqou> hai
<azonenberg_work> holy moley this is actually pretty good looking at 100 MHz on my scope
<azonenberg_work> the jiitter must be in the comparator then?
* azonenberg_work puzzles
<azonenberg_work> either that, or it was the flying-lead test setup i was using before
<azonenberg_work> this is a beautiful eye coming out of my protection block at 100 Mbps
<azonenberg_work> i know i still need a better test setup to do this at higher data rates
<azonenberg_work> but its not bad at *all* for this speed
<azonenberg_work> lain, rqou: http://i.imgur.com/nwv0HhW.jpg this is at 100 Mbps through my protection block
<azonenberg_work> (not the full io stage)
<lain> looks great
<azonenberg_work> note the new SMA cables i have
<azonenberg_work> 0.1" pin to SMA, lol
<azonenberg_work> Not sure if the old flying leads were picking up noise and clogging the eye or what
<azonenberg_work> i'm going to do another test shortly at 200 Mbps (100 MHz)
<lain> did you have the inline terminators for the old tests?
<azonenberg_work> then repeat both tests through the full buffer
<lain> that could be a big part of it
<azonenberg_work> Good call, i did not
<azonenberg_work> This was my attempt to actually get good SI during my tests
<azonenberg_work> and make sure when it failed it was my board's fault and not my lab's
<azonenberg_work> Crystek Microwave (among other places) has been getting a lot of business from me, lol
<azonenberg_work> But its worth it
<azonenberg_work> http://i.imgur.com/aRdyP9G.jpg this is at 200 Mbps - a lot less useful
<azonenberg_work> but i cant tell how much of the sinusoidal rounding is the 100 MHz b/w on my DSO
<azonenberg_work> and how much is the ~220 MHz b/w of my current I/O buffer :p
<azonenberg_work> Going to do one last test at 300 for lulz
<azonenberg_work> then after that, jump down to 100 and test the whole buffer
<azonenberg_work> http://i.imgur.com/LtDSYKB.jpg aaand yeah thats useless :p
<azonenberg_work> But its the scope's fault, this is way faster than its useful
* azonenberg_work needs a nice dso :'(
<rqou> just buy one? you have a "real" job after all :P
<azonenberg_work> I'm putting most of my take-home pay into the house fund right now
<azonenberg_work> I have enough in there to buy a brand-new 1 GHz lecroy cash - if i want to throw away another year or so of my money on rent
<rqou> eh, home ownership is overrated anyways :P :P
<azonenberg_work> in my use case it's highly valuable
<azonenberg_work> I want to be able to do invasive modifications like insulaiton, climate control, wiring, etc
<rqou> just be a millennial and live with parents :P :P :P
<azonenberg_work> And i dont plan to move, ever, once i get set up
* azonenberg_work facepalms
<azonenberg_work> Note to self
<azonenberg_work> 50-ohm terminating a CML signal Does Not Work
<fpgacraft2> <laincat> lel
<azonenberg_work> that explains why i wasnt getting anything off the io stage :p
<azonenberg_work> there we go, that's out of the comparator at 100 Mbps
<azonenberg_work> And i got even better after playing with the comparator threshold
<azonenberg_work> (also lol A20)
<azonenberg_work> there we go
<rqou> "display" is the worst program ever
<fpgacraft2> <laincat> god dammit
<rqou> anybody know of something else that can just read stdin and show it in a window that i can actually pan
<rqou> ?
<azonenberg_work> um, nope?
<rqou> because panning in "display" doesn't work for whatever reason
<fpgacraft2> <laincat> spent the past like hour prepping for a villager trade and the villager vanished overnight
<rqou> lol
<fpgacraft2> <laincat> there goes my Fortune II trade :< :< :<
<azonenberg_work> lain: lol sucks to be you
<rqou> oh right azonenberg_work when will you join the modded server <strike>and get addicted to it</strike>
<fpgacraft2> <laincat> ^
<azonenberg_work> innnteresting i wonder if this is my comparator's fault? or what
<azonenberg_work> or if its just my scope
<azonenberg_work> ok this is bad, lol
<azonenberg_work> the eye is so weird it doesnt even look like an eye
<azonenberg_work> it looks like massive jitter and i cant tell where its coming from
<azonenberg_work> has to be the comparator...
<lain> yep, that's jitter
<azonenberg_work> yeah but from where
<azonenberg_work> is the question :p
<azonenberg_work> http://i.imgur.com/nwv0HhW.jpg - 100 Mbps, protection only
<azonenberg_work> http://i.imgur.com/aRdyP9G.jpg - 200 Mbps, protection only
<azonenberg_work> http://i.imgur.com/JMPaX5O.jpg - 100 Mbps, protection and comparator
<azonenberg_work> http://i.imgur.com/p0OqkuK.jpg - 200 Mbps, protection and comparator
<lain> my guess? your scope :P
<azonenberg_work> Input signal in all cases is LVCMOS33 PRBS31
<azonenberg_work> why did i not get the jitter in the protection-only case though?
<lain> cleaner waveform / nothing to false trigger on?
<lain> it could be the comparator though
<azonenberg_work> I'm triggering off a separate squarewave clock
<azonenberg_work> phase locked to the PRBS
<lain> oh
<lain> lol
<lain> WELL THEN
<azonenberg_work> With a nice 50 ohm terminator, going into a normal channel (not the ext trig)
<lain> ext trig might be a better option tbh
<lain> but
<azonenberg_work> For lulz let me up drive strength on the sync clock
<azonenberg_work> i had it reduced before i got the terminators
<lain> make the trigger channel visible too so we can see :P
<lain> but yeah my guess is it's jitter from the comparator then, maybe the propagation delay of the comparator is relatively uncontrolled?
<azonenberg_work> sooo stronger drive on the clock didnt help
<azonenberg_work> This is a 1250ps Tpd comparator
<azonenberg_work> jitter should be less than that
<azonenberg_work> that doesnt look like 1200ps of jitter
* azonenberg_work looks closely
<azonenberg_work> 2.5 ps rms random jitter according to datasheet
<azonenberg_work> overdrive and slew rate dispersion typically <50 ps
<azonenberg_work> rise/fall time 160 ps
<azonenberg_work> 40 ps skew rising to falling
<azonenberg_work> This is not a cheap comparator, i cant imagine why it'd jitter this badly
<azonenberg_work> I have 4.7 / 0.47 / 0.01 uF decoupling on both the analog and digital rails
<lain> hm
<lain> and the scope is triggering reliably on the trigger channel, when you view that also with infinite persistence?
<azonenberg_work> innnnteresting
<azonenberg_work> looks like there may be a few hundred ps of trigger jitter
<lain> yeahhh
<azonenberg_work> i wonder if this is in the fpga clock tree or something?
<lain> well
<lain> that looks like the scope itself :P
<azonenberg_work> Yeah thats more likely
<azonenberg_work> given that i am triggering on the clock
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<azonenberg_work> and the clock cycle that initiates the trigger is shown jittery
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<azonenberg_work> that shoul not be possible
<azonenberg_work> Welp
<azonenberg_work> Conclusion: Current IO stage performs well out to 100 Mbps
<azonenberg_work> Data is inconclusive at higher rates
<azonenberg_work> Sound about right?
<lain> yep
<azonenberg_work> So while i know my current stage is way too capacitive
<azonenberg_work> I wont be able to see the difference with this scope anyway
<azonenberg_work> I'll build it, then test it out to 100 Mbps just to make sure it isnt worse (as well as to test the protection still works)
<azonenberg_work> but anything beyond there will have to be done with PRBSes blind just measuring BER on an FPGA etc
<azonenberg_work> i need one more of those SMA-to-0.1" headers and i'll be able to actually do a full BERT loopback on the zybo
<azonenberg> oh, and on top of all that i have done zero testing on the *output* side of it
<azonenberg> All of this work so far has been input characterization
<azonenberg> lain: So based on what you've seen so in this data
<azonenberg> there's no obvious evidence of comparator jitter, right?
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<rqou> hmm i found a typo in the vhdl spec
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<rqou> wow wtf chipwhisperer shipping costs are ridiculous
<lain> ?
<rqou> their store is showing $57 for shipping
<lain> o_o
<rqou> where the heck are they shipping from?
<azonenberg> o_O
<rqou> also $50 for a cable assortment wtf
<azonenberg> canada
<lain> america's hat.
<rqou> oh wtf shipping is cheaper for the non-broken-apart board
<rqou> it's so much cheaper to get that one and then get some sma connectors/cables from digikey
<rqou> they still want $35 for shipping though
<rqou> i hope this is at least "fast mode" shipping
<rqou> i'm so used to "USPS first class package" shipping costs
<lain> haha
<lain> do they say what shipping method it is?
<rqou> "Courier Flat Rate"
<lain> huh.
<rqou> woot i didn't get a cc decline :P
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<rqou> all the CC security mechanisms that they keep inventing seem pretty useless because nobody figured out how to secure online transactions
<whitequark> rqou: 3DSecure?
<rqou> never heard of that
<rqou> "Analysis of the protocol by academia has shown it to have many security issues that affect the consumer, including greater surface area for phishing and a shift of liability in the case of fraudulent payments.[3]"
<whitequark> rqou: basically SMS 2FA for payments
<whitequark> enabled by pretty much every bank in RU
<rqou> i have never heard of this being implemented anywhere
<rqou> maybe the US is just behind as usual
<whitequark> yup
<lain> mmm
<whitequark> "a shift of liability" that's true
<whitequark> but also chipped cards have the same issue
<lain> yeah lol
<rqou> heh, chipped cards had the liability shift happen how long ago?
<lain> like when chip first hit the US and banks were denying fraud claims because "chip can't be hacked"
<lain> they finally backed off when they realized how wrong they were
<lain> by brute legal force :P
<rqou> to be fair, most large brick and mortar retailers finally have chip readers now
<lain> rqou: many are still disabled though
<lain> because "It's confusing"
<lain> I tried to use mine the other day at several major retailers
<lain> and they all HAD the chip readers
<whitequark> I can actually order a card with no chip still, I believe
<rqou> most of the retailers i've seen around here have it enabled
<whitequark> it's weird
<lain> but the machine wouldn't read mine, and the cashiers all said "management won't turn those on because they slow down the line"
<rqou> yeah idk why the heck they're so slow
<lain> and I wanted to respond "then you can tell management where to shove it" and walk out without paying :P
<lain> but you know, priorities.
<whitequark> rqou: because of online verification
<lain> yeah
<rqou> my yubikey ssh auth isn't nearly as slow
<lain> it's a round trip or two probably
<whitequark> worse
<rqou> ssh auth is probably several round trips too, why is it still so much faster?
<whitequark> I've seen readers that actually establish a new ppp session every time
<whitequark> fortunately those are dying out
<whitequark> I think they actually repurposed the ones that were supposed to connect over GPRS, for mobile terminals
<azonenberg> lol
<azonenberg> one of my local stores has a reader so out of sync with the PoS
<lain> ffs
<whitequark> but... the mobile terminals we have *today* here are bloody fast
<azonenberg> you insert the card
<azonenberg> it says "approved"
<azonenberg> after maybe 500 ms
<azonenberg> then a second later "processing, do not remove card"
<lain> hah
<whitequark> I don't really know, I just assume it's the usual embedded device clusterfuck
<rqou> so here is me doing ssh with a yubikey:
<rqou> $ time ssh rqou@robertou.com "date"
<rqou> Sun Feb 5 06:48:40 UTC 2017
<rqou> real0m1.818s
<rqou> user0m0.020s
<rqou> sys0m0.004s
<rqou> so <2s
<rqou> why does my chip card take like 10+ seconds to authorize?
<whitequark> rqou: does it establish a new ppp session?
<lain> because people are stupid.
<rqou> i have no idea
<azonenberg> rqou: i dont see why they even have to do it online
<whitequark> it usually prints something to that extent
<azonenberg> terminal: random transaction ID provided by store system
<whitequark> azonenberg: avoiding double-spend
<azonenberg> card: signature(transaction ID, dollar amount)
<azonenberg> done
<whitequark> the card doesn't know its balance
<azonenberg> it's a credit card
<whitequark> uhm, no
<lain> CCs have limits
<whitequark> it's a plastic card
<azonenberg> sure
<lain> but also my debit has chip
<whitequark> it could be bound to a debit or a credit account
<lain> and a debit won't auth unless funds are available
<whitequark> which determines how it works
<whitequark> at least, in RU
<azonenberg> Fine, but old style stripe readers did it online, no?
<lain> well, actually I lied, I had a Chase debit once that would auth no matter what
<rqou> in the US most debit cards can be charged via the credit networks
<lain> that was fun, and by fun I mean awful.
<rqou> i've been told that is uncommon elsewhere
<lain> rqou: yes but many won't auth even via credit unless the funds are available
<lain> afaik
<lain> maybe that's just been the cards I've used though
<rqou> yeah sure
<azonenberg> you can still double-spend since transactions often take time to process
<azonenberg> i've over-drawn debit cards before by accident
<rqou> but apparently i've heard in other countries credit/debit cards are very distinct
<lain> same
<rqou> not processed via the same network
<lain> rqou: ah ok, interesting
<rqou> in general the us banking system is dreadful
<lain> yes
<lain> while this isn't abjectly bad, it's ... interesting: http://engineering.gusto.com/how-ach-works-a-developer-perspective-part-1/
<rqou> also security here is abysmal
<rqou> a major brokerage firm here still has passwords that are a max of 8 characters and are case insensitive
<rqou> amazingly they do have optional 2fa
<rqou> using some kind of hardware token (symantec VIP?)
<rqou> lain: "Your ODFI will set you up with a secure FTP server"
<rqou> um...
<rqou> that doesn't sound particularly well secured
<azonenberg> My understanding is that the entire banking system is primarily secured by trust and an unwritten rule of governments to not mess with it
<rqou> that's what i thought too
<azonenberg> like, not siphoning money from one gov's treasury to another etc
<azonenberg> by wire transfer etc
<rqou> "It's important to note that ACH is not a real-time system. Rather, things are processed in batches at 6:30pm EST, 12:30am EST, and 3:00am EST. "
<azonenberg> And this is why checks take forever to clear
<azonenberg> And why when i pay my credit card off, the available balance on my card increments
<azonenberg> then the balance drops
<azonenberg> one happens earlier than the other, i forget the order
<azonenberg> and then the money leaves my checking account
<azonenberg> but for a day or so it looks like the money doubled
<lain> rqou: iirc it's SFTP
<lain> and I think it actually uses key auth? but I forget
<rqou> it still feels very duct-taped together
<lain> yeah totally
<rqou> um... "An ACH file is nothing more than a file with multiple lines of ASCII text, each line 94 characters in length."
<lain> yyyyep
<lain> duct tape
<lain> most of this originated in the mainframe days, and I'm sure nobody wants to propose a new system if there's a non-zero chance it would break :P
<rqou> BTC? :P
<lain> BTC is.. problematic :P
<whitequark> lol btc
<rqou> but think about how many russians/ukrainians learned about asic design because of it! :P
<lain> maybe that was the plan all along
<lain> personally my favorite conspiracy theory is that bitcoin was a very clever way to flood the market with relatively cheap hashing ASICs :P
<lain> but that seems far-fetched
<rqou> i thought those asics aren't very general purpose though?
<lain> they aren't afaik
<lain> but if you wanted to accelerate a specific hash in hardware
<lain> just design a cryptocurrency around it and hope it takes off?
<lain> :P
<lain> sadly even the armies of asics some of the larger mining places have (had? is this still a thing?) wouldn't put a dent in anything real, I suspect
<rqou> hmm so apparently ach can only move 10^8 dollars at once?
<rqou> er, 10^9-1 actually
<rqou> or, 10^9-0.01
<rqou> math is hard :P
<lain> haha
<lain> my bank limits my ACH to $10k per transaction, that's all I know
<azonenberg> My bank also limits online check uploads to 10K
<rqou> that's because you're not @realDonaldTrump :P
<azonenberg> I had a problem once when i closed an account at another bank and tried to move here
<lain> I had to resort to wire transfers to pay for manufacturing at peak production
<azonenberg> the check wouldn't clear
<lain> also
<azonenberg> i had to physically mail the check to the bank (they don't have any branches near me) to deposit it
<azonenberg> o_O
<lain> it's weird going from being totally broke to having to figure out how to move more money than you ever made previously in ONE TRANSACTION :P
<lain> I was moving like >1 year salary in one go
<lain> it was a brief but fascinating experience
<azonenberg> Lol managing a business will do that to you
<lain> yeah
<azonenberg> i think 12K is the largest single transaction i've ever had to make
<rqou> yeah, so far i have no experience with having the monies :P
<lain> I think the largest I've made was close to $40k
<lain> well, outgoing.
<lain> if you count accepting the kickstarter money for my first product, that was $66k
<lain> but that was handled by amazon
<lain> also I learned the hard way: do not do a kickstarter at the end of the year
<lain> don't.
<rqou> why not?
<lain> I mean, technically it's fine, but the paperwork is a bitch for taxes
<lain> so in my case what happened was
<rqou> ah
<lain> I suddenly had $66k in income
<lain> but that was technically product sales
<lain> for a product that hadn't begun production yet
<azonenberg> and you havent spent the money yet
<lain> right
<azonenberg> oh fun
<lain> so I had huge income and no expenses
<azonenberg> Then the next year huge expenses and no income?
<lain> my tax lady figured it out though and made sure I didn't have to pay on it
<lain> she spent like a week
<lain> and found some obscure tax code
<azonenberg> easy fix: form an LLC before your next kickstarter
<azonenberg> funnel the money through that
<lain> azonenberg: no
<lain> I already did that
<lain> that wasn't the issue
<azonenberg> the money was in your name?
<rqou> my parents still have their tax person do my taxes
<rqou> allows better optimizations
<lain> no the money was in the LLC
<rqou> also, LLCs in CA cost $800/yr
<lain> but it's a uh... jeez it's been a while
<rqou> minimum (franchise tax)
<azonenberg> i think cash vs accrual accounting is the difference here?
<lain> it's filed as a disregarded entity
<lain> well
<lain> the issue is... she had to find the tax code that let her declare it as payment for goods, without having goods on hand
<lain> which is a weird/obscure thing
<lain> iirc
<lain> because normally you have to like, sell people goods or services in exchange for the money and then you can claim the latter as expenses, but I didn't know what the expenses would be yet, etc
<lain> I dunno
<lain> it was a clusterfuck :P
<lain> but also, it's important to know the different types of LLCs
<lain> if you're a single person doing an LLC, you can /technically/ form a corporation, but that requires VERY SPECIFIC paperwork and recordkeeping
<lain> you need to log everything
<lain> if you have meetings (with yourself. yes really) you need to record the minutes for those meetings
<lain> (yes, really)
<lain> you need articles of incorporation or whatever
<lain> which have to be filed
<azonenberg> Yeah i know i've been through some of that
<azonenberg> as a 2-person partnership
<lain> yeah
<lain> it gets fucky with a single person lol
<azonenberg> Not doing it again
<lain> OR you can be lazy
<lain> and file as a disregarded entity
<lain> meaning the money technically all goes through you, since you're the only one
<lain> but you accept it on behalf of the LLC
<lain> but there's some risk
<azonenberg> ah
<azonenberg> I'm done with corporations and startups
<azonenberg> i'm a lab rat
<lain> iirc if you file as disregarded entity you still get most of the protections, but it can get weird if you don't adequately separate the funds
<lain> ideally you want to keep separate personal and business accounts and pay yourself a salary
<lain> if you don't do that, you need to be able to account for every single transaction
<lain> in order to benefit from LLC protections
<lain> otherwise they can say you mingled personal and business funds and just appropriate it all
<lain> e.g. if you got sued and lost
<lain> business is hard
<lain> I'd rather just dick around in a lab, but I hate working for other people so here I am
<lain> :P
<lain> but eh, I have a tax lady, she takes care of the confusing tax stuff for what I consider not nearly enough payment :P
<lain> both parents are self-employed, and dad is a banker, so I've got most of the consulting covered lol
<rqou> i should work on convincing one of my high school friends who studied accounting to do my taxes :P
<lain> haha
<rqou> also, my mom is also an accountant, so there's that :P
<lain> honestly I don't even know how to decipher my taxes at this point
<lain> I'd be screwed if I didn't have an accountant
<lain> she has saved me SO much money
<lain> thousands lol
<rqou> wow "dot" is really slow
<lain> there's so much weird crap, like I bought a laptop for work purposes, but a laptop lasts some amount of time and depreciates over that time and stuff, but you can't write it all off at once
<whitequark> rqou: which output
<lain> you have to write off bits of it over several years based on various depreciation things or something
<whitequark> try -Tsvg
<rqou> i was using svg
<whitequark> oh
<whitequark> welp
<rqou> hmm now imgur is unhappy with me
<rqou> alright here we go: https://goo.gl/photos/wn9tXcWgbZqVcGVw7
<rqou> this is all of the vhdl grammar rules and what rules they reference
<rqou> hopefully with no errors
<lain> asdf
<rqou> oh wait
<rqou> google resized it
<rqou> blargh whatever screw it
<rqou> anyone want the .dot file for this?
<azonenberg> lain: So i didn't get a chance to test the OBUF today
<azonenberg> (or even write the control firmware)
<azonenberg> i want to test that soon though
<azonenberg> b/c i cant do the respin until i've tested everything wrong with this version :p
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<azonenberg> rqou lain ^
<nats`> ok need to send stuff to icestudio creator because I'm puzzled
<nats`> side question is there any timing constraints in yosys tool suite ?
<whitequark> not really
<nats`> oO
<nats`> so it's just placing stuff around without any timing analysis ?
<whitequark> no
<whitequark> it tries to get the critical path shorter
<whitequark> but it doesn't have *constraints* per se, it just gives you its best attempt
<nats`> but it doesn't even take the clock speed input
<whitequark> indeed
<nats`> oO
<nats`> maybe that's why my design doesn't run on it
<whitequark> like I said, it just tries to make the slowest part of the design as fast as possible
<whitequark> then you can figure out how fast is that with icetime
<nats`> but that has no sense
<nats`> the hold time is as important as setup time
<nats`> you can make things fucking fast if you don't respect hold time
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<nats`> so I have to install an external yosys and try to synthesis my design with it
<nats`> because icestudio doesn't help much
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<whitequark> nats`: I think it assumes setup==hold?
<cr1901_modern> How does it know the critical path without doing a timing analysis? Guess?
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<qu1j0t3> was someone in here asking about analog computers recently?
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<azonenberg> nats`: I do "shorten the longest path" placement in gp4par with no knowledge of actual frequencies right now
<azonenberg> there is an open ticket for timing-driven placement
<nats`> azonenberg so basically a design could be simply in timing error
<nats`> because the module I made for icestudio doesn't work but this code is ok in simulation and on spartan/zynq/artix
<nats`> a tiny led crontoller
<rqou> azonenberg: recommended vendor for bnc/sma/etc cables?
<azonenberg> rqou: i've been using crystek microwave hand-formable cables from digikey
<rqou> DC-12GHz? nice
<azonenberg> They're not cheap, i recall $10ish per cable, but they get the job done
<azonenberg> I've also been using a few things from Zebax
<rqou> and for crappy ones?
<rqou> e.g. dc-2ghz or so?
<azonenberg> in particular, 0.1" headers to SMA
<azonenberg> Those are rated to 2 GHz but the big limit there is the 0.1" header
<azonenberg> But i needed to get a PRBS out of a Pmod for testing b/c i didnt have any fpga boards w/ SMAs :p
<azonenberg> I have some SMA to BNC adapters but forget who made them
<azonenberg> my inline terminators came from amazon i think, dont recall vendor
<rqou> i'm thinking i need a pile of crappy sma cables up to 3ghz or so
<azonenberg> my attenuator is crystek as well
<azonenberg> I bought good stuff because i didnt want to worry about it being a source of measurement error, plus i might be using it at higher speeds in the future
<azonenberg> i dont want to try to remember what's what
<rqou> for the chipwhisperer i just ordered and for the minivna that i got a while ago and never set up :P
<rqou> these all cap out at around 3ghz
<azonenberg> did the chip whisperer not have cables included? mine did
<azonenberg> but i also got a starter kit w/ target board etc
<rqou> the one that has cables included ends up costing like $100 more
<azonenberg> http://miniradiosolutions.com/minivna-pro/ 100 kHz to 200 MHz
<rqou> you can order the non-split-in-half version for $250 + $35 shipping
<rqou> no i have the tiny
<azonenberg> that isnt even good enough for UHF
<azonenberg> oh interesting
<azonenberg> the tiny is better?
<rqou> yeah for some silly reason
<azonenberg> How much is it?
<rqou> a lot
<rqou> but not nearly as much as a "real" vna
<rqou> :P
<rqou> $560?
<azonenberg> Might be interested in having you characterize my next-gen io board then
<rqou> hmm i actually never thought about abusing a vna to test the io board
<rqou> that might actually work
<azonenberg> i just want insertion and return loss on the protection network
<azonenberg> ignore the buffer
<azonenberg> Which should be easily calculated from s-parameters
<azonenberg> and a vna should give you that
<rqou> yeah that is actually what a vna is designed for :P
<rqou> i was going to use it for characterizing ham antennas that i haven't built yet :P :P
<azonenberg> Lol i see
<rqou> no wonder edmund at 33c3 said that i have a vary large project shelf
<azonenberg> Lol
<rqou> i want to at some point experiment with mimo and/or phased arrays, except i know nothing about how any of that works :P
<rqou> ham radio with TxBF/RxBF?
<rqou> (other than ham radio wifi of course)
<azonenberg> I want to mess with a phased array too
<azonenberg> but i wanted to do it in ultrasound or even audio
<azonenberg> so you could debug the beamforming by ear
<rqou> lool
<rqou> btw why do ham people not use enough digital technologies like 2.4ghz point-to-point links?
<azonenberg> A lot of hams are old fashioned and dont like digital
<azonenberg> but a few arent
<azonenberg> there are some clubs that do things like 10 GHz microwave as well
<rqou> iirc using the ham power rules for 2.4ghz (PEP vs EIRP) allows many orders of magnitude more power vs ism
<azonenberg> Yes it does
<rqou> hmm i wonder how many people in the US are actually technically operating their 2.4ghz ism equipment illegally?
<azonenberg> massively so, a couple of watts
<rqou> e.g. switching the antennas breaks type approval
<azonenberg> i forget the ham cap
<azonenberg> A lot :p
<rqou> half of my wifi equipment is actually illegal (no type approval) :P
<azonenberg> People have actually run 802.11 over ham, btw, at tens of miles range
<azonenberg> line of sight
<azonenberg> pretty impressive how far some folks have got
<rqou> oh funny thing i remember reading while looking at german ham radio laws
<rqou> iirc the german laws say that there are no rf-related regulations above 300ghz, but
<azonenberg> us has similar, i forget the cap
<rqou> it spells out that you must obey laser safety regulations
<azonenberg> lool
<rqou> us is also 300ghz
<rqou> but doesn't mention laser safety
<rqou> "do not look into free-space optics setup with remaining eye" :P
<balrog> rqou: are you familiar with dual band wifi hardware for injection?
<rqou> injection?
<rqou> packet injection?
<balrog> yeah
<rqou> i have a mediocre ath9k card lying around for that
<rqou> i don't think i ever got the software stack fully working
<rqou> afaik you're a bit SOL if you want to do 802.11ac packet injection though
<rqou> poke felix_ about the ath10k firmware RE :P
<balrog> mainly just need 5ghz
<balrog> and some power
<rqou> yeah i just have some random oem ath9k laptop card
<rqou> hmm i'm curious what your intended use case is
<rqou> wiiu controller hacking?
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<rqou> offtopic: has anyone heard of bondic uv-curing resin?
<rqou> somebody at 33c3 was showing it off
<rqou> anyone know what chemistry it is?
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<davidc__> rqou: never heard of them specifically; but there's lots of UV-cure stuff out there
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<rqou> apparently it's shit for its advertised purpose
<rqou> probably works better than hot glue for doing haxoring
<azonenberg> rqou: i need to get a good hot plate or something in my lab
<azonenberg> Apparently my epoxy crystallizes if you store it at low temps
<azonenberg> like, it doesnt polymerize
<azonenberg> but the monomer forms crystals and wont react right
<azonenberg> turns into a paste
<azonenberg> the fix is to heat it to ~150F for a few minutes
<rqou> right, hot plates
<rqou> :P
<rqou> tl;dw: most hotplates are crap and overpriced
<nats`> I use a 12V and a 48V ptc heater from ebay
<nats`> to mount small pcb
<nats`> and an oven for bigger one
<rqou> but i think azonenberg wants a chemistry lab type of hotplate, not a pcb reflow tool
<rqou> azonenberg: design our own and send nurdrage one? :P
<azonenberg> rqou: yeah i do
<azonenberg> i have a reflow oven already
<azonenberg> and yes most hot plates are
<nats`> ah lab hotplate
<nats`> best one are used one on ebay you repair :)
<azonenberg> i saw amazon reviews of some saying they didnt even have enough power to beaker a few hundred ml of water
<nats`> made it for few of them :)
<rqou> you should watch at least the first video
<rqou> it's pretty great
<lain> nurdrage <3
<rqou> nurdrage is great at ebay :P
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<lain> also OT, lol the differences in this game across platforms: https://youtu.be/nKK9r2Ct0D8
<davidc__> I've never understood why a lot of lab equipment is as expensive as it is
<davidc__> (especially things like hotplates with remote sense / etc)
<davidc__> its not like the cost of a connector, thermocouple digitizer and a bit more compute breaks the bank.,
<davidc__> Startup anyone? ;)
<lain> haha
<qu1j0t3> build a better mousetrap
<davidc__> (I'm half serious)
<azonenberg> davidc__: yeah i dont either
<azonenberg> my only guess is, low volumes and high profit margins to compensate
<qu1j0t3> well, there are overheads -- which does a lot of kickstarters in right
<davidc__> I think it also might be distrbution channels
<davidc__> those guys usually want at least 20-50% markup
<davidc__> and they probably have a lot of the volume market locked up
<lain> yeah :/
<lain> I'm always amazed at the margins for distributors in various industries
<lain> they seem to always either be way fatter or way thinner than I expect
<lain> nand flash storage devices like microSD cards and usb drives have stupefyingly thin margins
<nats`> lab equipment needs a lot of certification too
<nats`> and calibration is a pain in the ass
<nats`> the devil's in the details
<nats`> it's easy to make a voltmeter
<nats`> it's fucking hard to make a 0.0000001% one over a wide temperature range
<nats`> it's the same for a lot of lab gear
<nats`> it's easy to make a logic analyzer, way more hard to make a dumbass resilient input that can accept hundred of Mbps
<lain> shots fired
<nats`> I work everyday with those kind of gear and I finally accept they are really hard to make
<nats`> plus like already said... low volume
<azonenberg> nats`: "dumbass resilient input that can accept hundred of Mbps"
<azonenberg> lol i'm trying to design exactly that
<azonenberg> i know firsthand how nontrivial it is :p
<nats`> thats what I was taking this example :D
<nats`> I could have take the example of "low cost" SDR too
<nats`> those low cost SDR skip all the difficult part of designa real good radio system :D
<nats`> *that's why