<lain> lol
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<pie_> :I
<pie_> i was gonna say i cant wait to be a well paid software dev but that would suggest im an otaku given the context
<pie_> also i probably wont be a software dev nor will i likely be well paid xD
<pie_> i only fall for real android women
<jn__> i prefer iOS women
<jn__> *badum tsss*
<mtp> same tho
* lain slaps knee
* qu1j0t3 slaps lain's other knee
<lain> lol
<pie_> oh shit
<pie_> i need to go sleep
<pie_> took me way too long to get that
<qu1j0t3> rookie error
<jn__> heheh
<qu1j0t3> in middle age i've got this down
<pie_> if you guys like airheads...
<pie_> android just needs some rooting and a bit of polish :P
<whitequark> rqou: I'm not using a Soxhlet extractor in *my* living room.
<pie_> and just yknow, not using it.
<whitequark> it's someone else's.
<whitequark> though I do live there.
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<rqou> pedantic
* whitequark -pedantic -Wall
<rqou> -Werror? :P
<whitequark> I could literally eat your laundry!
<whitequark> .. though I probably shouldn't
<rqou> this one weird trick to make packaging your code hard! distros hate him!
<pie_> -PIE
<qu1j0t3> rqou: hahahah
<rqou> so whitequark why aren't you in HK? can't get anything done over lunar new year? :P
<azonenberg> this was the weirdest thing
<azonenberg> tab complete stopped working on this laptop
<azonenberg> i wonder if it was trying to create an x window for some reason and failing? :p
<azonenberg> after a reboot its fine
<lain> lol
<lain> theory: maybe it's a bad bit in ram? :D
<rqou> lol my desktop has ecc ram
<rqou> no MCEs yet
* rqou knocks on wood
<lain> I want ecc on all future builds, except for the handheld cause it doesn't support it
<lain> although if I switch to the less-portable-friendly atom variant of the cpu I'm using, I could have ecc :P
<rqou> the nas i just built has ecc technically
<lain> "technically"?
<rqou> but apparently nobody wrote the EDAC driver for non-xeons
<rqou> so it has ecc and corrects errors but can't tell the os about any errors it corrected
<lain> o_O
<lain> lol
<rqou> except presumably you get an MCE on an uncorrectable error
<rqou> apparently the skylake pentium/celeron don't share the EDAC code with the xeons
<rqou> programming is hard
<rqou> i apparently also can't use the sr-iov feature of the intel nic until ubuntu drops the next lts hardware enablement either
<rqou> apparently somebody at intel wasn't paying attention when designing the sunrise point / union point pch
<rqou> so the pcie acs config registers are in the wrong offset
<lain> why am I not surprised
<rqou> so for a long time the kernel couldn't enable pcie acs isolation
<rqou> and apparently intel forgot to tell the linux people about this problem
<rqou> at some point somebody dug through the errata and found this
<rqou> so kernel 4.8 enables acs correctly
<rqou> but ubuntu server lts is still on 4.4
<digshadow> rqou: I'm on a shitty laptop right now that crashes constantly and generates MCEs
<digshadow> tried to upgrade the CPU but new CPU doesn't seem to work well
<lain> digshadow: what laptop?
<digshadow> W520 w/ i7-2920XM
<lain> ah
<digshadow> it also has pieces of the case missing
<lain> I had a /weird/ issue with my W540, turned out to be shitty firmware in the o2micro sdcard reader. disable that, everything is fine
<digshadow> well, thats part of the issue
<digshadow> I think some of the issues are ubuntu/linux bug
<digshadow> but I have another w520 that doesn't have near as many issues
<lain> always fun when issues vary with what should be identical machines
<digshadow> yeah...now that I recall
<digshadow> I actually swapped hdd between them
<digshadow> and one of them experienced graphical lockups, other didn't
<digshadow> both running ubuntu 14.04
<digshadow> can't explain that one
<lain> lol
<lain> with my W540 the symptom from the sd card reader was a full hardlock - stopped responding to keys, graphics froze, the whole thing just locked up fully
<lain> before I knew it was the sdcard reader, I had RMA'd the thing and they literally replaced everything except the lcd panel
<lain> the case, keyboard, trackpad, motherboard, everything
<lain> didn't change anything - damn thing still froze up at least once a week
<lain> by that time I had also tried swapping ram and ssd and so on, to no avail
<lain> was only by fluke that I discovered it was the sdcard reader -.-
<rqou> hmm apparently the ubuntu 16.04.2 hwe kernel should be out in 3 days
<digshadow> heh
<lain> also the w540 design is stupid
<digshadow> rqou: was thinking of trying to switch to u16 to see if some of the glitches went away
<lain> no activity LEDs whatsoever
<digshadow> lain: w520 has the last industrial design I like
<lain> yeah
<digshadow> w530 started screwing with the keyboard
<rqou> i run debian sid on my non-servers
<digshadow> well, more than I really cared for anyway
<lain> honestly I like the new keyboard
<digshadow> w540?
<lain> yeah
<lain> the trackpad can go to hell though
* digshadow looks
<rqou> i would rather have subtle breakage continuously than massive breakage periodically
<digshadow> I like real buttons on the trackpad
<lain> the w540 trackpad is an abomination
<lain> yeah, same
<lain> I can ONLY use this thing with an external mouse
<lain> I normally use the nub mouse + buttons above the trackpad
<lain> but they "buttons" (the whole trackpad is a button, they use touch sense to see which button you're "pressing") are broken on this
<lain> they almost always detect wrongly for me
<lain> unusable.
<digshadow> hmm interesting w530 and w540 keyboards are very different
<lain> w540 has full numeric keypad
<lain> which I use frequently
<digshadow> and real F keys
<digshadow> still, theres something to be said for w520 using a semi standard desktop like keyboard layout
<digshadow> w/o the numpad
<digshadow> for home, end etc
<digshadow> i don't use those much though
<digshadow> so meh
<digshadow> but the f keys bothered me
<azonenberg> yeah i dont use numpads really at all
<azonenberg> although my t540p has one
<digshadow> azonenberg: you don't use s76 anymore?
<lain> but here's another design stupidity: the capslock key has a little hole for an led to let you know when it's on (good). the numlock key doesn't. WTF
<azonenberg> they kinda squished the keyboard, i dont like it quite as much
<azonenberg> digshadow: my s76 died, $WORK issued me a stinkpad
<azonenberg> i do not currently have a functional personal laptop
<lain> but anyway this is why after the atom mobo I'll be doing my own laptop, if I can still stomach working with intel cpus by then :P
<lain> tired of existing options
<rqou> novena? :P
<lain> rqou: novena is underpowered and ARM
<azonenberg> lain: I came up with an idea a while ago for a laptop that would be an aluminum body (not a unibody - TiG welded diamond plate w/ visible weld beads)
<lain> ARM is a novelty at this point as far as I'm concerned. I like that they did it, and novena is neat, but I don't think it's practical for what I want
<azonenberg> containing a smartphone/tablet class mobo in one tiny corner, a large eMMC and/or uSD for storage
<azonenberg> a power-efficient display, i was looking at pixel qi at the time but idk if those are still around
<digshadow> i do have a carbon x1 at work though which I do generally like
<azonenberg> Then the whole rest of the laptop would be stuffed full of batteries
<lain> pixel qi, ahh man that was neat back in the day
<lain> haha
<azonenberg> i was hoping for 5W power consumption doing light web browsing etc
<azonenberg> or coding (not compiling)
<azonenberg> and 150+ Wh battery capacity
<azonenberg> the goal was something you could charge once or twice a week, if that
<lain> I will probably go for machined alu for mine, and it's going to be a powerhouse.. but I want a soft touch coating on it, like the old thinkpads
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<azonenberg> oh so the other thing
<lain> I know my fabrication place can do it, I have no idea what it's going to cost :P
<azonenberg> i wanted the mobo and LCD on polyurethane foam or similar shock mounts
<azonenberg> and IP67 connectors everywhere
<azonenberg> The goal was something you could throw in the back of a pickup
<azonenberg> and it'd be fine the next morning
<azonenberg> And instead of having a little slidey-thing to hold the lid closed when not in use
<rqou> why not just buy a toughbook?
<azonenberg> there'd be a hasp you could slip a padlock through :p
<azonenberg> rqou: the fun of designing my own, plus toughbooks were too power hungry and not enough battery last time i checked
<lain> lol
<azonenberg> I wanted something that could be used for extended periods of time off the grid
<azonenberg> was going to put an LTE modem or something in it
<lain> azonenberg: that thing is going to be ugly as sin
<lain> :P
<azonenberg> lain: My design inspiration was this http://www.autoaccessoriesgarage.com/img/group/main/34/3407_1_lg.jpg
<lain> yeah I'm not a fan of diamond plate lol
<azonenberg> the plan was to build something the size of an old-school gaming laptop
<azonenberg> so 1" or more thick
<azonenberg> stuffed to the gills with batteries
<azonenberg> in separately machined battery compartments
<azonenberg> with blow-out panels to relieve overpressure in case of a single cell failure
<azonenberg> the rest of the laptop would be fine :p
<azonenberg> Like how tanks store ammo
<azonenberg> I never had the time to do the mechanical engineering to see how much padding and armor i'd need to reach the level of ruggedness I wanted though
<azonenberg> I was dreaming of something you could throw out a 2nd floor window
<azonenberg> and it'd chip the concrete when it hit the sidewalk
<azonenberg> but otherwise be fine
<lain> lol
<rqou> hmm i just checked an plugging my 10gbe card into the pch pcie ports on my nas build might cause a bottleneck
<lain> asus makes a pretty good laptop in terms of a good resolution on the screen, matte display, small size... zenbook I think they're called
<lain> dad got one, it's quite nice, except for one issue
<lain> the case is a thin metal (stamped I wonder?)
<rqou> but plugging it into the cpu pcie ports makes sr-iov not work
<azonenberg> i want a laptop with a SFP+ interface
<rqou> hmmm
<lain> and it was uneven
<lain> so it'd wobble on a flat surface
<lain> I uh...
<azonenberg> lol
<lain> just took it and carefully bent it back into shape
<lain> and it's been fine ever since
<lain> but it's unnerving, grabbing a thin laptop and just kinda.. twisting it
<lain> other than the case wobble (which forums suggest is a common issue with zenbooks), it's been a fantastic machine for him though
<azonenberg> ooook time to work on splash for a little bit
<azonenberg> Some time soon i wanna get a gp4par flow for splash set up
<rqou> hmm dumb question: if i will only use one port, connecting a 10gbe card to a pcie 2.0 x4 slot should be enough bw, right?
<jn__> azonenberg: what's splash?
<rqou> that should be 20gbps raw
<azonenberg> probably? i mean you could theoretically hang a high end gpu off a pcie 1.0 x1 slot, lol
<rqou> lol, i meant without the pcie interconnect being a bottleneck
<azonenberg> jn__: The build system i'm making for antikernel
<azonenberg> jn__: parallel builds, caching, automatic toolchain discovery... lots of fun features
<azonenberg> but its not quite usable yet
<felix_> ugh, o2micro. that company seems to make only really shitty chips. i had a laptop with a o2micro firewire host controller. expectation: the chip should work with the generic firewire ohci driver, since it's a firewire ohci controller. reality: if you plugged in any firewire device windows crashed within a few seconds.
<rqou> and then between the pch and the cpu the dmi3.0 link would be 32gbps raw
<rqou> which leaves just enough bw for sata to work
<rqou> hmm, maybe i should put an addon sata host controller in the "gpu" pcie slot :P
<rqou> what else would be useful on a nas-type of box?
<felix_> sent the device iirc 3 times to the manufacturer who just put in a fresh mainboard every time, but didn't test the firewire port since they didn't have any firewire device. and then the manufacturer was like: nah, it's not more broken than it is fresh from production and we can't test it, so it's not our problem. swapped laptops with my father then to get another machine (that had some other really annoy
<felix_> ing problems. i spent maybe a week debugging really weird stuff and eventually bought a macbook...)
<lain> felix_: glad I'm not the only one with that experience lol
<lain> felix_: also while debugging the issue a friend looked at the o2micro drivers, they are full of stuff like debug prints in the middle of critical loops........
<rqou> yeah i use a macbook because (at least the previous gens) they were decent hardware and didn't have too many stupid hardware issues
<felix_> dafuq
<lain> that's the only reason I suspected the o2micro chipset - the driver BSOD'd on me one day
<lain> so I switched to generic MS drivers, but still had crashes. then I disabled the device entirely, and the crashes disappeared.
<lain> after several months I re-enabled the device just to be sure, and the crashes returned.
<whitequark> rqou: buying drugs (the legal kind)
<whitequark> in HK I'd have to deal with, like, insurer, or something
<whitequark> fuck that
<whitequark> too much talking to people
<lain> so definitely the o2micro sdcard chipset is to blame, it must be hardlocking pcie or something, I don't know how all that works but it's doing Something Bad™ for sure
<rqou> hmm i've never had this problem
<rqou> right, because i'm an HK resident :P
<felix_> oh, now i remember the second level dell support rejected the issue, since the crash was in the driver of my audio interface. never got a kernel dump when plugging in a firewire disk, since the system didn't even bsod with that, but just completely froze
<lain> felix_: lol
<rqou> who uses firewire other than to conduct dma attacks?
<felix_> professional audio interfaces
<rqou> right, those exist
<rqou> i like to jokingly call firewire "thunderbolt 0"
<mtp> i had a firewire DVD burner
<felix_> lower latency than usb2
<lain> felix_: when I RMA'd my lenovo w540 (with the o2micro issues), the facility it went to wasn't lenovo. it was uh... I'll remember it eventually, but it was a third party generic repair warehouse place
<lain> they just triaged the parts, didn't actually test replicating the issue
<felix_> yeah, it wasn't dell itself either
<felix_> good thing with that dell machine (core2duo generation) was that linux worked quite well on it. the firmware of the toshiba device i got when swapping laptops with my father had some weird bugs and linux didn't work well with it
<felix_> iirc that thing has 3 different methods for setting the screen brightness and the method the kernel uses only works before the first sustem/resume cycle and not afterwards. oh and when i shut down the machine, it sometimes powered on again after 30 seconds or so. i mean it was shut down and no rtc wakeup timer set...
<lain> lool
<rqou> at one point i had an hp touchsmart tm2 laptop with a nice set of bugs all around
<rqou> it was a very early *) touchscreen *) dual graphics laptop
<rqou> you can imagine what happened
<rqou> :P
<lain> lol
<felix_> oh, and the dell machine had a express card slot. it shared an interrupt with the ahci controller though and every time ableton or protools did some heavy disk access, the audio began to stutter. well, maybe 2 months after i got the next device i found out that you can supply windows some dsdt to use it instead of the dsdt provided by the firmware
<rqou> so i never understood how hacking the dsdt can change interrupt routing
* felix_ stays away from laptops with an additional gpu. imho not worth the hassle
<rqou> isn't interrupt routing determined by wires on the pcb? how does dsdt editing change that?
<felix_> well the dsdt basically contains the information how to set up the interrupt controllers and so the interrupt routing
<rqou> i thought that wires on the pcb determined the routing and the bios just tells the kernel how the wires on the pcb work?
<felix_> that was years ago
<rqou> hmm so this stuff is what makes hackintosh systems not work
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<felix_> you can configure a lot of stuff in the irq routing in the apic/x2apic settings
<felix_> uh, maybe?
* felix_ doesn't know much about hackintoshs
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<rqou> so why is the dsdt necessary at all? why can't the os assign interrupts?
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<felix_> well, if the firmware was engineered well, it would probably do a better job at that than the os would be able to
<mtp> lol
<mtp> no, the firmware expects the Windows drivers to do all the routing
<rqou> meanwhile my system makes linux complain about spurious irqs
<rqou> :P
<felix_> but (insert rant about the really bad quality of (proprietary) computer firmware here) ;P
<rqou> wait, do modern systems have _both_ the 8259 pic and an apic?
<felix_> yep
<rqou> wtf
<rqou> but all of the 8259 and ioapic logic lives in the pch, right?
<rqou> not separate devices
<jn__> x86 is layers upon layers of "backward compatibility"
<felix_> it's x86, so what were you expecting? ;P
<rqou> i thought the ioapic would "pretend to be the 8259"
<felix_> 8259 is in the southbridge
<rqou> so how does pcie msi fit into this picture?
<rqou> and iommu/vt-d?
<felix_> hm, wasn't the ioapic somewhere near the pcie root?! not really sure though
<rqou> i thought modern systems had multiple pcie roots?
<rqou> in the cpu and in the pch?
<felix_> pcie root is in the northbridge/uncore
<rqou> and the pch?
<rqou> is a bridge?
<rqou> also apparently at least on my desktop the apic is a pcie device
<rqou> "00:05.4 PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev 01)"
<felix_> pch is no second pcie root; it includes some bridges though
<rqou> ah, so i have "00:01.0 PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI Express Root Port 1 (rev 01)"
<rqou> and also "00:1c.0 PCI bridge: Intel Corporation C610/X99 series chipset PCI Express Root Port #1 (rev d5)"
<rqou> so the first is the cpu and the second is the pch?
<felix_> msi can be triggered by writing a value to a specific address. the ioapic catches that and then talks to the local apics
<felix_> uh, good question. i'm not really awake any more, sorry.
<rqou> how do msi interrupts map to irq numbers though?
<felix_> that's the job of the apic
<rqou> does the os have to program the apic?
<rqou> or the bios?
<felix_> really good thing about msi is that there's no irq sharing :3
<felix_> hm, there can be multiple ioapics in a system
<rqou> so if i understood it correctly somehow the iommu can fix irq sharing?
<felix_> the acpi tables contain information on how to set up the stuff andthe os does what the acpi bytecode tells it to do. not sure how much initialization the firmware does there; haven't really looked at that part of coreboot or uhm some leaked vendor uefi code
<rqou> isn't that what fail0verflow did on the ps4? use the iommu to unf*ck irqs?
<felix_> iommu doesn't make too much sense without irq remapping, but iirc some processor generation had iommu but no irq remapping
<rqou> yeah iirc the really early ones
<felix_> yep
<rqou> i don't understand how iommu and irq remapping interact though
<felix_> well, without irq remapping, a malicious pcie device can still inject irqs
<felix_> in context of a system with one or more VMs that have some pcie device assigned, that can be quite bad. iirc there was some PoC that this can be used to attack the vm host
<rqou> what about on legacy pci with interrupt sharing? or is iommu not possible in that case?
<felix_> you can't put the devices on one legacy pci bus in different iommu domains
<rqou> ah ok
<rqou> question: is the dsdt supposed to be hardcoded or can it change across boots?
<rqou> afaik devicetree can and does change across boots
<felix_> dsdt should be quite hard coded
<rqou> including reserved memory?
<felix_> not sure if some vendors do ugly things to work around some weird hardware or windows bugs
<felix_> i dunno
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<felix_> hm, wasn;t the reserved memory thing thar e820 thing?!
<felix_> ah, the dmi port (the connection to the pch) is the second pcie root port on the xeon e5 line
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* cyrozap finishes reading backlog
<cyrozap> balrog: The PSoC compilation process is ridiculously complicated. It does lots of code generation, preprocessing, etc. We can write a better, iceStudio-friendly toolchain faster than we could beat Cypress's tools into submission :P
<cyrozap> lain, rqou: Modern GPUs have signed firmware, which is good for avoiding firmware virus persistence, but bad for those of us who want FOSS GPU firmware. I would love to see someone find a signature check bypass exploit for modern AMD/Nvidia GPUs.
<rqou> they have signed ucode, but afaik no signed vbios
<rqou> or maybe they have uefi secure boot signed vbios
<rqou> but you can afaik still patch the legacy x86 vbios code
<felix_> nvidia has signatures on the firmware; amd iirc not
<balrog> cyrozap: are we sufficiently far along understanding the chip?
<cyrozap> balrog: Not yet, I think? But we're getting there. As I've said before, pointfree has been doing most of the work recently, so you should ask him for status updates.
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<azonenberg> So this is interesting
<azonenberg> xilinx bitgen wants to use the PCF file generated by mapping
<azonenberg> why do you think that would be?
<azonenberg> its not making any decisions on placement right? the design is fully roued
<azonenberg> why do constraints matter
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<felix_> bitgen does some drc on the IOs and at least in vivado you can have some bitgen options like bitstream compression in the constraint files
<azonenberg> Hmm but it has all of the iostandards etc in the NCD
<azonenberg> and in ISE, bitstream compression is specified via command line args to bitgen
<felix_> ok. i've sucessfully avoided ise for maybe a year or so ;)
<azonenberg> Lol
<azonenberg> i'm trying to get splash v0.2 up to the point of what splash v0.1 could do
<azonenberg> and then add support for new features like vivado
<azonenberg> i cant drop ISE entirely for now b/c i still have too many spartan6 boards
<azonenberg> until i have enough 7 series hardware that i can stop using s6 i have to at dual-stack
<azonenberg> at least*
<cr1901_modern> Vivado doesn't support s6?
<cr1901_modern> Not that I'm about to install Vivado anyway (no f***ing way I have 50GB)
<azonenberg> cr1901_modern: vivado does not and will not support anything before 7 series
<lain> cr1901_modern: it does not support anything pre-7-series
<lain> lol
<lain> jynx
<azonenberg> beat you by 500ms :D
<rqou> hmm, playing with the power management on my macbook somehow it automatically becomes able to enter pc6 if i unplug the charger
<rqou> and only enters pc3 when charging
<lain> also: internet radio is a great "am I still online?" monitor
<lain> if the music stops, you're probably offline.
<azonenberg> lol
<rqou> i have no idea if it is linux "doing it right" or the acpi firmware is magic
<lain> been listening to di.fm 24/7 for like 17 years
<azonenberg> lain: So, i can now run a full ise xst/ngdbuild/map/par/trce/bitgen flow in splash
<cr1901_modern> Welp, looks like I'll be stuck with ISE for a while (and I imagine Xilinx has enough business sense to keep ISE usable for the foreseeable future)
<azonenberg> i am getting good-looking bitfiles but havent run one on hardware yet as i'm still compiling it on the laptop
<felix_> linux just emulates the bugs of the windows acpi implementation ;P
<azonenberg> (my FPGAs are all in the garage and not currently LAN-programmable due to recabling)
<cr1901_modern> I read as: My FPGAs are garbage
<azonenberg> I have the beginnings of a yosys synthesis flow but it's not done yet
<cr1901_modern> Yes, I agree. FPGAs are garbage :D :P
<azonenberg> Lol
<scrts> azonenberg-> sup?
<azonenberg> o/ scrts
<scrts> long time no see
<scrts> however.. I still stalk you on twitter
<azonenberg> i've been here for a while lol
<lain> cr1901_modern: spartan7 sooooooon
<azonenberg> lain: cant wait
<lain> xilinx released a technical overview vid on youtube today for s7
<azonenberg> anyway, my agenda for the next few days is to get a gp4par flow working in splash so i can build the starshipraider test code with a proper build system instead of shell scripts
<lain> sooooooooon.
<cr1901_modern> lain: BGA only, not interested
<azonenberg> cr1901_modern: but ftg256 is so nice
<lain> cr1901_modern: that is pretty sad yeah, but bga isn't all that hard!
<lain> they have 1mm pitch BGAs, you can do those on oshpark trivially
<azonenberg> lain: also, i need to characterize the output buffer for starshipraider v0.1 cell still
<lain> :)
<azonenberg> gonna try and get that done maybe later tonight
<rqou> i've given up on build systems to the point where most of mine are shell scripts :P
<cr1901_modern> lain: I don't have a reflow oven, cannot afford it, and I don't trust that I can make azonenberg's method work at my house
<azonenberg> at least out to 100 MHz, and verify the voltage level switching etc works properly (I have to write the f/w for that still)
<rqou> i call it the "fuck it" build system
<lain> rqou: lol
<lain> cr1901_modern: fair, I don't have a reflow oven either (unless you count the $20 toaster oven I've used in the past, with a stopwatch and a thermocouple)
<azonenberg> I'm still a few cables short of being able to do a full PRBS loopback
<lain> cr1901_modern: but I do have a hot-air rework station
<azonenberg> but i should be able to do eye plots of the output at least
<cr1901_modern> lain: I can't afford one of those either. Nor do I have the room.
<rqou> i have a chinese reflow oven i still need to hack
<lain> cr1901_modern: ah
<cr1901_modern> I'm VERY skeptical of using macrofab b/c if I make a mistake, that's still a nontrivial $50 down the drain
<cr1901_modern> At least with QFP I can patch if something's wrong
<cr1901_modern> azonenberg: Even if I did have access to your equipment (at work), I doubt I'd be all that good at rework. But you gotta admit, having access to that equipment vs not is a world of difference ;).
<lain> cr1901_modern: yeah definitely when dealing with bga it's a lot harder, sometimes not practical, to patch a mistake
<lain> a friend has done ftg256 on 2-layer oshpark :D
<lain> madness
<cr1901_modern> Oh yea, that's also fun. It costs even more b/c now I have to get a *4* layer board
<rqou> the company my father used to work for managed to patch a mistake on a bga board by drilling through the pcb
<cr1901_modern> So forgive me if I think Xilinx is being hobbyist hostile.
<cr1901_modern> or "small scale hostile"
<rqou> somebody was cleaning up the schematic and accidentally deleted the pull up resistor for the jtag tap reset on a cpu
<rqou> so now the cpu didn't boot most of the time
<cr1901_modern> "most"
<rqou> some technician spent the whole day carefully drilling through the board and patched it
<rqou> frivolous "it looks more neat" cleanup was then banned :P
<felix_> lain: if you like some rather psytrance-y stuff, chromanova might be worth a listen. /me listens to that quite often; not too distracting, helps me to focus and pushes me forward
<felix_> those 200 euro reflow ovens aren't really great, but imho still useable
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<rqou> felix_: looking through the dsdt on my system there is a "OperationRegion (PSYS, SystemMemory, 0x5C736000, 0x0400)"
<rqou> /proc/iomem says "5be7f000-5c77dfff : ACPI Non-volatile Storage"
<laintoo> felix_: thanks, I'll check it out @ chromanova
<rqou> can't this move to a different address across boots?
<felix_> haven't tried, but people used and asparagus cooking pot and a thermocouple for vapor phase soldering
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<lain> felix_: I mostly listen to vocal trance, but sometimes enjoy psytrance-y stuff
<felix_> i like that the chromanova dance stream dosn't have vocals; distracts me too much ;)
<felix_> well, it has some vocals from time to time, but not too much
<rqou> ugh i absolutely hate vocals in music when i need to focus and work on things
<felix_> with the vapor phase soldering you only have to make sure not to heat the galden stuff above the temperature where it disintergrates into some not very healthy stuff
<lain> I normally do, but I find with vocal trance it doesn't tend to distract me
<lain> on the rare occasion that it does, I just switch to the trance channel or etc
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<felix_> uh, already past 4:30 am here; gotta get some sleep; gotta debug some weird kernel oops in a customer's linux driver today and then fix some drywalls and replace the old wallpaper on some walls of the place that'll become the office/lab i'll share with three friends. good night :)
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<rqou> felix_: hmm based on the stuff you linked i think i finally kinda understand how interrupt routing works
<rqou> at least what i'm seeing from lspci, /proc/interrupts, and the dsdt all match up
<rqou> is the ioapic input interrupt number to cpu irq number mapping up to the OS?
<rqou> i think i understand how the dsdt specifies the pcie interrupt to ioapic mapping
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<laintoo> wtf is going on at the datacenter, this is the second time in a week the link has started dropping like that
<laintoo> I bet some 12 year old is ddosing the place because he lost on some game server hosted there :V
<laintoo> they formally banned game servers because they started getting ddoses from angry kids that exceeded their total bandwidth capacity and angered level3 and cogent, because it actually started to choke /their/ lines
<laintoo> this is the world we live in
<rqou> right, i remember krebs talking about this
<laintoo> I think the datacenter is working on upgrading to 30 Gbit capacity
<laintoo> but right now they're at something like 12? or maybe 20, I forget
<laintoo> and they were getting like 40 Gbps ddoses
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<laintoo> re: intel cpus
<laintoo> lol intel fucked up
<laintoo> theregister is usually a bit more inflammatory than necessary, but this is legit
<laintoo> I've read through their proposed hardware fix whitepaper (I think that's behind NDA only)
<laintoo> there is a board-level workaround, it's pretty simple and could be done by someone handy with a soldering iron, but man.
<azonenberg> cr1901_modern: meanwhile
<azonenberg> i prefer bga to qfp
<azonenberg> since bga almost always works the first try
<azonenberg> and qfp frequently bridges
<laintoo> azonenberg: see above intel errata ^
<laintoo> tl;dr the LPC_CLKOUT[0] output degrades over time and fails to meet the Vih/Vil specification for LPC
<rqou> hmm i wonder if this is the errata someone mentioned last mtvre?
<laintoo> I really wonder what the failure mechanism is
<laintoo> the errata was just published on jan 27th
<rqou> but he heard it from a friend of a friend or something
<laintoo> the workaround is to add a 100-150 ohm pullup to the relevant supply rail on that output
<laintoo> which is a shitload of pullup
<laintoo> that pretty strongly suggests the high-side drive fet is toasting itself
<laintoo> (they recommend using the updated IBIS models to simulate your board to ensure you meet Vih/Vil spec with the pullup you choose)
<laintoo> other signals also need that same pullup, depending on "activity level"
<rqou> um...
<rqou> wtf
<laintoo> they give a computation for activity level, saying how much you toggle it or something to determine how fucked you are
<laintoo> so yeah, it definitely sounds to me like the high-side fet is toasting itself
<rqou> how does one even cause such an errata?
<laintoo> but I really wonder how that happens
<laintoo> rqou: man you don't want to read intel errata, I ask that on 90% of them lol
<rqou> i thought most of them were "doing <basically anything> can cause unexpected system behavior"
<rqou> :P
<laintoo> like, activating the SATA 2 or SATA 3 disable soft straps causes the boundary scan chain to return invalid data
<laintoo> how does that even happen
<rqou> pinmuxing is hard
<laintoo> there's a bug on the apollo lake soc I'm using in my mobo where one of the pins basically lacks an output driver, like, I'm pretty sure they FORGOT to include a pad driver on it
<rqou> microchip pic has a lot of dumb errata like "FOOPERIPHERAL<n> does not work. Workaround: use one of the other copies of FOOPERIPHERAL"
<laintoo> azonenberg: thoughts on that errata? intel recommends a 100-150 ohm pull-up to meet Vih/Vil spec, due to some sort of degredation of the IO driver over time
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<laintoo> hmmm it occurs to me... two datacenter outages in 5 days. this is a great excuse to install a dedicated 100Mbps backhaul to the DC :P
<laintoo> and since I'm currently unable to work since I can't access my work repository, that there is a business expense.
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<rqou> hmm it's pretty fortunate that linux now pretends to be windows when reading dsdt
<rqou> if i'm reading this right the dsdt in my desktop still thinks linux is an os that doesn't support xhci
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<laintoo> vendors are dumb :<
<rqou> probably nobody noticed since linux stopped claiming to be linux a decade ago :P
<rqou> interestingly apple has a rather unique piece of dumb in their acpi
<rqou> if you don't pretend to be darwin then the thunderbolt interface is hidden
<rqou> apparently apple tries really hard to insist that the thunderbolt nhi interface doesn't exist
<laintoo> yeah
<laintoo> I've heard that before
<laintoo> probably there was a bug in windows drivers or something and they were like "eh fuck it"
<laintoo> lol
<rqou> no, thunderbolt is "special"
<rqou> apple has another one where the ahci host controller will be put into pata mode if you don't boot via efi
<rqou> that's probably an old driver bug workaround
<laintoo> lel
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* laintoo updates router firmware remotely
<laintoo> because I love when it fails and I have to drive out there
<laintoo> (it's like a 3 minute drive lol)
<laintoo> takes twice as long to find a console cable to get into the router and fix wtfever broke
<rqou> how do you live 3 minutes from a datacenter?
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<rqou> hmm i guess i'm actually reasonably close to hurricane electric's datacenter
<laintoo> it's a smol datacenter
<laintoo> although there's a big professional one right across the street now
<laintoo> care of Notre Dame Uni and their crazy industrial park they're building
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<laintoo> it's by the old Studebaker plant here
<laintoo> the DC I hang out at is across the street from Joe's Bar
<rqou> yeah berkeley has their own colo too that i've never seen
<rqou> hmm: "791369584825Genuine NVIDIA Certified SLI Ready Motherboard for ASROCK X99 EXTREME6 e7bb-Copyright 2014 NVIDIA Corporation All Rights Reserved-394180768352(R)"
<laintoo> exactly where a datacenter is expected to be
<laintoo> lol
<rqou> um...
<laintoo> the property was cheap
<laintoo> used to be some kind of warehouse
<laintoo> well, I guess it's still a warehouse, but for bits instead of things
<rqou> does that look long enough to be a digital signature? force enable nvidia sli on unsupported boards?
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<laintoo> hm?
<rqou> the string i just pasted is hidden in the dsdt of my motherboard
<azonenberg> (20:55:16) azonenberg: laintoo: lol woow
<azonenberg> (20:55:32) azonenberg: to aDC
<azonenberg> (20:55:27) azonenberg: also i want a dedicated backhaul
<laintoo> azonenberg: wb
<laintoo> I see both our lines are bouncing around
<azonenberg> idk if that was a freenode outage or me
<azonenberg> i still could ping quad 8s
<laintoo> didn't see any netsplit
<azonenberg> In any case i'm heading down to the garage shortly to try testing the starshipraider obuf
<laintoo> PSA: youtube has a dark mode, click your profile thingus in the upper right, click Dark Mode and enable it
<laintoo> your retinas will thank me later
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<laintoo> woo! the router came back up
<laintoo> but will it blend.
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<azonenberg_work> interesting
<azonenberg_work> So one of the reasons i've had trouble auto-connecting to freenode
<azonenberg_work> is that something is blocking port 7000 between me and freenode
<azonenberg_work> for some if not all IPs
<azonenberg_work> but i can connect fine over 7070
<azonenberg_work> And only over IPV6
<azonenberg_work> over IPv4, or using other ports, or not using TLS, it works
<rqou> hmm i uses 6697
<azonenberg_work> Yeah i cant get out on 6697 or 7000
<azonenberg_work> nmap shows the ports filtered on the server
<azonenberg_work> 7070 works
<azonenberg_work> 6667 is also blocked over ipv6
<azonenberg_work> but goes through over ipv4
<rqou> hmm, only port 25 is blocked here
<rqou> and supposedly if you know how to hack your cable modem you can unblock it
<azonenberg_work> my ipv6 is over a HE tunnel, not native
<azonenberg_work> comcast STILL does not have native static ipv6 in my area
<azonenberg_work> i have a static ipv4 addr with them
<azonenberg_work> (also i dont have rDNS for this laptop on ipv6? i should fix that...)
<rqou> probably the tunnel then
<rqou> also comcast resi should have ipv6 in your area
<rqou> maybe bug the support team to see if business has it?
<laintoo> azonenberg_work: are you using he.net tunnel?
<laintoo> oh you just mentioned that
<laintoo> azonenberg_work: are you sage certified with tunnelbroker?
<azonenberg_work> That i dont know
<laintoo> they block irc if you're not sage level
<azonenberg_work> comcast resi has DHCP ipv6
<azonenberg_work> i think business does too
<azonenberg_work> No comcast service in my area has static /56 or /48s available
<azonenberg_work> only DHCP /64
<azonenberg_work> i need a) multiple subnets and b) a static allocation
<rqou> you can get multiple subnets on resi, but not static
<azonenberg_work> Yeah exactly that last bit is important
<azonenberg_work> I want static and control over rDNS
<mtp> i have business but apparently if you want to change your rDNS you have to call them
<mtp> i don't want to fucking call people and read domain names over the phone to a script person
<azonenberg_work> Yes thats what you do for ipv4 with one IP
<mtp> especially considering my names are shit like 'spurtpump'
<azonenberg_work> but for ipv6 i really want to get a delegation from their DNS server
<mtp> azonenberg_work, i have a /29 and you still have to call them
<mtp> and yeah
<azonenberg_work> ...
<azonenberg_work> that is ridiculous
<mtp> an ipv4 /29
<mtp> but yeah it's bullshit
<azonenberg_work> this is one of the other reasons why i dont want to give up my HE tunnel :p
<azonenberg_work> but i want to leave too, b/c high latency etc
<azonenberg_work> What i might do, now that i think about it :p
<azonenberg_work> is keep the tunnel just for the address allocation
<azonenberg_work> and not actually route it anywhere
<mtp> i want to email someone with a list of BIND-format lines and have them type them into the goddamn zone file
<azonenberg_work> Then use comcast only for stuff in the dmz that hosts things or something
<azonenberg_work> :p
<azonenberg_work> mtp: that would be nice
<mtp> yeah
<azonenberg_work> even better, i want to email someone with a pair of DNS server IPs
<azonenberg_work> and say, anything in my /56 gets delegated there :p
<azonenberg_work> i add and remove VMs and hosts from my zones all the time
<rqou> even linode doesn't delegate their dns for ipv6
<rqou> it's dumb
<azonenberg_work> grr
<azonenberg_work> this is one of the MANY reasons why my dream is to ditch the consumer ISPs
<lain> linode wouldn't even give me ONE MORE ipv4 address (I have exactly one)
<azonenberg_work> and get an oc48 from cogent or level3 or something
<azonenberg_work> with PI space and a BGP link
<lain> I filled out a justification form saying I'm running two different sites and I'd rather they not be hosted on the same IP, and they were like "just use vhosts." and closed it lol
<lain> I'm like no I know about vhosts I DONT WANT THEM ON THE SAME IP
<lain> but, that's not a good justification apparently :P
<azonenberg_work> but i'd have to sell our car just to pay for the installation fee, and all of my servers to pay for the first month's service
<rqou> linode originally didn't want to give me two ipv6 /64s
<azonenberg_work> sooo :p
<rqou> but then apparently they changed their mind
<lain> haha
<lain> man
<lain> I can get a sweet deal on some ipv4 space
<lain> and ARIN will give you a pile of ipv6 space to go with it
<lain> but it's still like a lot of money :P
<lain> maybe when I'm rolling in pipecleaner money :V
<lain> lol fuuuuuck a friend just pointed out that ebay is going to be flooded with these atom C2000's that fuck off after 18 months
<azonenberg_work> and?
<lain> like, cisco is refusing to repair any units unless you have a smartnet contract
<lain> azonenberg_work: and that's going to fuck over a lot of people lol
<lain> because they'll probably sell as good used condition
<lain> and then they'll die like a week later
<lain> because of the intel cpu bug
<azonenberg_work> oh joy
<azonenberg_work> Well it's reworkable if you bother to do some RE right?
<lain> technically yeah
<lain> you can add pullups to those lines
<lain> 100-150 ohm pullups lol
<azonenberg_work> lol so basically its an nmos driver at that point
<lain> yep
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<lain> this is a 22nm cpu
<lain> I wonder wtf happened
<lain> you have to add pullups on any other LPC lines that are used too, to be sure
<lain> the document says you only have to add them if the usage rate is above a certain amount
<lain> which, lul
<lain> so clearly the drivers are cooking themselves
<lain> but I reaaaally want to know how/why this happened, at a silicon level
<lain> we'll probably never know :<
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<azonenberg_work> electromigration is a first guess
<azonenberg_work> Since it seems like it'll fail after passing a certain total amount of charge
<azonenberg_work> but could be weird things like charge trapping in the oxide etc too
<azonenberg_work> Welp
<azonenberg_work> After some finagling with rarely used git commands
<azonenberg_work> i have the latest antikernel and jtaghal repo on this box
<azonenberg_work> So i should be able to try programming the zybo with both my BERT bitstream and the test i built with splash
<azonenberg_work> Then i cann start work on building starshipraider with splash
<azonenberg_work> That will be a fun exercise
<azonenberg_work> having one control server and one build daemon with multiple clients (building different projects) connected
<azonenberg_work> I also want to start spinning up splash build daemons on other boxen rather than running it all local
<rqou> hmm in a week i should get my nas to run a splash node
<rqou> then you can try to a) root it and b) test what happens when you actually have to go over the slow interwebs
<rqou> :P
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<rqou> you can also test how well it works on a crappy pentium
<azonenberg_work> Lol
<azonenberg_work> :P
<azonenberg_work> I know for a fact i'm not ready to try doing anything like a serious stress test yet
<azonenberg_work> i have known bugs to work on first
<rqou> hey, g4400 is a skylake pentium
* azonenberg_work notes no jtag drivers supported on this install
<azonenberg_work> hmm, i think i should go install some stuff :p
<azonenberg_work> I should add a status display to splash at some point
<azonenberg_work> Rather than blindly being like "ok build done" after many minutes of waiting :p
<azonenberg_work> The big issue i have to fix is cache expiration
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<azonenberg_work> occasionally some events dont get processed and it tries to build with old results
<azonenberg_work> it works fine if you have a clean cache and kill all the workers after one compile :p
<azonenberg_work> I really should make a debian non-free package for libftd2xx at some point
<azonenberg_work> i hate manually un-tarring stuff and copying things to /usr/include
<rqou> wait a sec
<rqou> the pentium g4560 supports ecc?
<rqou> i swear i just checked it and it didn't wtf
<rqou> ?
<rqou> lain?
<lain> hi what
<rqou> is there an errata/product change notice for ecc on kaby lake?
<rqou> i swear on ARK it said ecc wasn't supported
<rqou> but i checked again and now it says it is
<lain> let me consult the tomes of obfuscated knowledge
<rqou> if it supports ecc i'm returning the g4400 for a g4560
<lain> " ECC is supported by S-Processor Line Servers and Server Workstations,
<lain> and by H-Processor Line Mobile workstations SKUs only
<lain> "
<lain> checking to see what that actually means though
<lain> yeah, have that open also
<rqou> but i swear it said "No" just last week
<azonenberg_work> soooo ldconfig is a pain in the butt
<azonenberg_work> somehow, i dont know why
<azonenberg_work> g++ isnt able to link to libdjtg when i pull it in using the digilent x64 DEB package
<azonenberg_work> I could remove the package and manually put them in /usr/lib or something but the ldconfig seems OK so i dont know whats going on
<azonenberg_work> Screw that
<azonenberg_work> root@foxacid:/tmp# cp /usr/lib/digilent/adept/*.so /usr/lib
<azonenberg_work> root@foxacid:/tmp# ldconfig
<azonenberg_work> :p
<mtp> yikes
<azonenberg_work> i'll debug the package later, tonight i need jtag
<azonenberg_work> FTDI's packaging is even worse
<azonenberg_work> it's just a tar.gz
<mtp> nice
<azonenberg_work> theres no standard on where to put the headers or libs or anything
<azonenberg_work> makes detecting it on a system a PITA
<azonenberg_work> i think for antikernel debug i'm going to manually package it for debian :p
<azonenberg_work> just so i can install it on boxen and be like "look it works"
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<azonenberg_work> Digilent API version: not supported
<azonenberg_work> FTDI API version: not supported
<azonenberg_work> grreeat
<azonenberg_work> so now its not detecting ftdi either???
<lain> asdf
<lain> rqou: intel is a bunch of diiiiiiicks
<lain> rqou: the s-spec for that g4560 is SR32Y but I can't find that shit in the NDA spec update
<rqou> which means?
<rqou> they hid it?
<lain> which means some doc editor isn't doing their job
<lain> wait found another doc that might have it
<lain> slightly newer
<azonenberg_work> aaand somehow i have 32-bit libs there
<azonenberg_work> hmm
<azonenberg_work> this would exlain int not building for x64
<lain> rqou: this is a desktop processor, right?
<rqou> yes
<lain> yeah I can't find it
<rqou> wtf but it's on ark?
<rqou> and newegg says i can buy it?
<lain> do not underestimate the fuckyness of intel docs
<lain> hm
<azonenberg_work> fsck
<azonenberg_work> gaah
<azonenberg_work> the digilent deb is broken
<azonenberg_work> they put 32-bit libs in /usr/lib and 64-bit in /usr/lib64
<azonenberg_work> instead of 32 in /usr/lib32 and 64 in /usr/lib
<lain> lul
<azonenberg_work> thaaat would explain it
<azonenberg_work> wtf though
<azonenberg_work> they went through the trouble of making a deb package
<azonenberg_work> then didnt test it on debian?
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<rqou> probably built only for ubuntu
<azonenberg_work> ubuntu should act like debian in this regard
<azonenberg_work> Interface 0: Zybo
<azonenberg_work> Serial number: SN:210279760222
<azonenberg_work> Default clock: 10.00 MHz
<azonenberg_work> User ID: Zybo
<azonenberg_work> That looks more like it
<azonenberg_work> about time
<lain> rqou: ah!
<lain> rqou: sooo this wikichip.org page https://en.wikichip.org/wiki/intel/pentium_(2009)/g4560
<azonenberg_work> Scan chain contains 1 devices
<azonenberg_work> 0: Xilinx XC7Z010 stepping 1
<azonenberg_work> Device is an FPGA
<azonenberg_work> Device is blank
<azonenberg_work> Device is programmable
<azonenberg_work> That's more like it
<lain> rqou: says it's a KBL-S chip
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<lain> rqou: and the KBL EDS says "ECC is supported by S-Processor Line Servers and Server Workstations"
<lain> rqou: so all signs point to ECC support
<lain> I can't be 100% sure though, intel docs are fucked
<rqou> hmm the history of that page was edited yesterday to say "yes"
<lain> lol
<rqou> wtf
<lain> well
<lain> if it really is a KBL-S
<lain> then yes it should support ECC according to intel's docs
<lain> but intel's docs aren't known for being full and correct
<azonenberg_work> lain: So i have an idea to overcome my trigger jitter
<azonenberg_work> just for kicks
<azonenberg_work> i'm going to try sending out a half-rate clock and triggering on both edges
<rqou> hmm i wonder if frys electronics will take a cpu return?
<azonenberg_work> Doubtful
<lain> is it opened?
<rqou> yeah doubtful
<azonenberg_work> lain: interesting
<lain> azonenberg_work: hm.. that might help with the jitter yeah
<azonenberg_work> i'm seeing a nice clean eye on the SDR clock and trash on the DDR PRBS
<lain> azonenberg_work: best would be to feed it into the trigger input
<azonenberg_work> Yeah let me try that next
<lain> that scope uses the mcu for triggering
<rqou> well, i guess i'll ebay my g4400 and get the g4560
<azonenberg_work> This thing i am building is evil
<lain> it only checks windows of samples periodically
<rqou> wtf i swear intel ark changed a few days ago
<azonenberg_work> it's a SMA-BNC adapter
<azonenberg_work> connected to a 50 ohm feedthrough terminator
<azonenberg_work> connected to a 10 dB attenuator b/c the trigger input on the scope is 1.2V max according to spec
<lain> lol
<azonenberg_work> Nope, ext trig is no better
<azonenberg_work> But thats fine i am about to rip a lot of this stuff out anyway
<azonenberg_work> i have to test the output buffer
<azonenberg_work> buuuut that will wait till tomorrow since its getting late and i have work-work to do tonight
<azonenberg_work> Good news is i got jtaghal/splash working on this laptop and i confirmed splash is building valid fpga bitstreams
<azonenberg_work> And i can still sorta feel my fingers
<rqou> lain: so is intel normally this bad at documentation that they can't even get ark correct?
<lain> rqou: in my experience yes
<rqou> so i'm not imagining that ark just changed like yesterday
<lain> rqou: when I ask my FAE how to find certain info, they usually disappear and never come back. or they forward it to someone else who then disappears
<rqou> and apparently no review site actually checks what they post
<lain> I've gone through like 4 FAEs and I've never once received a response to a single question other than "I'm checking into that"
<lain> and I don't think that's unique to me being a small-fry :P
<rqou> so does anybody on here want to buy a pentium g4400 skylake? :P
<lain> the xeon docs tend to be better from what I've seen
<rqou> it seems kinda wasteful that over half of the skylake pentium die is the gpu that my bios doesn't even power on
<rqou> anyways, seems the nas box just got a lot more powerful
<rqou> apparently hyperthreading on the kaby lake pentium helps a lot compared to the skylake
<rqou> lain: is there a way to trick/convince my motherboard bios to power on the igpu?
<rqou> i want to possibly use it for transcoding
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<lain> rqou: no idea
<lain> afaik that's all registers
<rqou> it doesn't require a separate clock/vreg?
<rqou> if so is it feasible to hack the bios to not disable the igpu?
<lain> welllll
<lain> that depends on .. lots of shit
<lain> I think if the cpu has igpu, you have to supply power to the igpu wells
<rqou> which i have no idea if this board does or not
<lain> but if the mobo designer knew it would be disabled, they might have supplied it with basically no power
<lain> yeah
<lain> I don't know how that stuff works
<lain> I've only dealt with other chips
<lain> and intel loves to change shit up
<lain> so my knowledge doesn't transfer over
<rqou> the motherboard i'm using has no video output connectors whatsoever, so it might not bother to power on the igpu in that case
<rqou> not even unpopulated pads
<rqou> hmm yeah
<rqou> i wouldn't actually wear a mechanical watch, but they're pretty neat engineering
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<rqou> lain: i'm somewhat wondering if the low end pentium/celeron skylake/kabylake is a "failed xeon" or if intel specifically designed it to be a "S-Processor Line"
<lain> yeah, I wonder stuff like that too
<lain> I'm guessing it's not a failed xeon though
<lain> xeon igpu is very different afaik
<lain> and xeon has lots of other stuff
<lain> whereas they do include ecc support in consumer SKUs, it's just normally fused off
<rqou> i know the linux edac driver doesn't work on non-xeons
<rqou> apparently that part of the memory controller is totally different
<rqou> hmm are the "iris pro" gpus also totally different from the normal igpu?
<lain> I think so, but I don't know
<lain> like, I think they have ecc internally and such
<rqou> hmm interesting
<rqou> "iris pro" isn't xeon though
<rqou> it's essentially "apple's"
<lain> hm
<lain> some xeon have it though
<rqou> (╯°□°)╯︵ ┻━┻
<rqou> wtf
<rqou> wait
<rqou> wtf is "mobile xeon"
<rqou> why does this exist?
<lain> I plan on using that in my laptop design
<lain> it's not a "real xeon" though as far as I can tell
<lain> it's a high-end core i7 mobile sku with ecc enabled
<fpgacraft2> <nmesisgeek> so i7 with ec... exactly
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<pointfree> cyrozap, balrog: I figured out the HC tile. You can get the HC bit position with a slope intercept formula using the HV wire number as input and the PI bit number as output...or vice versa depending on which way you want to route from.
<pointfree> Now I will get some sleep, but tomorrow I will factor and refactor the Forth code to my satisfaction. Next I will look into this datapath stuff and see what that's all about.
<pointfree> It may also be time to start adding yosys support.
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<nats`> Setup/Hold to clock RXC
<nats`> Source | clk (edge) | Corner | clk (edge) | Corner |Internal Clock(s) | Phase |
<nats`> |Max Setup to| Process |Max Hold to | Process | | Clock |
<nats`> ------------+------------+------------+------------+------------+------------------+--------+
<nats`> ------------+------------+------------+------------+------------+------------------+--------+
<nats`> RXCTL | 1.151(R)| SLOW | 1.187(R)| SLOW |RXC_BUFGP | 0.000|
<nats`> | 1.151(F)| SLOW | 1.187(F)| SLOW |RXC_BUFGP | 0.000|
<nats`> RXD<0> | 1.151(R)| SLOW | 1.187(R)| SLOW |RXC_BUFGP | 0.000|
<nats`> | 1.151(F)| SLOW | 1.187(F)| SLOW |RXC_BUFGP | 0.000|
<nats`> RXD<1> | 1.147(R)| SLOW | 1.191(R)| SLOW |RXC_BUFGP | 0.000|
<nats`> | 1.147(F)| SLOW | 1.191(F)| SLOW |RXC_BUFGP | 0.000|
<nats`> RXD<2> | 1.146(R)| SLOW | 1.192(R)| SLOW |RXC_BUFGP | 0.000|
<nats`> | 1.146(F)| SLOW | 1.192(F)| SLOW |RXC_BUFGP | 0.000|
<nats`> RXD<3> | 1.146(R)| SLOW | 1.192(R)| SLOW |RXC_BUFGP | 0.000|
<nats`> | 1.146(F)| SLOW | 1.192(F)| SLOW |RXC_BUFGP | 0.000|
<nats`> ------------+------------+------------+------------+------------+------------------+--------+
<nats`> Clock to Setup on destination clock RXC
<nats`> ---------------+---------+---------+---------+---------+
<nats`> | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
<nats`> Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
<nats`> ---------------+---------+---------+---------+---------+
<nats`> RXC | 5.616| 3.750| | |
<nats`> ---------------+---------+---------+---------+---------+
<nats`> Clock to Setup on destination clock clk50
<nats`> ---------------+---------+---------+---------+---------+
<nats`> | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
<nats`> Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
<nats`> ---------------+---------+---------+---------+---------+
<nats`> clk50 | 6.589| | | |
<nats`> ---------------+---------+---------+---------+---------+
<nats`> OFFSET = IN 1.2 ns VALID 2.4 ns BEFORE COMP "RXC" "RISING";
<nats`> Worst Case Data Window 2.343; Ideal Clock Offset To Actual Clock -0.021;
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> | | Process | | Process | Setup | Hold |Source Offset|
<nats`> Source | Setup | Corner | Hold | Corner | Slack | Slack | To Center |
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> RXCTL | 1.151(R)| SLOW | 1.187(R)| SLOW | 0.049| 0.013| 0.018|
<nats`> RXD<0> | 1.151(R)| SLOW | 1.187(R)| SLOW | 0.049| 0.013| 0.018|
<nats`> RXD<1> | 1.147(R)| SLOW | 1.191(R)| SLOW | 0.053| 0.009| 0.022|
<nats`> RXD<2> | 1.146(R)| SLOW | 1.192(R)| SLOW | 0.054| 0.008| 0.023|
<nats`> RXD<3> | 1.146(R)| SLOW | 1.192(R)| SLOW | 0.054| 0.008| 0.023|
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> Worst Case Summary| 1.151| - | 1.192| - | 0.049| 0.008| |
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> OFFSET = IN 1.2 ns VALID 2.4 ns BEFORE COMP "RXC" "FALLING";
<nats`> Worst Case Data Window 2.343; Ideal Clock Offset To Actual Clock -0.021;
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> | | Process | | Process | Setup | Hold |Source Offset|
<nats`> Source | Setup | Corner | Hold | Corner | Slack | Slack | To Center |
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> RXCTL | -2.849(F)| SLOW | 5.187(F)| SLOW | 0.049| 0.013| 0.018|
<nats`> RXD<0> | -2.849(F)| SLOW | 5.187(F)| SLOW | 0.049| 0.013| 0.018|
<nats`> RXD<1> | -2.853(F)| SLOW | 5.191(F)| SLOW | 0.053| 0.009| 0.022|
<nats`> RXD<2> | -2.854(F)| SLOW | 5.192(F)| SLOW | 0.054| 0.008| 0.023|
<nats`> RXD<3> | -2.854(F)| SLOW | 5.192(F)| SLOW | 0.054| 0.008| 0.023|
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> Worst Case Summary| -2.849| - | 5.192| - | 0.049| 0.008| |
<nats`> ------------------+------------+------------+------------+------------+---------+---------+-------------+
<nats`> oups
<nats`> sorry
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<qu1j0t3> hm, used chisel.
<nats`> what was your feeling about chisel ?
<qu1j0t3> i have been interested in it, but got talking to the SpinalHDL guy. I haven't used it for a non trivial project.
<nats`> ah to Dolu
<nats`> spinal seems itneresting too
<nats`> but as usual I fear the lack of real support behind all those langauge
<nats`> I started to play with CLaSH but same conclusion
<nats`> (CLaSH seems more impacted by this problem because it's in haskell so even more 'esoteric')
<qu1j0t3> there's also Lava, Obsidian, etc.
<qu1j0t3> Dolu was trying to recruit help for SpinalHDL
<whitequark> is this minecraft?
<qu1j0t3> i actually wouldn't mind helping if i were using it actively
<qu1j0t3> whitequark: hehe
<felix_> rqou: xeon e3 is probably the same die as an i7. xeon e5 is a completely different beast
<felix_> rqou: the apic configuration should be in the madt table
<nats`> qu1j0t3 I don't have the level for that
<nats`> but I coulduse it if theere is an active support
* qu1j0t3 nods
<qu1j0t3> nats`: what do you use now? Verilog?
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<nats`> qu1j0t3 verilog yes
<nats`> I need to learn VHDL
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<nats`> is there a clean way to output the jtag chain of a spartan 6 using BSCAN primitive ?
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<azonenberg> nats`: define "output the jtag chain"
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<nats`> I want to be able to connect the jtag probe on an other port especially to use chipscope on a board that was poorly designed with an ftdi using the wrong bus :p
<azonenberg> You want to be able to drive the jtag chain from a different set of pins?
<azonenberg> Not possible with a normal FPGA
<azonenberg> The only reconfig like that you can do, to my knowledge
<azonenberg> is you can reconfigure the zynq's ARM jtag out to fabric pins
<azonenberg> But not the FPGA jtag
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<nats`> yes but my idea was a little different
<nats`> not the native fpga jtag
<nats`> I was hoping I could see the chipscope jtag on the chain
<nats`> because on that board they used ftdi bus 1 so it's not compliant with digilent crap probe
<azonenberg> huh
<azonenberg> so chipscope doesnt show up as a separate TAP
<azonenberg> it's using a BSCAN to expose itself as a certain jtag instruction
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<azonenberg> And i dont think there is any way to drive a BSCAN from internally
<azonenberg> your best option, i think
<azonenberg> would be to write a PC-based server that speaks the xilinx xvcd protocol over a socket listener
<azonenberg> and talks to ftdi bus 1
<azonenberg> Other option is to rework out the jtag pins and use a separate programmer
<nats`> I was thiking about xvc server
<nats`> how hard is it ?
<azonenberg> protocol is not officially doc'd but several blogs etc have implemented it
<azonenberg> my understanding is, not hard at all
<nats`> oky
<azonenberg> its a low level protocol that basically only gives you one or two commands
<nats`> oky I'll take a look
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<nats`> I guess it's a mater of converting tcp stuff into "local stuff"
<nats`> like ftdi transaction etc
<nats`> how the throughtput is controlled ?
<azonenberg> You just don't read(2) the TCP socket until the cable keeps up
<nats`> oky cool :)
<nats`> time to go home I guess it'll be the work of this evening
<nats`> to do it fast I could do it in python
<nats`> not sure it would be interesting to share it
<nats`> or maybe yes in fact because for now it means all non digilent ftdi probe are not compatible
<nats`> like bus blaster etc
<azonenberg> weell
<azonenberg> libjtaghal can talk to the TAP
<azonenberg> I show each port of an ftdi dongle as a separate controller
<azonenberg> But i dont support chipscope
<azonenberg> That might actualyl be a fun project lol
<azonenberg> RE the chipscope protocol
<azonenberg> and be able to instantiate ICON cores and view them in my UI
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<rqou> how is this not exploitable? "The display engine is allowed to access Intel ME stolen memory as part of Intel® KVM technology flows. Specifically, display-initiated HHP reads (for displaying a Intel KVM technology frame) and display initiated LP non-snoop writes (for display writing an Intel KVM technology captured frame) to Intel ME stolen memory are allowed."
<rqou> lain?
<rqou> is there an iommu here?
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<nats`> azonenberg at first I'll just a regular one to use chipscope :D
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<lain> rqou: ¯\_(ツ)_/¯
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<rqou> hmm my chipwhisperer box has an address written by hand
<rqou> that helps explain why shipping costs so much :P
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<rqou> and it has an accurate customs declaration! wow!
<rqou> i'm so used to aliexpress-style "toy, $2"
<rqou> i'm glad i don't have to deal with e.g. german customs :P
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<azonenberg> lol
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<rqou> so apparently $FANCY_SCHOOL changed their student records system again and didn't tell anyone
<rqou> iirc they last changed it right before I enrolled