clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<promach> For https://i.imgur.com/s8swIuT.png , why am I having some warning on the wire signal 'start' ?
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<awygle> promach: because you never assign to it
<awygle> it probably doesn't matter for formal stuff tho?
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<promach> awygle: check lines 25 and 30 of test_UART.v
<awygle> promach: you're assuming it, not assigning it
<awygle> prep doesn't know what you're going to do with it afterwards so it's giving you synthesis warnings
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<promach> awygle: what do you think about https://github.com/promach/UART ?
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<cr1901_modern> once again, abc is broken on Windoze... seriously about to go without it. Third time in a year there's "undefined reference" bullshit
<cr1901_modern> rqou: Does any of this crap ring a bell? https://hastebin.com/xahivocene.tex
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<awygle> cr1901_modern: that looks like c++ code trying to build as c to me
<awygle> or not linking the c++ runtime
<awygle> is this git head?
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<cr1901_modern> awygle: It's whatever version yosys head is currently using. And you're probably right. I'll just file another bug/go without for now
<cr1901_modern> in any case, I only wanted it to test a possible bug in yosys
<awygle> cr1901_modern: I was able to build Yosys head in Cygwin today. Are you using mingw?
<cr1901_modern> yes
<cr1901_modern> (but I don't actually _need_ it for the bug)
<awygle> Ah bummer, I am useless then
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