08:17 <ss942> OH MY GOD IT'S ALIVE

08:18 <ss942> I just wanted to google how to change charger usb in nokia n900, but instead I spend 10 hours on reading why nokia n900 was so amazing and finally I'm here

08:27 <how900> ss942: that's a great way to end up here :)

08:27 <how900> ss942: welcome!

15:15 <enyc> Joerg-Neo900: wonderful

15:15 <enyc> Joerg-Neo900: i guess this sort of thing is to be expected... I rememer eevblog/dave_jones talking of the "electronics design merry-go-round" =)

15:18 <DocScrutinizer05> well, this one is particularly strange since the chip is only a maybe 6 months old

15:41 <ceene> DocScrutinizer05: what about lattice FPGAs?

15:42 <ceene> they're tiny and some of them even have free as in freedom tools

15:42 <bencoh> what about power/battery?

15:42 <DocScrutinizer05> huh?

15:44 <DocScrutinizer05> ceene: the silego are mixed signal configurable integrated circuits. The logic functions are not as massive as in a FPGA

15:44 <ceene> i know, but i worry that they decide to discontinue products so soon...

15:45 <ceene> http://www.latticesemi.com/Products/FPGAandCPLD/iCE40Ultra.aspx#_2BC6BD88F5C0403A907E053CFCD1195B

15:45 <DocScrutinizer05> they relabeled one product, since they - I guess - used a die shrink to fix a tiny SiErr

15:46 <ceene> first example for this fpga family is an IR Rx/Tx :)

15:46 <ceene> it's also that... when I don't hate VHDL and FPGAs I love 'em

15:46 <ceene> it's a hard balance to maintain

15:47 <DocScrutinizer05> look: latice smallest: 640 LUT. Silego: 25 LUT/macrocells + 4 comparators

15:47 <ceene> and what about price and power consumption?

15:48 <DocScrutinizer05> static power: latice 35µA, silego 0.3µA

15:48 <DocScrutinizer05> an FFGA isn't the righr component for our usecase

15:48 <DocScrutinizer05> FPGA

15:49 <DocScrutinizer05> the silego are more like ASICs

15:53 <ceene> https://hackaday.io/project/6592-dipsy

15:53 <ceene> funny things people do with lattice's fpgas

15:54 <DocScrutinizer05> sure, they are nice chips, but not exactly what we need here

15:57 <DocScrutinizer05> we use them here to replace a maybe 4 or 4 'traditional' analog (comparators, opamps) and logic (2-LUT, 3-LUT, like 7400 4 gate NAND. Also D-FF and counters, low power oscillator, delay etc) chips

15:57 <DocScrutinizer05> 4 or 5

15:58 <wpwrak> the killer feature are the integrated analog comparators. we use them heavily. lattica don't have that.

15:58 <wpwrak> ah, we're synchronized ;-)

15:58 <ceene> oh, that's right

15:58 <ceene> these are pure digital circuits

15:58 <DocScrutinizer05> and I don't know if latice can even do that, anyway the Silego have a OTP ROM to freeze the config, so they are not per se 'Field Programmable'

15:59 <ceene> http://imgur.com/a/4vBfT

15:59 <ceene> we opened up an android phone yesterday, btw

15:59 <ceene> that's all there is to see

16:05 <bencoh> what did you expect? :)

16:05 <ceene> don't know... something :)

16:05 <bencoh> huhu

16:06 <DocScrutinizer05> ceene: see for example U801 in https://neo900.org/stuff/kicad/proto_v2/2016-11-08/neo900__proto_v2__by_eeshow.pdf#8

16:08 <DocScrutinizer05> it does analog comparator and AD, and it provides a duty-cycle power saving for the two LVM221 RF-sensors

16:08 <ceene> u801 is gps rf lna

16:09 <DocScrutinizer05> so this little chip saves us a maybe 5 others, or alternatively we had to offload all those tasks to the main CPU

16:09 <ceene> u806 i guess

16:09 <DocScrutinizer05> sorry U806

16:09 <ceene> i see

16:09 <ceene> yep, no fpga will do that

16:09 <ceene> they're just not designed for it

16:10 <DocScrutinizer05> exactly

16:12 <ceene> well, time to go home

16:12 <ceene> cya!

16:13 <DocScrutinizer05> and the recent addition of I2C is just a very nice option that came with the new GP5 chips (which I ranted about yesterday). Before we planned to use a GP4 (without I2C) for exactly the same task, except the ADC obviously

16:13 <DocScrutinizer05> before that we planned for an analog comparator (or opamp) and doing the duty-caycle and ADC in OMAP

16:15 <DocScrutinizer05> in OMAP we had to use a PWM IP for that, so the CPU can go asleep while the PWM still handles reducing the power-on time for the greedy LMV221

16:16 <DocScrutinizer05> problem: with such approach we need to make sure the comparator doesn't fire a IRQ during settle time and shutdown with evey cycle of duty

16:17 <DocScrutinizer05> so the comparator needed some enable function too. And then we still had no bias compensation for possible drift between the two LMV221

16:32 <Joerg-Neo900> anyway we are using the SLG36533 which is not being phased out. The 'twin' SLG46531 however is, but obviously just to relabel it to SLG46537 and do a tiny SiErr fix along with the die shrink (and/or bonding pad rearrangement) both chips probably have seen for the new even more tiny MSTQFN-22 package

16:33 <Joerg-Neo900> s/SLG36533/SLG46533/

16:34 <Joerg-Neo900> http://www.silego.com/uploads/Products/product_482/SLG46533r106_10202016.pdf

16:35 <Joerg-Neo900> if that link is 404 for you, go one dir level up and then back again, their webserver checks for REFERRER

16:38 <Joerg-Neo900> or see there: http://www.silego.com/softdoc/datasheet.html?filterPN=SLG46533V

16:40 <Joerg-Neo900> if you want to 'touch' that stuff: http://www.silego.com/softdoc/software.html

16:41 <Joerg-Neo900> I installed the Ubuntu version on OpenSuse (with alien) and it worked after some needed libs update

16:42 <Joerg-Neo900> it's a shame they don't offer generic debian and RPM packages

16:42 <Joerg-Neo900> oohm cancel "debian", they do