06:19 <GitHub136> [artiq] whitequark commented on issue #656: > Is this due to the fact that experiments must not have a runtime dispatch, and tuples are capable of holding values of different types?... https://git.io/vMPyH

20:34 <GitHub23> [artiq] jordens commented on issue #656: The error's context (being a `@kernel` and ARTIQPython being different from regular Python) is not always obvious for beginners. https://git.io/vM1HG

21:17 <GitHub115> [misoc] sbourdeauducq pushed 2 new commits to master: https://git.io/vM1Aq

21:17 <GitHub115> misoc/master 2c88ec0 Sebastien Bourdeauducq: timer: use 64 bits by default

21:17 <GitHub115> misoc/master e8ebb04 Sebastien Bourdeauducq: liballoc: move include to regular location, do not require stddef to be included before

21:19 <bb-m-labs_> build #195 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/195

21:29 <GitHub47> [artiq] sbourdeauducq pushed 3 new commits to master: https://git.io/vM1pl

21:29 <GitHub47> artiq/master b409538 Sebastien Bourdeauducq: gateware: soc -> amp.soc

21:29 <GitHub47> artiq/master 62274a6 Sebastien Bourdeauducq: RELEASE_NOTES: targets.kc705_dds

21:29 <GitHub47> artiq/master aeb1ba8 Sebastien Bourdeauducq: gateware: use default MiSoC timer

22:17 <bb-m-labs_> build #315 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/315

22:40 <bb-m-labs_> build #1220 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1220

22:49 <bb-m-labs_> build #316 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/316 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>

22:49 <bb-m-labs_> build #1221 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1221 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>

22:51 <GitHub18> [artiq] sbourdeauducq pushed 2 new commits to master: https://git.io/vMMqj

22:51 <GitHub18> artiq/master ce31ffd Sebastien Bourdeauducq: firmware: add satellite manager...

22:51 <GitHub18> artiq/master 2a7a8f9 Sebastien Bourdeauducq: gateware: fix import

23:00 <bb-m-labs_> build #317 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/317 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>

23:00 <bb-m-labs_> build #1222 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1222 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>

23:08 <sb0> whitequark, a 16KB stack is enough for the runtime?

23:08 <sb0> (its main thread, that is)

23:11 <GitHub138> [artiq] sbourdeauducq pushed 2 new commits to master: https://git.io/vMMOy

23:11 <GitHub138> artiq/master 28a41a2 Sebastien Bourdeauducq: gateware: fix aeb1ba847

23:11 <GitHub138> artiq/master 5c0d402 Sebastien Bourdeauducq: firmware: runtime.ld formatting

23:12 <sb0> why have such a small stack anyway? there is plenty of SDRAM and this is just asking for overflows

23:45 <bb-m-labs_> build #318 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/318

23:47 <GitHub81> [artiq] vontell commented on issue #656: @whitequark sorry, this is true that the errors are quite clear of the problem. As @jordens said, as a beginner such as myself where ARTIQ is my first endeavor in using FPGA systems, it was not immediately clear that the host Python code is compiled into a different type of Python code. From the documentation it is clear that there is a conversion happening, but I had no idea that the compiled code would hav

23:48 <bb-m-labs_> build #1223 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1223 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>