<wolfspraul>
thank you, inspiring work, keep it up
<wolfspraul>
is 4004 CPU still on your horizon? or something else now?
<azonenberg>
Its one of the several relatively large scale (1E3 transistor range) devices i'd like to build in the long term
<azonenberg>
Now that metal etching is solved and Si etching is coming along nicely, i think i am very close to a comb drive
<azonenberg>
which is the immediate goal
<wolfspraul>
I'm just trying to understand your mental roadmap, and I fully understand it may change as you move forward and discover more, successes and failures etc.
<wolfspraul>
what is a comb drive?
<wolfspraul>
I am seriously interesting in finding a way to embed some of your stuff on hacker boards or even products I could build
<wolfspraul>
s/interesting/interested/
<wolfspraul>
not now of course, I understand there's more work to be done first
<azonenberg>
A comb drive is a capacitive linear actuator
<azonenberg>
Let me upload a GDS and i'll walk you through it h/o
<wolfspraul>
I think that would be so cool if we could squeeze out some actual use case out of what you build, from the perspective of a software developer
<wolfspraul>
no matter how small the 'programmability' may be at the beginning
<azonenberg>
You'd make the die a mm or two across and scribe it out of the wafer (I separate my dies from the wafer before processing since i only make one die at a time)
<azonenberg>
The top metal layer would be extra thick
<azonenberg>
and then you could wire bond or similar to it (detials of how to attach wires are TBD)
<azonenberg>
but you'd have 50-100 micron wide contact pads around the rim of the chip
<azonenberg>
then you seal it on with a blob of epoxy
<wolfspraul>
is the packaging still part of your lab setup/goal, or would you use a service for that?
<wolfspraul>
wirebond dies typically come in small chocolate-sized vacuum sealed packlets
<azonenberg>
The immediate goal is fab, i'll be testing them with microprobes
<azonenberg>
if and when i build something suitable for actual use in a project i'd think about it then
<azonenberg>
I might be buying/building a wirebonder eventually
<wolfspraul>
then it goes to a wirebond machine to run the wires (aluminum, gold, etc) and put the epoxy on as a last step
<azonenberg>
Yep
<wolfspraul>
all of which is done after smt/reflow because it cannot take heat
<azonenberg>
Interesting, i didnt know that part
<wolfspraul>
of course you know that, I'm just explaining where my current knowledge stops
<azonenberg>
the epoxy cant handle reflow?
<wolfspraul>
I can double-check, haven't done wirebonding for a year or so
<azonenberg>
Because the exact same process (excpet the epoxy is in a chip-shaped mold and has a leadframe around it instead of a PCB) is used for making normal ICs
<wolfspraul>
there are wire-bond modules which in turn go through reflow
<azonenberg>
they wirebond from the die to the leadframe then fill the whole thing with epoxy
<wolfspraul>
maybe some can and some cannot
<azonenberg>
chip on board simply removes some of the middleman
<wolfspraul>
but also adds new ones
<azonenberg>
not really
<azonenberg>
Instead of a separate soldered leadframe you bond from the die straight to the copper traces
<wolfspraul>
in the industry, many smt shops do not have a wirebond machine
<azonenberg>
then epoxy fill over it
<wolfspraul>
for some strange reason
<azonenberg>
I want one :P
<azonenberg>
i've used them in the cleanroom
<wolfspraul>
so if you have a product with wirebond, the logistics and testing has more steps
<wolfspraul>
because stuff is sent around
<wolfspraul>
oh it's no rocket science for sure, I'm just saying it's a separate/different workstep and as such adds complexity to the manufacturing process
<wolfspraul>
which if you have stronger packages, someone else has done this before
<wolfspraul>
the stronger packages come at a price too of course
<wolfspraul>
most wirebond places are small offices, like a dentist
<azonenberg>
interesting
<azonenberg>
Like i said i havent done much COB (except for taking them apart)
<wolfspraul>
I've heard that some smt fabs now add this machine (and workstep) to their arsenal, but I think for the most part it's still separate
<azonenberg>
i've only studied wirebonding as it applies to fabrication of regular ICs
<wolfspraul>
wirebond is definitely disruptive to the manufacturing and testing process
<azonenberg>
or for bonding a prototype die for packaging
<wolfspraul>
so that additional disruption (cost) needs to be made back, which is why you find wirebond typically only in high-volume applications (say 100K units or more)
<azonenberg>
Yeah
<wolfspraul>
oh sure, but that's a completely different use case
<azonenberg>
But as i said its the one i'm familiar with lol
<azonenberg>
Given a wafer, go test it
<wolfspraul>
anyway I am just thinking practical how we go from your wafer to being able to integrate this into a bigger circuit
<wolfspraul>
normally I think the packaging services are also small service providers
<azonenberg>
Depends a lot on how much ends up being doable
<wolfspraul>
you send them a wafer, tell them which package you want, and they send you the packages back
<azonenberg>
In the short term i am not expecting to make anything more complex than 4000 series
<azonenberg>
one die at a time
<johndmcmaster>
on that note, does anyone have a good reference on ohmic contacts
<johndmcmaster>
composition materials and such
<azonenberg>
johndmcmaster: That was on my list of things to research as well
<azonenberg>
i've heard something about platinum silicide being common
<azonenberg>
But for the comb drive i'll be doing evaporated or sputtered metal over thermal oxide
<azonenberg>
iow the Si will be just a substrate and not passing any current at all
<wolfspraul>
so wait, you lost me
<wolfspraul>
we will find some way to package it, let's move that aside now
<wolfspraul>
but how about programmability
<wolfspraul>
what feature can come out of a 'comb drive'?
<azonenberg>
i was pushing that off until i got to CMOS
<azonenberg>
wolfspraul: On and off
<azonenberg>
Its meant to be used as part of a MEMS system
<azonenberg>
moving around micromirrors etc
<azonenberg>
By itself it's useless
<wolfspraul>
ok
<azonenberg>
An x/y micromirror system would be next on the list of more complex devices to build
<wolfspraul>
imaging sensor?
<azonenberg>
no, it'd be a steerable mirror
<wolfspraul>
projector?
<azonenberg>
A chunk of polished Si that can be tilted in various directions
<azonenberg>
Basically a single DLP pixel
<azonenberg>
Which could also be used as the main element in a laser projector
<wolfspraul>
yes :-)
<azonenberg>
It'd probably be sputtered in aluminum or something to make it nice and reflective (like telescope mirrors)
<azonenberg>
Thats next on my todo list once i get a single comb drive built
<wolfspraul>
cool
<azonenberg>
Something of that magnitude would actually be useful
<wolfspraul>
well then, good luck!
<azonenberg>
and probalby not that difficult
<azonenberg>
CMOS is a lot harder due to the sensitivity to trace contaminants
<azonenberg>
The micromirror would basically be two comb drives connected to a block of Si
<azonenberg>
the only hard part would be figuring out how to make it tilt
<wolfspraul>
yes, anything usable first
<wolfspraul>
that'd be great
<wolfspraul>
I will seriously try to make this part of a hacker board or product, in whatever stretch imagination that needs
<wolfspraul>
:-)
<azonenberg>
Any kind of laser projector could use something like this
<wolfspraul>
we take the fabrication of your dies to China! even if made one by one :-)
<azonenberg>
Lol :P
<wolfspraul>
(just kidding)
<azonenberg>
Maybe to improve yields have two independent 1-axis tilt systems
<azonenberg>
that would mean i don tneed to get two working drives on the same die
<azonenberg>
make a working x axis, then a working y axis
<azonenberg>
and mount them 90 deg apart
<wolfspraul>
how is this related to a galvanometer?
<azonenberg>
The intended use case would be very similar
<wolfspraul>
nice
<azonenberg>
A DLP projector is basically a grid of tiny mirror galvos
<wolfspraul>
there's a guy marcan in the #qi-hardware channel now working on his OpenLase project
<azonenberg>
that PWM the reflected signal between "on" (poitned at the screen" and "off" (pointed off to the side)
<wolfspraul>
he takes a normal 2 USD laser pointer, plus galvos and some software
<azonenberg>
And yeah, i saw
<azonenberg>
You could quite possible use a MEMS galvo to do steering of the beam
<wolfspraul>
very cool
<azonenberg>
thats something i'd say is realistic in the 1-2 year time frame
<azonenberg>
based on how fast things are going now
<wolfspraul>
excellent
<azonenberg>
Of course, production would be very limited lol
<wolfspraul>
in that time frame I can work on getting my manufacturing costs further down and efficiency further up
<wolfspraul>
nah don't worry. I will take this to China, then we optimize :-)
<azonenberg>
Lol good luck finding budget for ASIC fab
<wolfspraul>
if Chinese are good at anything, it's process innovation
<azonenberg>
i know guys doing that and it isnt cheap
<azonenberg>
But its an open project so if you do figure out a way to do something cool with my designs, more power to you
<wolfspraul>
why not make them in your very own process?
<wolfspraul>
home-fab
<azonenberg>
I could, it just couldnt be done en masse
<wolfspraul>
ok one by one
<azonenberg>
Right now the biggest issue preventing more rapid production is my exposure system
<wolfspraul>
I would start with 1, then optimize
<azonenberg>
all of the chemical processing and deposition is parallel up to wafer level
<azonenberg>
But i cant expose more than one die (or even part of a die depending on magnification) at a time
<wolfspraul>
understood. nothing better than a few nice challenges, right?
<azonenberg>
i need to work out a laser direct-write system or similar that will let me make a contact mask for a bunch of dies and expose them all at once
<azonenberg>
Its on the longer term todo list
<wolfspraul>
yes
<wolfspraul>
the mems mirror may come in handy?
<wolfspraul>
:-)
<azonenberg>
Lol, maybe
<wolfspraul>
just kidding, I think I understand it
<azonenberg>
i'm serious though
<wolfspraul>
we will find ways to bring this out into real use cases though
<wolfspraul>
early
<wolfspraul>
no matter how limited
<azonenberg>
Would be cool to show people my instruments and say that i am using a homemade chip into the tool
<azonenberg>
And sounds like a plan :)
<azonenberg>
My next goal in the short term is to get 1/4 of a <110> 2-inch wafer prepped, spin coated in a very thin Ta2O5 layer (probably on the order of 50nm)
<azonenberg>
and coated with evaporated Cu
<azonenberg>
On both sides
<azonenberg>
Actually i might even do half a wafer
<azonenberg>
if the tantalum cooperates
<azonenberg>
My proposed process would allow me to do all of the depositions at once and then etch top and bottom separately
<azonenberg>
The one restriction is that once i open a hole in the hardmask i cant close it
<azonenberg>
in other words i'd need to do the bottom etch first and thin down to maybe 30 microns
<azonenberg>
then open up the top (leaving bottom exposed) and etch both down and up
<azonenberg>
the end result would be the fingers on top, parallel with the top surface, and about 15um thick
<azonenberg>
At that point i'd strip the Ta2O5 layer, grow thermal oxide over the whole die (which i need to get a furnace for)
<azonenberg>
evaporate/sputter the whole die in metal and then do one last etch of metal 1
<azonenberg>
at which point i'd have a completed, ready-to-test prototype
<wolfspraul>
he
<wolfspraul>
I will follow...
<bart416>
azonenberg, what to do with a shitty old computer
<R0b0t1>
If you don't already know of a use for it I've found it is best thrown away.
<bart416>
Yeah but that costs money!
<bart416>
:|
<bart416>
(Not a joke)
<berndj>
azonenberg, is it much harder to evaporate Cu than Al?  thinking of melting point vs vapour pressure here
<azonenberg>
berndj: Cu and Al can both be evaporated in the unit i've been using
<azonenberg>
I did Cu because it's more resistant to HF than Al
<azonenberg>
In terms of a homebrew setup that's still a ways out
<azonenberg>
And lol, they require vacuum-sealed packaging to operate?
<azonenberg>
those would be fun to reverse engineer
<azonenberg>
you couldnt probe them without a vacuum chamber
<azonenberg>
which probably would mean a SEM too
<bart416>
You'd be using a SEM to reverse engineer them anyway :P
<azonenberg>
Not for larger process size devices
<azonenberg>
you can do 350nm with an optical microscope if you're patient
<azonenberg>
250 and below pretty much needs a SEM though
<bart416>
Eventhough we never get to do it, us is always told to go for the electron microscope when debugging or reverse engineering electronic devices
<bart416>
For the simple reason that you can study the device in operation
<azonenberg>
Yeah
<azonenberg>
You can do that with an optical scope too though
<azonenberg>
Just not for really small stuff
<azonenberg>
i have probes and micropositioners already
<bart416>
Can you "see" electricity with an optical scope? :P
<azonenberg>
and plan to try studying a 4000 series chip live in the near future
<bart416>
Didn't think so
<azonenberg>
No
<azonenberg>
But i can drop a needle down on top metal and plug that into a logic analyzer
<azonenberg>
And for somethign simple like a 4017 that should give good results
<azonenberg>
    0.190] breadboard kernel: sys_alloc_init: node = a00006e8, node->this_size.size = 153
<azonenberg>
[Â Â Â Â 0.197] breadboard kernel: sys_alloc_init: node->next_free = 00000000
<azonenberg>
[Â Â Â Â 0.204] breadboard kernel: sys_alloc_init: buf->first_free = 00000000
<azonenberg>
[Â Â Â Â 0.210] breadboard kernel: sys_alloc_init: node = a00006e8, node->this_size.size = 29959
<azonenberg>
[Â Â Â Â 0.218] breadboard kernel: sys_alloc_init: node->next_free = 00000000
<azonenberg>
[Â Â Â Â 0.224] breadboard kernel: sys_alloc_init: buf->first_free = a00006e8
<azonenberg>
whoops wrong tab
<azonenberg>
Though if you guys want to help me debug a sys_malloc() segfault on an embedded MIPS feel free :P
<R0b0t1>
Psh, allocate on the stack.
<azonenberg>
R0b0t1: I think the segfault is actualyl stack corruption that overflowed onto the heap
<azonenberg>
i only have 32KB of ram so its not hard
<R0b0t1>
Yeah, seems like it could easily be the problem
<azonenberg>
But its tricky and nondeterministic
<azonenberg>
doesnt happen (or at least not in the same spot) if i disable context switching
<R0b0t1>
You have 32kb of RAM, and you have context switching...?
<azonenberg>
The PIC32 series has up to 128KB but the chip on my dev board atm is 32
<azonenberg>
and yes, i have multithreading
<azonenberg>
The kernel will eventually be ported to a MIPS softcore on an FPGA with a ton of DRAM
<azonenberg>
but i want to keep it light enough that i can use it on pic32 still if necessary
<azonenberg>
a thread environment block is only a couple hundred bytes, maybe less
<azonenberg>
32x 32-bit registers = 128 bytes plus a little metadata
<R0b0t1>
Oh I keep forgetting programs aren't in RAM
<azonenberg>
Yeah
<azonenberg>
512KB of memory mapped flash
<azonenberg>
code is all execute-in-place
<azonenberg>
Right now the kernel image, libc, and a bunch of usermod test applications are around 80KB
<azonenberg>
and i'm using under 10KB of ram
<azonenberg>
That will go down as i optimize and trim stuff out of the core image, there's a lot of test code
<R0b0t1>
nice
<azonenberg>
Well, this is going to be fun - tonight i'm going to try some more silicon etching
<azonenberg>
using my new slow Cu etch to pattern the Cu, then HF through that onto the Ta2O5 and KOH