mnemoc changed the topic of #arm-netbook to: EOMA: Embedded Open Modular Architecture - Don't ask to ask. Just ask! - http://elinux.org/Embedded_Open_Modular_Architecture/EOMA-68 - ML arm-netbook@lists.phcomp.co.uk - Logs http://ibot.rikers.org/%23arm-netbook or http://irclog.whitequark.org/arm-netbook/ - http://rhombus-tech.net/
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<Gumboot> What the world clearly needs is a CPU on a board with a wee bit of flash and half a dozen properly-powered USB ports. No display. No audio. No GPIO. Just attach what you need via USB at extra cost.
<xenoxaos> until you run out of bandwidth
<Gumboot> Attach more bandwidth!
<xenoxaos> with duct tape and hot glue
<Gumboot> Actually, you probably could. You could daisy-chain them so that you get more CPUs with more bandwidth communicating back just the essentials.
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<xenoxaos> the programming logistics on that would be hell
<Gumboot> It's for education!
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<xenoxaos> But I don't want to go to sodomy school.
<Gumboot> You could even connect them in a ring.
<Gumboot> I would like to disassociate that last comment from the sodomy reference, if possible.
<xenoxaos> nope
<Gumboot> Fine. I think there's a word for it, but I'm not going to google it.
<xenoxaos> !g ring of sodomy
<xenoxaos> oh...there's a picture....
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* hno will likely to token ring/bus networking in the near future. Thought that was dead.
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<Marex> hno: token ring is splendid ... one ring to rule them all (tm) ;-)
<Marex> btw. mail.google.com is down? nice ;-)
<Marex> not anymore ... weird
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<Mehhh> Does anyone here have a lapdock?
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<xxiao> how can I avoid the fxxx windows all together
<xxiao> can't recall how to get its env variable, echo $VAR1?
* xxiao uses windows 10 hours per year
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<Marex> xxiao: to do taxes ? ;-)
<Marex> wasnt it %VAR ?
<xxiao> Marex: that's right
<xxiao> it's something like %VAR%? anyway i managed to get it working, JAVA_HOME and PATH both need to be set manually
<HACKhalo2> heh
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<hno> xxiao, boot Linux in a full screen VM and forget there is a Windows bootloader.
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<hno> Updated mainlining wiki page with a little more realistic order.
<libv> let me add to the mali bit.
<libv> hno: so the nand situation really is that bad huh?
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<Turl> libv: ping
<libv> pong
<Turl> libv: any idea what might be causing this error? http://pastie.org/5441726
<Turl> esp. the EGL-ERROR
<Turl> libv: we're hitting that on android 4.2
<Turl> libv: it's interesting because the only affected platform is Mali GPU
<Turl> PowerVR, Adreno work without issues
<libv> why 720x1280?
<libv> what device are you using?
<libv> while being rotated
<libv> printf your way out of this one, check where that calloc return -ENOMEM is
<Turl> that log is not from an A10 but from some samsung device
<Turl> I don't have my A10 log handy but it's the same problem
<libv> still, printf your way out of it
<libv> this smells like allocating an intermediate buffer failing
<libv> mAllocDev->alloc(mAllocDev, w, h, format, usage, handle, stride);
<libv> that's probably from the libhw gralloc module
<Turl> yeah that's the gralloc module
<Turl> which is unchanged from android 4.1
<libv> where is the code for that?
<libv> for mali
<Turl> malideveloper
<libv> ok
<Turl> it's mostly the same source
<libv> so the currently public mali gralloc code is broken for jelly bean
<Turl> 4.2 jellybean
<Turl> it works fine on 4.1 jellybean
<Turl> all other vendors have no issues on either version with the same graphic stack
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<libv> ?
<libv> your last statement makes no sense to me
<libv> do you mean that pvr/adreno/etc are ok with the changes to surface flinger and gralloc for jelly bean?
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<Turl> hope the ascii table cleans up any confusion
<Turl> gralloc didn't change 4.1 JB -> 4.2 JB
<libv> different drivers == different graphics stacks imho
<libv> but that's probably my pov
<libv> it could be that you ran out of buffers.
<Turl> the same libMali, libEGL*Mali*, libUMP, gralloc* were used on both android versions
<Turl> same applies to pvr & adreno, using their corresponding libs, daemons and stuffs
<libv> yes, i would think that you just ran out of buffers
<libv> you have a -ENOMEM there
<libv> init_frame_buffer_locked is unlikely to return -ENOMEM
<Turl> buffermask is an uint32, so we have 32 buffers I'm guessing?
<libv> 1 << (1 << 32) is a rather big number
<Turl> m->bufferMask |= (1LU<<i);
<libv> ah, yes, you are right
<libv> so yes, only up to 32 framebuffers available apparently
<libv> again though, LOGE your way out of it, make sure that this codepath is actually hit
<libv> and where it is actually throwing back -ENOMEM
<Turl> E/ ( 6888): void __egl_platform_dequeue_buffer(egl_surface*):1188 [EGL-ERROR] failed to dequeue buffer from native window (0x40421990); err = -12, buf = 0x40819ff0
<Turl> E/gralloc ( 6888): ENOMEM OVER HERE static int gralloc_alloc_framebuffer_locked
<Turl> W/GraphicBufferAllocator( 6888): alloc(1024, 768, 5, 00001e02, ...) failed -12 (Out of memory)
<Turl> yup
<Turl> wohoo it works libv :D
<Turl> I killed the buffer limit checker
<libv> well, check what numBuffers and bufferMask are doing
<libv> erm, you do want to fix things properly
<Turl> yeah I know
<Turl> was just a PoC :)
<Turl> libv: numBuffers is 2
<libv> something has changed
<libv> in surfaceflinger or gralloc
<libv> but do review the life of numBuffers and bufferMask
<libv> through logging
<Turl> other platforms have supported triple buffering for a while I think
<libv> well, it could be a bug in the handling of numBuffers/bufferMask between allocs and frees
<libv> or it could be an actual shortage of memory
<libv> memory assigned to the mali
<hno> libv, the Allwinner logical nand driver is not submittable without anyone understanding the logical layer and stepping up to document it and accept being a maintainer.
<Turl> hardcoding numBuffers to 3 on gralloc seems to work
<hno> libv, but we will likely have a well functioning MTD driver.
<Turl> I need to check where does numBuffers come from
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<libv> #define NUM_BUFFERS 2
<libv> framebuffer_device.cpp
<libv> but the fb driver might not give back more
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<Turl> module->numBuffers = info.yres_virtual / info.yres;
<libv> so find out why we need a third
<libv> but we only requested 2
<Turl> http://sprunge.us/LQHI I think this is it
<libv> smells like it
<libv> first bump the define up to 3
<libv> i do not know how fb responds to that though
<libv> might be driver dependant
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<libv> if both the samsung and your allwinner return that, then you might get away with it
<libv> the change to services/surfaceflinger/Layer.cpp is rather scary
<Turl> if they made a makefile define switch to change it it must be not that scary
<libv> you would expect the hw framebuffer module to feed that back
<libv> and not be hardcoded somewhere up top
<libv> it's clearly dynamic for surfaceflinger, but these defines make it semi-hardcoded
<libv> and the hw has no say in it
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<Turl> they also have a NUM_FRAMEBUFFER_SURFACE_BUFFERS
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<Gumboot> It really is tempting to set up an rpi hate site and fill it full of adverts and a couple of unkind remarks. Can you make money on adverts just being displayed, or do they have to be clicked?
<mnemoc> at least google ads pays for both, obviusly differently
<Gumboot> Maybe I really should, then. I wonder how much I can make.
<Gumboot> And if I did, what should I do with the money?
<mnemoc> buy rpis
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<Gumboot> If the DSP toolchain makes any progress I'd be tempted.
<Gumboot> It's only the ARM which is completely useless.
<Gumboot> Without bothering to read the actual changes, the commit messages seem promising: https://github.com/mm120/binutils-vc4/commits/vc4
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<RaYmAn> useful commit messages there ;)
<libv> yeah :(
<Gumboot> Nevermind the commit messages.... does it work?
<Gumboot> I probably shouldn't look. It'll drive me mental knowing that they've got little mistakes here and there which I can't correct.
<Gumboot> Does the bootloader include the GPU driver, or is that uploaded at a later stage?
<mnemoc> i've seen commit messages about needing to go for coffee or to the grocery store :|
<libv> Gumboot: the 2mb blob which is later contains that i guess
<libv> loaded later even
<Gumboot> Well that's only the same size as the startup elf file.
<Gumboot> I hope these binutils use the same elf metadata as is already used in the existing elfs. It would be easy to just start from scratch and forget about compatibility.
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<slapin> do anybody knows how I can link custom section to .rodata without using linker script? this is userspace program, so I don't want to mess with linker scripts for it
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<oliv3r> if i have a 4 Byte variable, and i do 3 << 30; that can't be right, correct?
<mnemoc> it's fine
<oliv3r> won't it overflow?
<oliv3r> oh wait, no
<oliv3r> i'm stupid
<mnemoc> 3 is 0b11
<oliv3r> yeah
<oliv3r> i'm stupid :)
<mnemoc> yes :)
<oliv3r> ... thanks :p
<oliv3r> i was thinking of 3 being 0b111
<oliv3r> i had that still in my calculator, from an earlier 7 << 0
<oliv3r> :p
<mnemoc> anyhow, unsigneds don't overflow in C
<mnemoc> 7<<30 == 3<<30
<oliv3r> what about chip registers :p
<mnemoc> should be the same
<oliv3r> still, it COULD cause bugs!
<oliv3r> crashes, fires, skynet's self awareness!
<mnemoc> take the ref guide and see the shift instruction you are using
<mnemoc> the excess could be sent to another register
<mnemoc> but i'm not an asm guy
<oliv3r> oh, nah, i just thought i found a bug in a header file :p
<mnemoc> nope :)
<oliv3r> i'm wikiing things :p
<mnemoc> which controller?
<oliv3r> yeah, cause I was being stupid
<oliv3r> sec, i'll save my intermediate work
<oliv3r> htt://linux-sunxi.org/A10/NFC
<mnemoc> afaik the NFC is identical in all sunxi socs
<oliv3r> then we need a better naming convention, since we started with A10/registers
<oliv3r> i just went from there!
<mnemoc> that's fine, but I believe A10/NFC should redirect to just NFC
<mnemoc> but it can be moved later
<oliv3r> yep
<oliv3r> I think a lof of devices and controllers are identical
<mnemoc> do you want to learn SVG? :)
<mnemoc> tables to describe registers suck badly :<
<oliv3r> er, not really :( why
<oliv3r> ok, NOW you say this?
<oliv3r> you have any clue how much time i've spent writing register tables?
<mnemoc> a lot
<mnemoc> :)
<oliv3r> :p
<oliv3r> what did you have in mind?
<mnemoc> an image :)
<oliv3r> obviously :p how much would it be different though?
<oliv3r> I know a table isn't ideal
<oliv3r> I wonder how an image would be more usefull
<mnemoc> adds visual meaning to the bit ranges
<oliv3r> do you have an example of such an image?
<oliv3r> 'interactive' memory map would be way cooler :p
<mnemoc> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0304c/Chdifhjd.html
<mnemoc> slapin's .tex document about the NFC has such diagrams
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<mnemoc> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0331c/BABEFEJE.html
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<oliv3r> slapin has a document? where is that at?
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<oliv3r> speaking of slaping and hno it would be awesome if they could fill in their knowlege into http:/linux-sunxi.org/A10/NFC
<oliv3r> i'm done for today :) and put in the registers/bits I could find so far
<mnemoc> learning svg would let use make a wiki template to generate the diagrams
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<oliv3r> you do realize I wanna strangle you right now
<oliv3r> I talked about templates when I started doing this
<oliv3r> you where opposed!
<oliv3r> so i went with a table, as you thought that was best
<oliv3r> I guess there could be an easy way to 'transform' the code from wiki to svg
<oliv3r> i tried to be consistent with the tables :)
<mnemoc> oliv3r: i opposed full page templates, not diagram templates or infoboxes :)
<mnemoc> the tables are good.... they just miss a diagram on top :)
<oliv3r> those grahpics do look nice
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<oliv3r> if the tables where a template, like i suggested! we could have generated the diagrams from that
<mnemoc> +1 to per-register template :)
<mnemoc> not per-controller
<oliv3r> yeah yeah yeah, you say all this now!
<mnemoc> *g*
<oliv3r> i ment per register template!
<oliv3r> back then
<mnemoc> i understood full-page templates :<
<oliv3r> miss communication fail!
<oliv3r> well
<oliv3r> how many days would it take to get it from a table to a template
<oliv3r> I guess it can be automated with some bash/perl magic
<oliv3r> but that's beyond my skills!
<oliv3r> or desires :p
<oliv3r> I can try to do it for the next controller
<oliv3r> yes
<oliv3r> bfree: exactly that
<oliv3r> mnemoc: in either case, we'd need a good template for the registers to begin with
<mnemoc> hopefully a bit larger so the text can be read :p
<mnemoc> oliv3r: yes, next controller, always forward
<oliv3r> well the older stuff will have to be adapted at some point
<bfree> that could be doable on the fly in javascript from the html tables in the wiki output ;) but if you have a lot of bits in there where is all the text going to go and is it really going to be much of an improvement?
<oliv3r> if you can whip up a template + example, i'll use it on the next controller :)
<oliv3r> you'd only have bit + name
<oliv3r> or even just bitnumber, as you can look up the bit number in the table (from template) below
<slapin> oliv3r: http://ossfans.org/nand_registers.ps is postscript version
<oliv3r> i'll hope to find that page tomorrow :p
<oliv3r> i'll try to work in your findings into the draft wiki page
<oliv3r> but gotta go home now :)
* slapin wants to put that somewhere on public with source, where it can be edited
<oliv3r> bb :)
<oliv3r> slapin: well i just put up http://linux-sunxi.org/A10/NFC
<oliv3r> try to look at that and see :D
<oliv3r> *poof*
<slapin> oliv3r: no nice pictures there
<oliv3r> :p
<oliv3r> i'll put some boobies pics up :p
<slapin> oliv3r: ok
<slapin> oliv3r: I will check then
<slapin> there is no such thing as too many boobs
<mnemoc> mripard: hi, did you already start with the pinctrl stuff?
<mripard> mnemoc: yep, a bit
<mnemoc> mripard: i pushed some stuff to https://github.com/amery/linux-allwinner/commits/wip/sunxi-next/pinctrl ... but still kind of lost
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<mnemoc> there is a wip/sunxi-next/i2c there too, but cleanup only, no porting yet
<mripard> yes, I'm having a hard time too to get how to map those completely random pins supported in A10, A10s and A13, and how to map them usefuly to pinctrl
<mripard> ah
<mripard> the Pio IPs are different from A10 to A13 ?
<mnemoc> no, they are the same
<mnemoc> i have separated .c for the statics
<mnemoc> because groups and features difer between socs... obviusly
<mripard> but what about the aw1626 and aw1623
<mripard> ?
<mnemoc> aw1623 is the so called A10
<mnemoc> aw1626 is A13
<mripard> aaah, I see
<mnemoc> "chip-id" vs. marketing name
<mnemoc> the chip-id lives inside the header of the BROM
<mnemoc> I was doing it detection based in 3.4... until I realized modern arm-linux hates detection, and everything needs to be hardcoded in the .dts
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<xxiao> hopefully u-boot etc will be able to generate dts automatically
<mnemoc> eventually we will be able to turn an script.bin into dts
<xxiao> actually for usb, pci or most probe-able bus it's still detected dynamically
<mnemoc> but we need to model it manually first :p
<xxiao> dts just assign interrupts and some basic resources for those buses
<xxiao> but for misc bus/interfaces you have to hand-code them
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<slapin> hno: ping
<slapin> hno: hi!
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<L84Supper> who was looking for the PCB breakout for the a10 bga?
<mnemoc> those are from the hackberry, right? can you upload them to the wiki?
<L84Supper> no
<L84Supper> from some other board
<L84Supper> I don't post to that old wiki anymore
<L84Supper> then again if you really need help with the BGA breakout I highly doubt you'll be able to design a board that works well
<focus_well> L84Supper: yum yum! that be me looking for those bga tracks!!!
<mnemoc> i have zero intention in designing a board, ever
<mnemoc> just want to be sure no sunxi related knowledge gets lost
<focus_well> L84Supper: a couple of questions
<focus_well> 1. The inner BGA pads and some of the other bga pads have thick tracks.
<focus_well> Will those tracks have issues with solder freezing?
<focus_well> Is it better off to have min track width to the pads to prevent that?
<focus_well> 2. What is the bga pad size?
<focus_well> 3. What is the min track width used in the design between the bga pads?
<focus_well> 4. What is the hole size for vias used in the design between bga rows of
<focus_well> pads?
<focus_well> 5. What is the overall via size used in the design for vias between the
<focus_well> bga rows of pads?
<focus_well> From some other conversation I remember
<focus_well> the tracks the engineers used were 5 mils with 5 mil clearance.
<focus_well> The vias are 16 mils.
<focus_well> The drills were around 5 or 6 mils.
<focus_well> The companies I know makes PCB with these limits
<focus_well> min track width 0.075mm
<focus_well> min hole size 0.15mm.
<L84Supper> I'd suggest that you spend a few more years learning high speed PCB design
<L84Supper> there is no way around it
<L84Supper> or you end up with the usual junk
<focus_well> L84Supper: I design lots of PCBs these days
<focus_well> All working :)
<L84Supper> then you should be able to answer this yourself :)
<focus_well> The info request is specific to the A10 bga
<focus_well> L84Supper: those diagrams were very good - thanks!
* slapin looks at working board, and smiles, very, very evilly, and puts it into junk bin for parts
* slapin wants to learn BGA PCB design a cheap way - any pointers?
<focus_well> L84Supper: I have info here and there, but rather I use 100% certain data. But I have allow 2-3 redesigns to get it right - so I'm not in a hurry to get it right first time.
<L84Supper> those pics are from a magic board, that just happens to work due to good luck
<focus_well> The board i want is ideally torture tested and still working
<drachensun> my last bga design had to be 4 mil clearance, there was no way to route it at 5 mils, the pads had something close to 12 mils between them, so 4 on each side and 4 for the track and that was it
<drachensun> there are places that can do tighter design clearances, you just have to find them
<focus_well> dranchensun: keep talking I pick up conversation in a few hours.. bye
<drachensun> heh I think that was all I had to say about it. I ran into the same thing, I wanted to keep it at 5 mil because I can get cheap prototypes at that size
<drachensun> but it just wasn't possible and that was an Atmel with a lot fewer pins than an A10
<slapin> drachensun: any pointers on cheap BGA prototypes (6-8 layers)>
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<slapin> ?
<L84Supper> sometimes you can use 5/5mil for most of the board and only go down to 4/4 or even 3 just between BGA pads
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<jquip> is the cdc-acm driver a part of the kernel defconfig??
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<drachensun> slapin: not really, we found one place with good pricing for tight tolerances but I think they are gone now
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<slapin> which safe resistor nominals should be for 3.3 SPI pull-ups?
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<techn> drachensun: how did you enabled ft5x_ts on linaro?
<techn> ts works but x.org log says that:
<techn> [ 1366.144] (II) No input driver specified, ignoring this device.
<techn> [ 1366.144] (II) This device may have been added with another device file.
<techn> and I apt-get'd utouch
<techn> on other tabled (with gt811) everything worked without hasle.. even without utouch
<drachensun> let me check my Xorg log
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<drachensun> My Xorg log says that too
<drachensun> but it works
<drachensun> well let me check another system real quick
<drachensun> I've got a bunch of these running under different rootfs
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<mnemoc> maybe ranting about a different input device?
<drachensun> ok, I got a little mixed up, on my system with the mali drivers and my screwed up xorg conf from trying to get xrandr to rotate the screen, I have the same message and currently the touch doesn't work
<drachensun> on my other system it works
<drachensun> and the Xorg.0.log looks like you would expect "using input driver 'evdev' for 'ft5x_ts'
<techn> drachensun: thanks.. now to track why that doesn't happen :p
<drachensun> give me a sec and I'll post what logs and conf files I can from the working system
<drachensun> Ok, the only difference in the conf files seems to be that 99-mali400.conf from the mali driver and my additions to it
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<drachensun> there is my xorg.0.log file http://pastebin.com/euu7MUMy
<drachensun> and the xorg.conf files are just the stock linaro ones in this case
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<techn> ft5x_ts: Applying InputClass "evdev touchscreen catchall", thats seems to be first missing print
<drachensun> thats coming from /usr/share/X11/xorg.conf.d/10-evdev.conf
<drachensun> off for a bit
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<atari2600a> so
<atari2600a> um
<atari2600a> when do you guys think you'll get to that whole unified bootloader standard thing
<atari2600a> it has to be one of the biggest setbacks with ARM
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<Turl> isn't uboot that?
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<hno> oliv3r & mnemoc, I am not pouring any original material into linux-sunxi.org wiki until the data can be managed reasonably and there is backups.
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<CaCtus491> ...this talk about qty 100 for a small A10 board with WiFi, 3G, Ethernet...
<CaCtus491> I'm also looking for something very similar (qty 100, 3G, Ethernet), WiFi may be handy, but not required
<focus_it> CaCtus491: http://cubieboard.org/ for you?
<CaCtus491> I also need 3 or 4 uarts, but can easily add that via USB via an FTDI chip or similar
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<libv> CaCtus491: or olinuxino
<CaCtus491> hmm, re: cubieboard, I don't see any obvious pins on the 48 pin 2mm headers that would allow me to connect a 3G module to a base board
<CaCtus491> (ie, I'd need to use the USB connector to the edge of the board
<CaCtus491> )
<focus_it> CaCtus491: 3G you can use a MyFi or similar device http://en.wikipedia.org/wiki/MiFi ?
<focus_it> Use the wifi to connect to the MiFi.
<libv> CaCtus491: look at the olinuxino
<libv> CaCtus491: if you get the ones without wifi, you can use that usb connection to connect a 3g module
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<libv> CaCtus491: feel free to contact olimex or tom cubie to find out how much they charge for adapting their designs to your needs and for providing the limited run you need
<focus_it> CaCtus491: olimex IRC channel is #olimex on freenode
<libv> but i personally consider them quite on-topic in here too :)
<libv> in as far as linux-sunxi is on-topic in the eoma channel ;)
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<libv> olinuxino has two uarts exposed directly
<libv> olimex will not be adverse to designing a 3g submodule if the revenue is there
<CaCtus491> excellent
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<CaCtus491> the A13 OLinuXino looks pretty close to what I need
<CaCtus491> ...the 3G stuff will need to be 'integrated' in that I need to have the solution in a single extruded aluminium case
<CaCtus491> hmm, Olimex...
<CaCtus491> interesting, this project is to replace an older LPC2148 based design from a few years back
<CaCtus491> I seem to remember purchasing some LPC2148 stuff from them :)
<libv> is a cortex a8 really what you need for your project?
<CaCtus491> heh, yeah, new revision will have many new additional features that simply aren't possible witht the existing hardware, including a LCD for UI
<Turl> CaCtus491: btw, Ethernet is 100Mbit
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<CaCtus491> yeah, 100Mbit is heaps, even 10Mbit would do ;)
<CaCtus491> I wonder when the Olimex A13 mini board will be ready
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